^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * TerraTec Cinergy T2/qanu USB2 DVB-T adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2007 Tomi Orava (tomimo@ncircle.nullnet.fi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on the dvb-usb-framework code and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * original Terratec Cinergy T2 driver by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2004 Daniel Mack <daniel@qanu.de> and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Holger Waechtler <holger@qanu.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Protocol Spec published on http://qanu.de/specs/terratec_cinergyT2.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "cinergyT2.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * convert linux-dvb frontend parameter set into TPS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * See ETSI ETS-300744, section 4.6.2, table 9 for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * This function is probably reusable and may better get placed in a support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * library.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * We replace erroneous fields by default TPS fields (the ones with value 0).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static uint16_t compute_tps(struct dtv_frontend_properties *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) uint16_t tps = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) switch (op->code_rate_HP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) case FEC_2_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) tps |= (1 << 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) case FEC_3_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) tps |= (2 << 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) case FEC_5_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) tps |= (3 << 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) case FEC_7_8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) tps |= (4 << 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) case FEC_1_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) case FEC_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* tps |= (0 << 7) */;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) switch (op->code_rate_LP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) case FEC_2_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) tps |= (1 << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) case FEC_3_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) tps |= (2 << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) case FEC_5_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) tps |= (3 << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) case FEC_7_8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) tps |= (4 << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) case FEC_1_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) case FEC_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* tps |= (0 << 4) */;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) switch (op->modulation) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) case QAM_16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) tps |= (1 << 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) case QAM_64:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) tps |= (2 << 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) case QPSK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* tps |= (0 << 13) */;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) switch (op->transmission_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) case TRANSMISSION_MODE_8K:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) tps |= (1 << 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) case TRANSMISSION_MODE_2K:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* tps |= (0 << 0) */;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) switch (op->guard_interval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) case GUARD_INTERVAL_1_16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) tps |= (1 << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) case GUARD_INTERVAL_1_8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) tps |= (2 << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) case GUARD_INTERVAL_1_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) tps |= (3 << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) case GUARD_INTERVAL_1_32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* tps |= (0 << 2) */;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) switch (op->hierarchy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) case HIERARCHY_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) tps |= (1 << 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) case HIERARCHY_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) tps |= (2 << 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) case HIERARCHY_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) tps |= (3 << 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) case HIERARCHY_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* tps |= (0 << 10) */;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return tps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct cinergyt2_fe_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct dvb_frontend fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct dvb_usb_device *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) unsigned char data[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct mutex data_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct dvbt_get_status_msg status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int cinergyt2_fe_read_status(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) enum fe_status *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct cinergyt2_fe_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) mutex_lock(&state->data_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) state->data[0] = CINERGYT2_EP1_GET_TUNER_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) ret = dvb_usb_generic_rw(state->d, state->data, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) state->data, sizeof(state->status), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) memcpy(&state->status, state->data, sizeof(state->status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) mutex_unlock(&state->data_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) *status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (0xffff - le16_to_cpu(state->status.gain) > 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) *status |= FE_HAS_SIGNAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (state->status.lock_bits & (1 << 6))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) *status |= FE_HAS_LOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (state->status.lock_bits & (1 << 5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) *status |= FE_HAS_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (state->status.lock_bits & (1 << 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) *status |= FE_HAS_CARRIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (state->status.lock_bits & (1 << 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) *status |= FE_HAS_VITERBI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if ((*status & (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC)) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) *status &= ~FE_HAS_LOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static int cinergyt2_fe_read_ber(struct dvb_frontend *fe, u32 *ber)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct cinergyt2_fe_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) *ber = le32_to_cpu(state->status.viterbi_error_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static int cinergyt2_fe_read_unc_blocks(struct dvb_frontend *fe, u32 *unc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct cinergyt2_fe_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) *unc = le32_to_cpu(state->status.uncorrected_block_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static int cinergyt2_fe_read_signal_strength(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) u16 *strength)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct cinergyt2_fe_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) *strength = (0xffff - le16_to_cpu(state->status.gain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static int cinergyt2_fe_read_snr(struct dvb_frontend *fe, u16 *snr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct cinergyt2_fe_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) *snr = (state->status.snr << 8) | state->status.snr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static int cinergyt2_fe_init(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static int cinergyt2_fe_sleep(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) deb_info("cinergyt2_fe_sleep() Called\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static int cinergyt2_fe_get_tune_settings(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct dvb_frontend_tune_settings *tune)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) tune->min_delay_ms = 800;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static int cinergyt2_fe_set_frontend(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct cinergyt2_fe_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct dvbt_set_parameters_msg *param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) mutex_lock(&state->data_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) param = (void *)state->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) param->cmd = CINERGYT2_EP1_SET_TUNER_PARAMETERS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) param->tps = cpu_to_le16(compute_tps(fep));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) param->freq = cpu_to_le32(fep->frequency / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) param->flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) switch (fep->bandwidth_hz) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) case 8000000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) param->bandwidth = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) case 7000000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) param->bandwidth = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) case 6000000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) param->bandwidth = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) err = dvb_usb_generic_rw(state->d, state->data, sizeof(*param),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) state->data, 2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) err("cinergyt2_fe_set_frontend() Failed! err=%d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) mutex_unlock(&state->data_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return (err < 0) ? err : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static void cinergyt2_fe_release(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct cinergyt2_fe_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static const struct dvb_frontend_ops cinergyt2_fe_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct dvb_frontend *cinergyt2_fe_attach(struct dvb_usb_device *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) struct cinergyt2_fe_state *s = kzalloc(sizeof(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct cinergyt2_fe_state), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (s == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) s->d = d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) memcpy(&s->fe.ops, &cinergyt2_fe_ops, sizeof(struct dvb_frontend_ops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) s->fe.demodulator_priv = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) mutex_init(&s->data_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return &s->fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static const struct dvb_frontend_ops cinergyt2_fe_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .delsys = { SYS_DVBT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .name = DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .frequency_min_hz = 174 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .frequency_max_hz = 862 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .frequency_stepsize_hz = 166667,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .caps = FE_CAN_INVERSION_AUTO | FE_CAN_FEC_1_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) | FE_CAN_FEC_AUTO | FE_CAN_QPSK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) | FE_CAN_QAM_16 | FE_CAN_QAM_64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) | FE_CAN_QAM_AUTO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) | FE_CAN_TRANSMISSION_MODE_AUTO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) | FE_CAN_GUARD_INTERVAL_AUTO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) | FE_CAN_HIERARCHY_AUTO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) | FE_CAN_RECOVER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) | FE_CAN_MUTE_TS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .release = cinergyt2_fe_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .init = cinergyt2_fe_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .sleep = cinergyt2_fe_sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .set_frontend = cinergyt2_fe_set_frontend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .get_tune_settings = cinergyt2_fe_get_tune_settings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .read_status = cinergyt2_fe_read_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .read_ber = cinergyt2_fe_read_ber,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .read_signal_strength = cinergyt2_fe_read_signal_strength,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .read_snr = cinergyt2_fe_read_snr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .read_ucblocks = cinergyt2_fe_read_unc_blocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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