^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Afatech AF9035 DVB USB driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef AF9035_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define AF9035_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "dvb_usb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "af9033.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "tua9001.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "fc0011.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "fc0012.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "mxl5007t.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "tda18218.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "fc2580.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "it913x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "si2168.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "si2157.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct reg_val {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct reg_val_mask {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u8 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct usb_req {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u8 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u8 mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u8 wlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u8 *wbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u8 rlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u8 *rbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define BUF_LEN 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u8 buf[BUF_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u8 seq; /* packet sequence number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u8 prechip_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u8 chip_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u16 chip_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u8 eeprom[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) bool no_eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u8 ir_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u8 ir_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u8 dual_mode:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u8 no_read:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u8 af9033_i2c_addr[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u8 it930x_addresses;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct af9033_config af9033_config[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct af9033_ops ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define AF9035_I2C_CLIENT_MAX 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct i2c_client *i2c_client[AF9035_I2C_CLIENT_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct i2c_adapter *i2c_adapter_demod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct platform_device *platform_device_tuner[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct address_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u8 frontend_i2c_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u8 tuner_i2c_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u8 tuner_if_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static const struct address_table it930x_addresses_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) { 0x67, 0x63, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) { 0x64, 0x60, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static const u32 clock_lut_af9035[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 20480000, /* FPGA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 16384000, /* 16.38 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 20480000, /* 20.48 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 36000000, /* 36.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 30000000, /* 30.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 26000000, /* 26.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 28000000, /* 28.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 32000000, /* 32.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 34000000, /* 34.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 24000000, /* 24.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 22000000, /* 22.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 12000000, /* 12.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static const u32 clock_lut_it9135[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) 12000000, /* 12.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) 20480000, /* 20.48 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) 36000000, /* 36.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) 30000000, /* 30.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) 26000000, /* 26.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 28000000, /* 28.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 32000000, /* 32.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 34000000, /* 34.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 24000000, /* 24.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 22000000, /* 22.00 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define AF9035_FIRMWARE_AF9035 "dvb-usb-af9035-02.fw"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define AF9035_FIRMWARE_IT9135_V1 "dvb-usb-it9135-01.fw"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define AF9035_FIRMWARE_IT9135_V2 "dvb-usb-it9135-02.fw"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define AF9035_FIRMWARE_IT9303 "dvb-usb-it9303-01.fw"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * eeprom is memory mapped as read only. Writing that memory mapped address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * will not corrupt eeprom.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * TS mode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * 0 TS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * 1 DCA + PIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * 3 PIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * 5 DCA + PIP (AF9035 only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * n DCA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * Values 0, 3 and 5 are seen to this day. 0 for single TS and 3/5 for dual TS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define EEPROM_BASE_AF9035 0x42f5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define EEPROM_BASE_IT9135 0x4994
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define EEPROM_SHIFT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define EEPROM_IR_MODE 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define EEPROM_TS_MODE 0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define EEPROM_2ND_DEMOD_ADDR 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define EEPROM_IR_TYPE 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define EEPROM_1_IF_L 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define EEPROM_1_IF_H 0x39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define EEPROM_1_TUNER_ID 0x3c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define EEPROM_2_IF_L 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define EEPROM_2_IF_H 0x49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define EEPROM_2_TUNER_ID 0x4c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* USB commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define CMD_MEM_RD 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define CMD_MEM_WR 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define CMD_I2C_RD 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define CMD_I2C_WR 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define CMD_IR_GET 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define CMD_FW_DL 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define CMD_FW_QUERYINFO 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define CMD_FW_BOOT 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define CMD_FW_DL_BEGIN 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define CMD_FW_DL_END 0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define CMD_FW_SCATTER_WR 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define CMD_GENERIC_I2C_RD 0x2a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define CMD_GENERIC_I2C_WR 0x2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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