^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) cx231xx-video.c - driver for Conexant Cx23100/101/102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) USB video capture devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Based on em28xx driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Based on cx23885 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Based on cx88 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "cx231xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/bitmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <media/v4l2-ioctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <media/v4l2-event.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <media/drv-intf/msp3400.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <media/tuner.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include "cx231xx-vbi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define CX231XX_VERSION "0.0.3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define DRIVER_AUTHOR "Srinivasa Deevi <srinivasa.deevi@conexant.com>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DRIVER_DESC "Conexant cx231xx based USB video device driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define cx231xx_videodbg(fmt, arg...) do {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (video_debug) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) printk(KERN_INFO "%s %s :"fmt, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) dev->name, __func__ , ##arg); } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static unsigned int isoc_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) module_param(isoc_debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MODULE_PARM_DESC(isoc_debug, "enable debug messages [isoc transfers]");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define cx231xx_isocdbg(fmt, arg...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) do {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (isoc_debug) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) printk(KERN_INFO "%s %s :"fmt, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) dev->name, __func__ , ##arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MODULE_AUTHOR(DRIVER_AUTHOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MODULE_DESCRIPTION(DRIVER_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MODULE_VERSION(CX231XX_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static unsigned int card[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = -1U };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static unsigned int video_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = -1U };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static unsigned int vbi_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = -1U };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static unsigned int radio_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = -1U };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) module_param_array(card, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) module_param_array(video_nr, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) module_param_array(vbi_nr, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) module_param_array(radio_nr, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MODULE_PARM_DESC(card, "card type");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MODULE_PARM_DESC(video_nr, "video device numbers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MODULE_PARM_DESC(radio_nr, "radio device numbers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static unsigned int video_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) module_param(video_debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* supported video standards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static struct cx231xx_fmt format[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .fourcc = V4L2_PIX_FMT_YUYV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .depth = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .reg = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static int cx231xx_enable_analog_tuner(struct cx231xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #ifdef CONFIG_MEDIA_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct media_device *mdev = dev->media_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct media_entity *entity, *decoder = NULL, *source;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct media_link *link, *found_link = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int ret, active_links = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (!mdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * This will find the tuner that is connected into the decoder.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * Technically, this is not 100% correct, as the device may be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * using an analog input instead of the tuner. However, as we can't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * do DVB streaming while the DMA engine is being used for V4L2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * this should be enough for the actual needs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) media_device_for_each_entity(entity, mdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (entity->function == MEDIA_ENT_F_ATV_DECODER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) decoder = entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (!decoder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) list_for_each_entry(link, &decoder->links, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (link->sink->entity == decoder) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) found_link = link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (link->flags & MEDIA_LNK_FL_ENABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) active_links++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (active_links == 1 || !found_link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) source = found_link->source->entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) list_for_each_entry(link, &source->links, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct media_entity *sink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) sink = link->sink->entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (sink == entity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) flags = MEDIA_LNK_FL_ENABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ret = media_entity_setup_link(link, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dev_err(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) "Couldn't change link %s->%s to %s. Error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) source->name, sink->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) flags ? "enabled" : "disabled",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) dev_dbg(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) "link %s->%s was %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) source->name, sink->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) flags ? "ENABLED" : "disabled");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* ------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) Video buffer and parser functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) ------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * Announces that a buffer were filled and request the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static inline void buffer_filled(struct cx231xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct cx231xx_dmaqueue *dma_q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct cx231xx_buffer *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /* Advice that buffer was filled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) cx231xx_isocdbg("[%p/%d] wakeup\n", buf, buf->vb.vb2_buf.index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) buf->vb.sequence = dma_q->sequence++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) buf->vb.field = V4L2_FIELD_INTERLACED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) buf->vb.vb2_buf.timestamp = ktime_get_ns();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) vb2_set_plane_payload(&buf->vb.vb2_buf, 0, dev->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (dev->USE_ISO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) dev->video_mode.isoc_ctl.buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) dev->video_mode.bulk_ctl.buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) list_del(&buf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static inline void print_err_status(struct cx231xx *dev, int packet, int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) char *errmsg = "Unknown";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) switch (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) case -ENOENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) errmsg = "unlinked synchronously";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) case -ECONNRESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) errmsg = "unlinked asynchronously";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) case -ENOSR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) errmsg = "Buffer error (overrun)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) case -EPIPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) errmsg = "Stalled (device not responding)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) case -EOVERFLOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) errmsg = "Babble (bad cable?)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) case -EPROTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) errmsg = "Bit-stuff error (bad cable?)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) case -EILSEQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) errmsg = "CRC/Timeout (could be anything)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) case -ETIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) errmsg = "Device does not respond";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (packet < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) cx231xx_isocdbg("URB status %d [%s].\n", status, errmsg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) cx231xx_isocdbg("URB packet %d, status %d [%s].\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) packet, status, errmsg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * video-buf generic routine to get the next available buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static inline void get_next_buf(struct cx231xx_dmaqueue *dma_q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct cx231xx_buffer **buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct cx231xx_video_mode *vmode =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) container_of(dma_q, struct cx231xx_video_mode, vidq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) char *outp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (list_empty(&dma_q->active)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) cx231xx_isocdbg("No active queue to serve\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (dev->USE_ISO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) dev->video_mode.isoc_ctl.buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) dev->video_mode.bulk_ctl.buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) *buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* Get the next buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) *buf = list_entry(dma_q->active.next, struct cx231xx_buffer, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /* Cleans up buffer - Useful for testing for frame/URB loss */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) outp = vb2_plane_vaddr(&(*buf)->vb.vb2_buf, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) memset(outp, 0, dev->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (dev->USE_ISO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) dev->video_mode.isoc_ctl.buf = *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) dev->video_mode.bulk_ctl.buf = *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * Controls the isoc copy of each urb packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static inline int cx231xx_isoc_copy(struct cx231xx *dev, struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct cx231xx_dmaqueue *dma_q = urb->context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) unsigned char *p_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) u32 bytes_parsed = 0, buffer_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) u8 sav_eav = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (dev->state & DEV_DISCONNECTED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (urb->status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) print_err_status(dev, -1, urb->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (urb->status == -ENOENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) for (i = 0; i < urb->number_of_packets; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) int status = urb->iso_frame_desc[i].status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) print_err_status(dev, i, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (urb->iso_frame_desc[i].status != -EPROTO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (urb->iso_frame_desc[i].actual_length <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* cx231xx_isocdbg("packet %d is empty",i); - spammy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (urb->iso_frame_desc[i].actual_length >
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) dev->video_mode.max_pkt_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) cx231xx_isocdbg("packet bigger than packet size");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /* get buffer pointer and length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) p_buffer = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) buffer_size = urb->iso_frame_desc[i].actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) bytes_parsed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (dma_q->is_partial_line) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* Handle the case of a partial line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) sav_eav = dma_q->last_sav;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* Check for a SAV/EAV overlapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) the buffer boundary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) sav_eav =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) cx231xx_find_boundary_SAV_EAV(p_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) dma_q->partial_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) &bytes_parsed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) sav_eav &= 0xF0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* Get the first line if we have some portion of an SAV/EAV from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) the last buffer or a partial line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (sav_eav) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) bytes_parsed += cx231xx_get_video_line(dev, dma_q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) sav_eav, /* SAV/EAV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) p_buffer + bytes_parsed, /* p_buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) buffer_size - bytes_parsed);/* buf size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /* Now parse data that is completely in this buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* dma_q->is_partial_line = 0; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) while (bytes_parsed < buffer_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) u32 bytes_used = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) sav_eav = cx231xx_find_next_SAV_EAV(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) p_buffer + bytes_parsed, /* p_buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) buffer_size - bytes_parsed, /* buf size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) &bytes_used);/* bytes used to get SAV/EAV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) bytes_parsed += bytes_used;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) sav_eav &= 0xF0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (sav_eav && (bytes_parsed < buffer_size)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) bytes_parsed += cx231xx_get_video_line(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) dma_q, sav_eav, /* SAV/EAV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) p_buffer + bytes_parsed,/* p_buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) buffer_size - bytes_parsed);/*buf size*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /* Save the last four bytes of the buffer so we can check the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) buffer boundary condition next time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) memcpy(dma_q->partial_buf, p_buffer + buffer_size - 4, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) bytes_parsed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static inline int cx231xx_bulk_copy(struct cx231xx *dev, struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct cx231xx_dmaqueue *dma_q = urb->context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) unsigned char *p_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) u32 bytes_parsed = 0, buffer_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) u8 sav_eav = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (dev->state & DEV_DISCONNECTED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (urb->status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) print_err_status(dev, -1, urb->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (urb->status == -ENOENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) if (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) /* get buffer pointer and length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) p_buffer = urb->transfer_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) buffer_size = urb->actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) bytes_parsed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (dma_q->is_partial_line) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* Handle the case of a partial line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) sav_eav = dma_q->last_sav;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) /* Check for a SAV/EAV overlapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) the buffer boundary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) sav_eav =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) cx231xx_find_boundary_SAV_EAV(p_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) dma_q->partial_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) &bytes_parsed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) sav_eav &= 0xF0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) /* Get the first line if we have some portion of an SAV/EAV from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) the last buffer or a partial line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (sav_eav) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) bytes_parsed += cx231xx_get_video_line(dev, dma_q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) sav_eav, /* SAV/EAV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) p_buffer + bytes_parsed, /* p_buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) buffer_size - bytes_parsed);/* buf size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /* Now parse data that is completely in this buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) /* dma_q->is_partial_line = 0; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) while (bytes_parsed < buffer_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) u32 bytes_used = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) sav_eav = cx231xx_find_next_SAV_EAV(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) p_buffer + bytes_parsed, /* p_buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) buffer_size - bytes_parsed, /* buf size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) &bytes_used);/* bytes used to get SAV/EAV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) bytes_parsed += bytes_used;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) sav_eav &= 0xF0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (sav_eav && (bytes_parsed < buffer_size)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) bytes_parsed += cx231xx_get_video_line(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) dma_q, sav_eav, /* SAV/EAV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) p_buffer + bytes_parsed,/* p_buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) buffer_size - bytes_parsed);/*buf size*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /* Save the last four bytes of the buffer so we can check the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) buffer boundary condition next time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) memcpy(dma_q->partial_buf, p_buffer + buffer_size - 4, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) bytes_parsed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) u32 *p_bytes_used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) u32 bytes_used;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) u8 boundary_bytes[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) u8 sav_eav = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) *p_bytes_used = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /* Create an array of the last 4 bytes of the last buffer and the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 4 bytes of the current buffer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) memcpy(boundary_bytes, partial_buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) memcpy(boundary_bytes + 4, p_buffer, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /* Check for the SAV/EAV in the boundary buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) sav_eav = cx231xx_find_next_SAV_EAV((u8 *)&boundary_bytes, 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) &bytes_used);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (sav_eav) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* found a boundary SAV/EAV. Updates the bytes used to reflect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) only those used in the new buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) *p_bytes_used = bytes_used - 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return sav_eav;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size, u32 *p_bytes_used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) u8 sav_eav = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * Don't search if the buffer size is less than 4. It causes a page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) * fault since buffer_size - 4 evaluates to a large number in that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (buffer_size < 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) *p_bytes_used = buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) for (i = 0; i < (buffer_size - 3); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if ((p_buffer[i] == 0xFF) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) (p_buffer[i + 1] == 0x00) && (p_buffer[i + 2] == 0x00)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) *p_bytes_used = i + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) sav_eav = p_buffer[i + 3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) return sav_eav;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) *p_bytes_used = buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) u32 cx231xx_get_video_line(struct cx231xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) struct cx231xx_dmaqueue *dma_q, u8 sav_eav,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) u8 *p_buffer, u32 buffer_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) u32 bytes_copied = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) int current_field = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) switch (sav_eav) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) case SAV_ACTIVE_VIDEO_FIELD1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) /* looking for skipped line which occurred in PAL 720x480 mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) In this case, there will be no active data contained
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) between the SAV and EAV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if ((buffer_size > 3) && (p_buffer[0] == 0xFF) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) (p_buffer[1] == 0x00) && (p_buffer[2] == 0x00) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) ((p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD1) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) (p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD2) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) (p_buffer[3] == EAV_VBLANK_FIELD1) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) (p_buffer[3] == EAV_VBLANK_FIELD2)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return bytes_copied;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) current_field = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) case SAV_ACTIVE_VIDEO_FIELD2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) /* looking for skipped line which occurred in PAL 720x480 mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) In this case, there will be no active data contained between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) the SAV and EAV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if ((buffer_size > 3) && (p_buffer[0] == 0xFF) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) (p_buffer[1] == 0x00) && (p_buffer[2] == 0x00) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) ((p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD1) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) (p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD2) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) (p_buffer[3] == EAV_VBLANK_FIELD1) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) (p_buffer[3] == EAV_VBLANK_FIELD2)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return bytes_copied;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) current_field = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) dma_q->last_sav = sav_eav;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) bytes_copied = cx231xx_copy_video_line(dev, dma_q, p_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) buffer_size, current_field);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) return bytes_copied;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) u32 cx231xx_copy_video_line(struct cx231xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) struct cx231xx_dmaqueue *dma_q, u8 *p_line,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) u32 length, int field_number)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) u32 bytes_to_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) struct cx231xx_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) u32 _line_size = dev->width * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) if (dma_q->current_field != field_number)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) cx231xx_reset_video_buffer(dev, dma_q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) /* get the buffer pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (dev->USE_ISO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) buf = dev->video_mode.isoc_ctl.buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) buf = dev->video_mode.bulk_ctl.buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /* Remember the field number for next time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) dma_q->current_field = field_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) bytes_to_copy = dma_q->bytes_left_in_line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (bytes_to_copy > length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) bytes_to_copy = length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if (dma_q->lines_completed >= dma_q->lines_per_field) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) dma_q->bytes_left_in_line -= bytes_to_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) dma_q->is_partial_line = (dma_q->bytes_left_in_line == 0) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) dma_q->is_partial_line = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) /* If we don't have a buffer, just return the number of bytes we would
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) have copied if we had a buffer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (!buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) dma_q->bytes_left_in_line -= bytes_to_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) dma_q->is_partial_line = (dma_q->bytes_left_in_line == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) return bytes_to_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) /* copy the data to video buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) cx231xx_do_copy(dev, dma_q, p_line, bytes_to_copy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) dma_q->pos += bytes_to_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) dma_q->bytes_left_in_line -= bytes_to_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if (dma_q->bytes_left_in_line == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) dma_q->bytes_left_in_line = _line_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) dma_q->lines_completed++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) dma_q->is_partial_line = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (cx231xx_is_buffer_done(dev, dma_q) && buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) buffer_filled(dev, dma_q, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) dma_q->pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) dma_q->lines_completed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) return bytes_to_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) void cx231xx_reset_video_buffer(struct cx231xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) struct cx231xx_dmaqueue *dma_q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) struct cx231xx_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) /* handle the switch from field 1 to field 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (dma_q->current_field == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) if (dma_q->lines_completed >= dma_q->lines_per_field)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) dma_q->field1_done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) dma_q->field1_done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) if (dev->USE_ISO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) buf = dev->video_mode.isoc_ctl.buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) buf = dev->video_mode.bulk_ctl.buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (buf == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) /* first try to get the buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) get_next_buf(dma_q, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) dma_q->pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) dma_q->field1_done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) dma_q->current_field = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) /* reset the counters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) dma_q->bytes_left_in_line = dev->width << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) dma_q->lines_completed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) u8 *p_buffer, u32 bytes_to_copy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) u8 *p_out_buffer = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) u32 current_line_bytes_copied = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) struct cx231xx_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) u32 _line_size = dev->width << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) void *startwrite;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) int offset, lencopy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) if (dev->USE_ISO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) buf = dev->video_mode.isoc_ctl.buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) buf = dev->video_mode.bulk_ctl.buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) if (buf == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) p_out_buffer = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) current_line_bytes_copied = _line_size - dma_q->bytes_left_in_line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) /* Offset field 2 one line from the top of the buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) offset = (dma_q->current_field == 1) ? 0 : _line_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) /* Offset for field 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) startwrite = p_out_buffer + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) /* lines already completed in the current field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) startwrite += (dma_q->lines_completed * _line_size * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) /* bytes already completed in the current line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) startwrite += current_line_bytes_copied;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) lencopy = dma_q->bytes_left_in_line > bytes_to_copy ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) bytes_to_copy : dma_q->bytes_left_in_line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) if ((u8 *)(startwrite + lencopy) > (u8 *)(p_out_buffer + dev->size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) /* The below copies the UYVY data straight into video buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) cx231xx_swab((u16 *) p_buffer, (u16 *) startwrite, (u16) lencopy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) void cx231xx_swab(u16 *from, u16 *to, u16 len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) u16 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) if (len <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) for (i = 0; i < len / 2; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) to[i] = (from[i] << 8) | (from[i] >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) u8 buffer_complete = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) /* Dual field stream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) buffer_complete = ((dma_q->current_field == 2) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) (dma_q->lines_completed >= dma_q->lines_per_field) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) dma_q->field1_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) return buffer_complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) /* ------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) Videobuf operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) ------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) static int queue_setup(struct vb2_queue *vq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) unsigned int *nbuffers, unsigned int *nplanes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) unsigned int sizes[], struct device *alloc_devs[])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) struct cx231xx *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) dev->size = (dev->width * dev->height * dev->format->depth + 7) >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) if (vq->num_buffers + *nbuffers < CX231XX_MIN_BUF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) *nbuffers = CX231XX_MIN_BUF - vq->num_buffers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) if (*nplanes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) return sizes[0] < dev->size ? -EINVAL : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) *nplanes = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) sizes[0] = dev->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) static void buffer_queue(struct vb2_buffer *vb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) struct cx231xx_buffer *buf =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) container_of(vb, struct cx231xx_buffer, vb.vb2_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) struct cx231xx *dev = vb2_get_drv_priv(vb->vb2_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) spin_lock_irqsave(&dev->video_mode.slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) list_add_tail(&buf->list, &vidq->active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) spin_unlock_irqrestore(&dev->video_mode.slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) static void return_all_buffers(struct cx231xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) enum vb2_buffer_state state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) struct cx231xx_buffer *buf, *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) spin_lock_irqsave(&dev->video_mode.slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) if (dev->USE_ISO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) dev->video_mode.isoc_ctl.buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) dev->video_mode.bulk_ctl.buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) list_for_each_entry_safe(buf, node, &vidq->active, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) list_del(&buf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) vb2_buffer_done(&buf->vb.vb2_buf, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) spin_unlock_irqrestore(&dev->video_mode.slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) static int start_streaming(struct vb2_queue *vq, unsigned int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) struct cx231xx *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) vidq->sequence = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) dev->mode_tv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) cx231xx_enable_analog_tuner(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (dev->USE_ISO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) ret = cx231xx_init_isoc(dev, CX231XX_NUM_PACKETS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) CX231XX_NUM_BUFS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) dev->video_mode.max_pkt_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) cx231xx_isoc_copy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) ret = cx231xx_init_bulk(dev, CX231XX_NUM_PACKETS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) CX231XX_NUM_BUFS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) dev->video_mode.max_pkt_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) cx231xx_bulk_copy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) return_all_buffers(dev, VB2_BUF_STATE_QUEUED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) call_all(dev, video, s_stream, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) static void stop_streaming(struct vb2_queue *vq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) struct cx231xx *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) call_all(dev, video, s_stream, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) return_all_buffers(dev, VB2_BUF_STATE_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) static struct vb2_ops cx231xx_video_qops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) .queue_setup = queue_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) .buf_queue = buffer_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) .start_streaming = start_streaming,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) .stop_streaming = stop_streaming,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) .wait_prepare = vb2_ops_wait_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) .wait_finish = vb2_ops_wait_finish,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) /********************* v4l2 interface **************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) void video_mux(struct cx231xx *dev, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) dev->video_input = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) dev->ctl_ainput = INPUT(index)->amux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) cx231xx_set_video_input_mux(dev, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) cx25840_call(dev, video, s_routing, INPUT(index)->vmux, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) cx231xx_set_audio_input(dev, dev->ctl_ainput);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) dev_dbg(dev->dev, "video_mux : %d\n", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) /* do mode control overrides if required */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) cx231xx_do_mode_ctrl_overrides(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) /* ------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) IOCTL vidioc handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) ------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) f->fmt.pix.width = dev->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) f->fmt.pix.height = dev->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) f->fmt.pix.pixelformat = dev->format->fourcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) f->fmt.pix.bytesperline = (dev->width * dev->format->depth + 7) >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * dev->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) f->fmt.pix.field = V4L2_FIELD_INTERLACED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) static struct cx231xx_fmt *format_by_fourcc(unsigned int fourcc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) for (i = 0; i < ARRAY_SIZE(format); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) if (format[i].fourcc == fourcc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) return &format[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) unsigned int width = f->fmt.pix.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) unsigned int height = f->fmt.pix.height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) unsigned int maxw = norm_maxw(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) unsigned int maxh = norm_maxh(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) struct cx231xx_fmt *fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) fmt = format_by_fourcc(f->fmt.pix.pixelformat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) if (!fmt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) cx231xx_videodbg("Fourcc format (%08x) invalid.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) f->fmt.pix.pixelformat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) /* width must even because of the YUYV format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) height must be even because of interlacing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) v4l_bound_align_image(&width, 48, maxw, 1, &height, 32, maxh, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) f->fmt.pix.width = width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) f->fmt.pix.height = height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) f->fmt.pix.pixelformat = fmt->fourcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) f->fmt.pix.bytesperline = (width * fmt->depth + 7) >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) f->fmt.pix.field = V4L2_FIELD_INTERLACED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) struct v4l2_subdev_format format = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) .which = V4L2_SUBDEV_FORMAT_ACTIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) rc = vidioc_try_fmt_vid_cap(file, priv, f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) if (vb2_is_busy(&dev->vidq)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) dev_err(dev->dev, "%s: queue busy\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) /* set new image size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) dev->width = f->fmt.pix.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) dev->height = f->fmt.pix.height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) dev->format = format_by_fourcc(f->fmt.pix.pixelformat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) v4l2_fill_mbus_format(&format.format, &f->fmt.pix, MEDIA_BUS_FMT_FIXED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) call_all(dev, pad, set_fmt, NULL, &format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) v4l2_fill_pix_format(&f->fmt.pix, &format.format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) *id = dev->norm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id norm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) struct v4l2_subdev_format format = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) .which = V4L2_SUBDEV_FORMAT_ACTIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) if (dev->norm == norm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) if (vb2_is_busy(&dev->vidq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) dev->norm = norm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) /* Adjusts width/height, if needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) dev->width = 720;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) dev->height = (dev->norm & V4L2_STD_625_50) ? 576 : 480;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) call_all(dev, video, s_std, dev->norm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) /* We need to reset basic properties in the decoder related to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) resolution (since a standard change effects things like the number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) of lines in VACT, etc) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) format.format.code = MEDIA_BUS_FMT_FIXED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) format.format.width = dev->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) format.format.height = dev->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) call_all(dev, pad, set_fmt, NULL, &format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) /* do mode control overrides */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) cx231xx_do_mode_ctrl_overrides(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) static const char *iname[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) [CX231XX_VMUX_COMPOSITE1] = "Composite1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) [CX231XX_VMUX_SVIDEO] = "S-Video",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) [CX231XX_VMUX_TELEVISION] = "Television",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) [CX231XX_VMUX_CABLE] = "Cable TV",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) [CX231XX_VMUX_DVB] = "DVB",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) void cx231xx_v4l2_create_entities(struct cx231xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) #if defined(CONFIG_MEDIA_CONTROLLER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) /* Create entities for each input connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) for (i = 0; i < MAX_CX231XX_INPUT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) struct media_entity *ent = &dev->input_ent[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) if (!INPUT(i)->type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) ent->name = iname[INPUT(i)->type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) ent->flags = MEDIA_ENT_FL_CONNECTOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) dev->input_pad[i].flags = MEDIA_PAD_FL_SOURCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) switch (INPUT(i)->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) case CX231XX_VMUX_COMPOSITE1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) ent->function = MEDIA_ENT_F_CONN_COMPOSITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) case CX231XX_VMUX_SVIDEO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) ent->function = MEDIA_ENT_F_CONN_SVIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) case CX231XX_VMUX_TELEVISION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) case CX231XX_VMUX_CABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) case CX231XX_VMUX_DVB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) /* The DVB core will handle it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) if (dev->tuner_type == TUNER_ABSENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) default: /* just to shut up a gcc warning */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) ent->function = MEDIA_ENT_F_CONN_RF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) ret = media_entity_pads_init(ent, 1, &dev->input_pad[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) pr_err("failed to initialize input pad[%d]!\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) ret = media_device_register_entity(dev->media_dev, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) pr_err("failed to register input entity %d!\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) int cx231xx_enum_input(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) struct v4l2_input *i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) u32 gen_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) unsigned int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) n = i->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) if (n >= MAX_CX231XX_INPUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) if (0 == INPUT(n)->type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) i->index = n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) i->type = V4L2_INPUT_TYPE_CAMERA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) strscpy(i->name, iname[INPUT(n)->type], sizeof(i->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) if ((CX231XX_VMUX_TELEVISION == INPUT(n)->type) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) (CX231XX_VMUX_CABLE == INPUT(n)->type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) i->type = V4L2_INPUT_TYPE_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) i->std = dev->vdev.tvnorms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) /* If they are asking about the active input, read signal status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) if (n == dev->video_input) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) ret = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) GEN_STAT, 2, &gen_stat, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) if (ret > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) if ((gen_stat & FLD_VPRES) == 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) i->status |= V4L2_IN_ST_NO_SIGNAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) if ((gen_stat & FLD_HLOCK) == 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) i->status |= V4L2_IN_ST_NO_H_LOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) int cx231xx_g_input(struct file *file, void *priv, unsigned int *i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) *i = dev->video_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) int cx231xx_s_input(struct file *file, void *priv, unsigned int i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) dev->mode_tv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) if (i >= MAX_CX231XX_INPUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) if (0 == INPUT(i)->type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) video_mux(dev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) if (INPUT(i)->type == CX231XX_VMUX_TELEVISION ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) INPUT(i)->type == CX231XX_VMUX_CABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) /* There's a tuner, so reset the standard and put it on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) last known frequency (since it was probably powered down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) until now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) call_all(dev, video, s_std, dev->norm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) int cx231xx_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) if (0 != t->index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) strscpy(t->name, "Tuner", sizeof(t->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) t->type = V4L2_TUNER_ANALOG_TV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) t->capability = V4L2_TUNER_CAP_NORM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) t->rangehigh = 0xffffffffUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) t->signal = 0xffff; /* LOCKED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) call_all(dev, tuner, g_tuner, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) int cx231xx_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) if (0 != t->index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) int cx231xx_g_frequency(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) struct v4l2_frequency *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) if (f->tuner)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) f->frequency = dev->ctl_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) int cx231xx_s_frequency(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) const struct v4l2_frequency *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) struct v4l2_frequency new_freq = *f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) int rc, need_if_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) u32 if_frequency = 5400000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) dev_dbg(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) "Enter vidioc_s_frequency()f->frequency=%d;f->type=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) f->frequency, f->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) if (0 != f->tuner)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) /* set pre channel change settings in DIF first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) rc = cx231xx_tuner_pre_channel_change(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) switch (dev->model) { /* i2c device tuners */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) case CX231XX_BOARD_HAUPPAUGE_935C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) case CX231XX_BOARD_HAUPPAUGE_955Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) case CX231XX_BOARD_HAUPPAUGE_975:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) if (dev->cx231xx_set_analog_freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) dev->cx231xx_set_analog_freq(dev, f->frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) dev->ctl_freq = f->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) need_if_freq = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) call_all(dev, tuner, s_frequency, f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) call_all(dev, tuner, g_frequency, &new_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) dev->ctl_freq = new_freq.frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) pr_debug("%s() %u : %u\n", __func__, f->frequency, dev->ctl_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) /* set post channel change settings in DIF first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) rc = cx231xx_tuner_post_channel_change(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) if (need_if_freq || dev->tuner_type == TUNER_NXP_TDA18271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) if (dev->norm & (V4L2_STD_MN | V4L2_STD_NTSC_443))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) if_frequency = 5400000; /*5.4MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) else if (dev->norm & V4L2_STD_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) if_frequency = 6000000; /*6.0MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) else if (dev->norm & (V4L2_STD_PAL_DK | V4L2_STD_SECAM_DK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) if_frequency = 6900000; /*6.9MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) else if (dev->norm & V4L2_STD_GH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) if_frequency = 7100000; /*7.1MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) else if (dev->norm & V4L2_STD_PAL_I)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) if_frequency = 7250000; /*7.25MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) else if (dev->norm & V4L2_STD_SECAM_L)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) if_frequency = 6900000; /*6.9MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) else if (dev->norm & V4L2_STD_SECAM_LC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) if_frequency = 1250000; /*1.25MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) dev_dbg(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) "if_frequency is set to %d\n", if_frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) cx231xx_set_Colibri_For_LowIF(dev, if_frequency, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) update_HH_register_after_set_DIF(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) dev_dbg(dev->dev, "Set New FREQUENCY to %d\n", f->frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) #ifdef CONFIG_VIDEO_ADV_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) int cx231xx_g_chip_info(struct file *file, void *fh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) struct v4l2_dbg_chip_info *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) switch (chip->match.addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) case 0: /* Cx231xx - internal registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) case 1: /* AFE - read byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) strscpy(chip->name, "AFE (byte)", sizeof(chip->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) case 2: /* Video Block - read byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) strscpy(chip->name, "Video (byte)", sizeof(chip->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) case 3: /* I2S block - read byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) strscpy(chip->name, "I2S (byte)", sizeof(chip->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) case 4: /* AFE - read dword */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) strscpy(chip->name, "AFE (dword)", sizeof(chip->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) case 5: /* Video Block - read dword */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) strscpy(chip->name, "Video (dword)", sizeof(chip->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) case 6: /* I2S Block - read dword */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) strscpy(chip->name, "I2S (dword)", sizeof(chip->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) int cx231xx_g_register(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) struct v4l2_dbg_register *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) u8 value[4] = { 0, 0, 0, 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) u32 data = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) switch (reg->match.addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) case 0: /* Cx231xx - internal registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) ret = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) (u16)reg->reg, value, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) reg->val = value[0] | value[1] << 8 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) value[2] << 16 | (u32)value[3] << 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) reg->size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) case 1: /* AFE - read byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) ret = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) (u16)reg->reg, 2, &data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) reg->val = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) reg->size = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) case 2: /* Video Block - read byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) ret = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) (u16)reg->reg, 2, &data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) reg->val = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) reg->size = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) case 3: /* I2S block - read byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) ret = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) (u16)reg->reg, 1, &data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) reg->val = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) reg->size = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) case 4: /* AFE - read dword */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) ret = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) (u16)reg->reg, 2, &data, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) reg->val = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) reg->size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) case 5: /* Video Block - read dword */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) ret = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) (u16)reg->reg, 2, &data, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) reg->val = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) reg->size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) case 6: /* I2S Block - read dword */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) ret = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) (u16)reg->reg, 1, &data, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) reg->val = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) reg->size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) return ret < 0 ? ret : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) int cx231xx_s_register(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) const struct v4l2_dbg_register *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) u8 data[4] = { 0, 0, 0, 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) switch (reg->match.addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) case 0: /* cx231xx internal registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) data[0] = (u8) reg->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) data[1] = (u8) (reg->val >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) data[2] = (u8) (reg->val >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) data[3] = (u8) (reg->val >> 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) ret = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) (u16)reg->reg, data, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) case 1: /* AFE - write byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) ret = cx231xx_write_i2c_data(dev, AFE_DEVICE_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) (u16)reg->reg, 2, reg->val, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) case 2: /* Video Block - write byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) ret = cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) (u16)reg->reg, 2, reg->val, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) case 3: /* I2S block - write byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) ret = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) (u16)reg->reg, 1, reg->val, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) case 4: /* AFE - write dword */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) ret = cx231xx_write_i2c_data(dev, AFE_DEVICE_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) (u16)reg->reg, 2, reg->val, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) case 5: /* Video Block - write dword */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) ret = cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) (u16)reg->reg, 2, reg->val, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) case 6: /* I2S block - write dword */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) ret = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) (u16)reg->reg, 1, reg->val, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) return ret < 0 ? ret : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) static int vidioc_g_pixelaspect(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) int type, struct v4l2_fract *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) bool is_50hz = dev->norm & V4L2_STD_625_50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) f->numerator = is_50hz ? 54 : 11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) f->denominator = is_50hz ? 59 : 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) static int vidioc_g_selection(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) struct v4l2_selection *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) switch (s->target) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) case V4L2_SEL_TGT_CROP_BOUNDS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) case V4L2_SEL_TGT_CROP_DEFAULT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) s->r.left = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) s->r.top = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) s->r.width = dev->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) s->r.height = dev->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) int cx231xx_querycap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) struct v4l2_capability *cap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) strscpy(cap->driver, "cx231xx", sizeof(cap->driver));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) strscpy(cap->card, cx231xx_boards[dev->model].name, sizeof(cap->card));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) cap->capabilities = V4L2_CAP_READWRITE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) V4L2_CAP_VBI_CAPTURE | V4L2_CAP_VIDEO_CAPTURE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) V4L2_CAP_STREAMING | V4L2_CAP_DEVICE_CAPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) if (video_is_registered(&dev->radio_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) cap->capabilities |= V4L2_CAP_RADIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) switch (dev->model) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) case CX231XX_BOARD_HAUPPAUGE_935C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) case CX231XX_BOARD_HAUPPAUGE_955Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) case CX231XX_BOARD_HAUPPAUGE_975:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) cap->capabilities |= V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) if (dev->tuner_type != TUNER_ABSENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) cap->capabilities |= V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) struct v4l2_fmtdesc *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) if (unlikely(f->index >= ARRAY_SIZE(format)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) f->pixelformat = format[f->index].fourcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) /* RAW VBI ioctls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) static int vidioc_g_fmt_vbi_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) f->fmt.vbi.sampling_rate = 6750000 * 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) f->fmt.vbi.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) f->fmt.vbi.start[0] = (dev->norm & V4L2_STD_625_50) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) PAL_VBI_START_LINE : NTSC_VBI_START_LINE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) f->fmt.vbi.count[0] = (dev->norm & V4L2_STD_625_50) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) PAL_VBI_LINES : NTSC_VBI_LINES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) f->fmt.vbi.start[1] = (dev->norm & V4L2_STD_625_50) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) PAL_VBI_START_LINE + 312 : NTSC_VBI_START_LINE + 263;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) f->fmt.vbi.count[1] = f->fmt.vbi.count[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) memset(f->fmt.vbi.reserved, 0, sizeof(f->fmt.vbi.reserved));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) static int vidioc_try_fmt_vbi_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) f->fmt.vbi.sampling_rate = 6750000 * 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) f->fmt.vbi.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) f->fmt.vbi.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) f->fmt.vbi.start[0] = (dev->norm & V4L2_STD_625_50) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) PAL_VBI_START_LINE : NTSC_VBI_START_LINE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) f->fmt.vbi.count[0] = (dev->norm & V4L2_STD_625_50) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) PAL_VBI_LINES : NTSC_VBI_LINES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) f->fmt.vbi.start[1] = (dev->norm & V4L2_STD_625_50) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) PAL_VBI_START_LINE + 312 : NTSC_VBI_START_LINE + 263;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) f->fmt.vbi.count[1] = f->fmt.vbi.count[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) memset(f->fmt.vbi.reserved, 0, sizeof(f->fmt.vbi.reserved));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) static int vidioc_s_fmt_vbi_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) return vidioc_try_fmt_vbi_cap(file, priv, f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) /* ----------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) /* RADIO ESPECIFIC IOCTLS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) /* ----------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) static int radio_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) if (t->index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) strscpy(t->name, "Radio", sizeof(t->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) call_all(dev, tuner, g_tuner, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) static int radio_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) struct cx231xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) if (t->index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) call_all(dev, tuner, s_tuner, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) * cx231xx_v4l2_open()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) * inits the device and starts isoc transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) static int cx231xx_v4l2_open(struct file *filp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) struct video_device *vdev = video_devdata(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) struct cx231xx *dev = video_drvdata(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) if (mutex_lock_interruptible(&dev->lock))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) return -ERESTARTSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) ret = v4l2_fh_open(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) if (dev->users++ == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) /* Power up in Analog TV mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) if (dev->board.external_av)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) cx231xx_set_power_mode(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) POLARIS_AVMODE_ENXTERNAL_AV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) /* set video alternate setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) cx231xx_set_video_alternate(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) /* Needed, since GPIO might have disabled power of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) some i2c device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) cx231xx_config_i2c(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) /* device needs to be initialized before isoc transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) dev->video_input = dev->video_input > 2 ? 2 : dev->video_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) if (vdev->vfl_type == VFL_TYPE_RADIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) cx231xx_videodbg("video_open: setting radio device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) /* cx231xx_start_radio(dev); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) call_all(dev, tuner, s_radio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) if (vdev->vfl_type == VFL_TYPE_VBI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) /* Set the required alternate setting VBI interface works in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) Bulk mode only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) cx231xx_set_alt_setting(dev, INDEX_VANC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) * cx231xx_realease_resources()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) * unregisters the v4l2,i2c and usb devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) * called when the device gets disconnected or at module unload
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) void cx231xx_release_analog_resources(struct cx231xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) /*FIXME: I2C IR should be disconnected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) if (video_is_registered(&dev->radio_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) video_unregister_device(&dev->radio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) if (video_is_registered(&dev->vbi_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) dev_info(dev->dev, "V4L2 device %s deregistered\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) video_device_node_name(&dev->vbi_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) video_unregister_device(&dev->vbi_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) if (video_is_registered(&dev->vdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) dev_info(dev->dev, "V4L2 device %s deregistered\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) video_device_node_name(&dev->vdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) if (dev->board.has_417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) cx231xx_417_unregister(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) video_unregister_device(&dev->vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) v4l2_ctrl_handler_free(&dev->ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) v4l2_ctrl_handler_free(&dev->radio_ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) * cx231xx_close()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) * stops streaming and deallocates all resources allocated by the v4l2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) * calls and ioctls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) static int cx231xx_close(struct file *filp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) struct cx231xx *dev = video_drvdata(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) struct video_device *vdev = video_devdata(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) _vb2_fop_release(filp, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) if (--dev->users == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) /* Save some power by putting tuner to sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) call_all(dev, tuner, standby);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) /* do this before setting alternate! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) if (dev->USE_ISO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) cx231xx_uninit_isoc(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) cx231xx_uninit_bulk(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) cx231xx_set_mode(dev, CX231XX_SUSPEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) * To workaround error number=-71 on EP0 for VideoGrabber,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) * need exclude following.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) * FIXME: It is probably safe to remove most of these, as we're
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) * now avoiding the alternate setting for INDEX_VANC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) if (!dev->board.no_alt_vanc && vdev->vfl_type == VFL_TYPE_VBI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) /* do this before setting alternate! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) cx231xx_uninit_vbi_isoc(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) /* set alternate 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) if (!dev->vbi_or_sliced_cc_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) cx231xx_set_alt_setting(dev, INDEX_VANC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) cx231xx_set_alt_setting(dev, INDEX_HANC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) wake_up_interruptible_nr(&dev->open, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) if (dev->users == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) /* set alternate 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) wake_up_interruptible(&dev->open);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) static int cx231xx_v4l2_close(struct file *filp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) struct cx231xx *dev = video_drvdata(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) mutex_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) rc = cx231xx_close(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) static const struct v4l2_file_operations cx231xx_v4l_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) .open = cx231xx_v4l2_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) .release = cx231xx_v4l2_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) .read = vb2_fop_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) .poll = vb2_fop_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) .mmap = vb2_fop_mmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) .unlocked_ioctl = video_ioctl2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) static const struct v4l2_ioctl_ops video_ioctl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) .vidioc_querycap = cx231xx_querycap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) .vidioc_g_fmt_vbi_cap = vidioc_g_fmt_vbi_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) .vidioc_try_fmt_vbi_cap = vidioc_try_fmt_vbi_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) .vidioc_s_fmt_vbi_cap = vidioc_s_fmt_vbi_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) .vidioc_g_pixelaspect = vidioc_g_pixelaspect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) .vidioc_g_selection = vidioc_g_selection,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) .vidioc_reqbufs = vb2_ioctl_reqbufs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) .vidioc_querybuf = vb2_ioctl_querybuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) .vidioc_qbuf = vb2_ioctl_qbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) .vidioc_dqbuf = vb2_ioctl_dqbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) .vidioc_s_std = vidioc_s_std,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) .vidioc_g_std = vidioc_g_std,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) .vidioc_enum_input = cx231xx_enum_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) .vidioc_g_input = cx231xx_g_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) .vidioc_s_input = cx231xx_s_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) .vidioc_streamon = vb2_ioctl_streamon,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) .vidioc_streamoff = vb2_ioctl_streamoff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) .vidioc_g_tuner = cx231xx_g_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) .vidioc_s_tuner = cx231xx_s_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) .vidioc_g_frequency = cx231xx_g_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) .vidioc_s_frequency = cx231xx_s_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) #ifdef CONFIG_VIDEO_ADV_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) .vidioc_g_chip_info = cx231xx_g_chip_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) .vidioc_g_register = cx231xx_g_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) .vidioc_s_register = cx231xx_s_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) static struct video_device cx231xx_vbi_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) static const struct video_device cx231xx_video_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) .fops = &cx231xx_v4l_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) .release = video_device_release_empty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) .ioctl_ops = &video_ioctl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) .tvnorms = V4L2_STD_ALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) static const struct v4l2_file_operations radio_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) .open = cx231xx_v4l2_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) .release = cx231xx_v4l2_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) .poll = v4l2_ctrl_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) .unlocked_ioctl = video_ioctl2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) static const struct v4l2_ioctl_ops radio_ioctl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) .vidioc_querycap = cx231xx_querycap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) .vidioc_g_tuner = radio_g_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) .vidioc_s_tuner = radio_s_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) .vidioc_g_frequency = cx231xx_g_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) .vidioc_s_frequency = cx231xx_s_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) #ifdef CONFIG_VIDEO_ADV_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) .vidioc_g_chip_info = cx231xx_g_chip_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) .vidioc_g_register = cx231xx_g_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) .vidioc_s_register = cx231xx_s_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) static struct video_device cx231xx_radio_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) .name = "cx231xx-radio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) .fops = &radio_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) .ioctl_ops = &radio_ioctl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) /******************************** usb interface ******************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) static void cx231xx_vdev_init(struct cx231xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) struct video_device *vfd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) const struct video_device *template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) const char *type_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) *vfd = *template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) vfd->v4l2_dev = &dev->v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) vfd->release = video_device_release_empty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) vfd->lock = &dev->lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) snprintf(vfd->name, sizeof(vfd->name), "%s %s", dev->name, type_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) video_set_drvdata(vfd, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) if (dev->tuner_type == TUNER_ABSENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) switch (dev->model) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) case CX231XX_BOARD_HAUPPAUGE_935C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) case CX231XX_BOARD_HAUPPAUGE_955Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) case CX231XX_BOARD_HAUPPAUGE_975:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) v4l2_disable_ioctl(vfd, VIDIOC_G_FREQUENCY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) v4l2_disable_ioctl(vfd, VIDIOC_S_FREQUENCY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) v4l2_disable_ioctl(vfd, VIDIOC_G_TUNER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) v4l2_disable_ioctl(vfd, VIDIOC_S_TUNER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) int cx231xx_register_analog_devices(struct cx231xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) struct vb2_queue *q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) dev_info(dev->dev, "v4l2 driver version %s\n", CX231XX_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) /* set default norm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) dev->norm = V4L2_STD_PAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) dev->width = norm_maxw(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) dev->height = norm_maxh(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) dev->interlaced = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) /* Analog specific initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) dev->format = &format[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) /* Set the initial input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) video_mux(dev, dev->video_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) call_all(dev, video, s_std, dev->norm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) v4l2_ctrl_handler_init(&dev->ctrl_handler, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) v4l2_ctrl_handler_init(&dev->radio_ctrl_handler, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) if (dev->sd_cx25840) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) v4l2_ctrl_add_handler(&dev->ctrl_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) dev->sd_cx25840->ctrl_handler, NULL, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) v4l2_ctrl_add_handler(&dev->radio_ctrl_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) dev->sd_cx25840->ctrl_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) v4l2_ctrl_radio_filter, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) if (dev->ctrl_handler.error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) return dev->ctrl_handler.error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) if (dev->radio_ctrl_handler.error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) return dev->radio_ctrl_handler.error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) /* enable vbi capturing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) /* write code here... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) /* allocate and fill video video_device struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) cx231xx_vdev_init(dev, &dev->vdev, &cx231xx_video_template, "video");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) #if defined(CONFIG_MEDIA_CONTROLLER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) dev->video_pad.flags = MEDIA_PAD_FL_SINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) ret = media_entity_pads_init(&dev->vdev.entity, 1, &dev->video_pad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) dev_err(dev->dev, "failed to initialize video media entity!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) dev->vdev.ctrl_handler = &dev->ctrl_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) q = &dev->vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) q->io_modes = VB2_USERPTR | VB2_MMAP | VB2_DMABUF | VB2_READ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) q->drv_priv = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) q->buf_struct_size = sizeof(struct cx231xx_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) q->ops = &cx231xx_video_qops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) q->mem_ops = &vb2_vmalloc_memops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) q->min_buffers_needed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) q->lock = &dev->lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) ret = vb2_queue_init(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) dev->vdev.queue = q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) dev->vdev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) V4L2_CAP_VIDEO_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) switch (dev->model) { /* i2c device tuners */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) case CX231XX_BOARD_HAUPPAUGE_935C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) case CX231XX_BOARD_HAUPPAUGE_955Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) case CX231XX_BOARD_HAUPPAUGE_975:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) dev->vdev.device_caps |= V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) if (dev->tuner_type != TUNER_ABSENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) dev->vdev.device_caps |= V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) /* register v4l2 video video_device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) ret = video_register_device(&dev->vdev, VFL_TYPE_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) video_nr[dev->devno]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) dev_err(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) "unable to register video device (error=%i).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) dev_info(dev->dev, "Registered video device %s [v4l2]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) video_device_node_name(&dev->vdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) /* Initialize VBI template */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) cx231xx_vbi_template = cx231xx_video_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) strscpy(cx231xx_vbi_template.name, "cx231xx-vbi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) sizeof(cx231xx_vbi_template.name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) /* Allocate and fill vbi video_device struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) cx231xx_vdev_init(dev, &dev->vbi_dev, &cx231xx_vbi_template, "vbi");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) #if defined(CONFIG_MEDIA_CONTROLLER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) dev->vbi_pad.flags = MEDIA_PAD_FL_SINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) ret = media_entity_pads_init(&dev->vbi_dev.entity, 1, &dev->vbi_pad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) dev_err(dev->dev, "failed to initialize vbi media entity!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) dev->vbi_dev.ctrl_handler = &dev->ctrl_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) q = &dev->vbiq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) q->io_modes = VB2_USERPTR | VB2_MMAP | VB2_DMABUF | VB2_READ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) q->drv_priv = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) q->buf_struct_size = sizeof(struct cx231xx_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) q->ops = &cx231xx_vbi_qops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) q->mem_ops = &vb2_vmalloc_memops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) q->min_buffers_needed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) q->lock = &dev->lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) ret = vb2_queue_init(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) dev->vbi_dev.queue = q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) dev->vbi_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) V4L2_CAP_VBI_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) switch (dev->model) { /* i2c device tuners */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) case CX231XX_BOARD_HAUPPAUGE_935C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) case CX231XX_BOARD_HAUPPAUGE_955Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) case CX231XX_BOARD_HAUPPAUGE_975:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) dev->vbi_dev.device_caps |= V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) if (dev->tuner_type != TUNER_ABSENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) dev->vbi_dev.device_caps |= V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) /* register v4l2 vbi video_device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) ret = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) vbi_nr[dev->devno]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) dev_err(dev->dev, "unable to register vbi device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) dev_info(dev->dev, "Registered VBI device %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) video_device_node_name(&dev->vbi_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) if (cx231xx_boards[dev->model].radio.type == CX231XX_RADIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) cx231xx_vdev_init(dev, &dev->radio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) &cx231xx_radio_template, "radio");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) dev->radio_dev.ctrl_handler = &dev->radio_ctrl_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) dev->radio_dev.device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) ret = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) radio_nr[dev->devno]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) dev_err(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) "can't register radio device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) dev_info(dev->dev, "Registered radio device as %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) video_device_node_name(&dev->radio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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