Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)    cx231xx-i2c.c - driver for Conexant Cx23100/101/102 USB video capture devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)    Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 		Based on em28xx driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 		Based on Cx23885 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include "cx231xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/i2c-mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <media/tuner.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) /* ----------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) static unsigned int i2c_scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) module_param(i2c_scan, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) MODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static unsigned int i2c_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) module_param(i2c_debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) MODULE_PARM_DESC(i2c_debug, "enable debug messages [i2c]");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define dprintk1(lvl, fmt, args...)			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) do {							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	if (i2c_debug >= lvl) {				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		printk(fmt, ##args);			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		}					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define dprintk2(lvl, fmt, args...)			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) do {							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	if (i2c_debug >= lvl) {				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		printk(KERN_DEBUG "%s at %s: " fmt,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		       dev->name, __func__ , ##args);	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)       }							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static inline int get_real_i2c_port(struct cx231xx *dev, int bus_nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	if (bus_nr == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		return dev->port_3_switch_enabled ? I2C_1_MUX_3 : I2C_1_MUX_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	return bus_nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static inline bool is_tuner(struct cx231xx *dev, struct cx231xx_i2c *bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 			const struct i2c_msg *msg, int tuner_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	int i2c_port = get_real_i2c_port(dev, bus->nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	if (i2c_port != dev->board.tuner_i2c_master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (msg->addr != dev->board.tuner_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	if (dev->tuner_type != tuner_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  * cx231xx_i2c_send_bytes()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static int cx231xx_i2c_send_bytes(struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 				  const struct i2c_msg *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct cx231xx_i2c *bus = i2c_adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct cx231xx *dev = bus->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	struct cx231xx_i2c_xfer_data req_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	u16 size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	u8 loop = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	u8 saddr_len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	u8 *buf_ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	u16 saddr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	u8 need_gpio = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	if (is_tuner(dev, bus, msg, TUNER_XC5000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		size = msg->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		if (size == 2) {	/* register write sub addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			/* Just writing sub address will cause problem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			* to XC5000. So ignore the request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		} else if (size == 4) {	/* register write with sub addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 			if (msg->len >= 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 				saddr = msg->buf[0] << 8 | msg->buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 			else if (msg->len == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 				saddr = msg->buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			switch (saddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			case 0x0000:	/* start tuner calibration mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				need_gpio = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				/* FW Loading is done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 				dev->xc_fw_load_done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			case 0x000D:	/* Set signal source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			case 0x0001:	/* Set TV standard - Video */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			case 0x0002:	/* Set TV standard - Audio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			case 0x0003:	/* Set RF Frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 				need_gpio = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 				if (dev->xc_fw_load_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 					need_gpio = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			if (need_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 				dprintk1(1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 				"GPIO WRITE: addr 0x%x, len %d, saddr 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 				msg->addr, msg->len, saddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 				return dev->cx231xx_gpio_i2c_write(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 								   msg->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 								   msg->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 								   msg->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		/* special case for Xc5000 tuner case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		saddr_len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		/* adjust the length to correct length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		size -= saddr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		buf_ptr = (u8 *) (msg->buf + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			/* prepare xfer_data struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			req_data.dev_addr = msg->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			req_data.direction = msg->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			req_data.saddr_len = saddr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			req_data.saddr_dat = msg->buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			req_data.buf_size = size > 16 ? 16 : size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			req_data.p_buffer = (u8 *) (buf_ptr + loop * 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			bus->i2c_nostop = (size > 16) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 			bus->i2c_reserve = (loop == 0) ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 			/* usb send command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 			status = dev->cx231xx_send_usb_command(bus, &req_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			loop++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			if (size >= 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 				size -= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 				size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		} while (size > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		bus->i2c_nostop = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		bus->i2c_reserve = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	} else {		/* regular case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		/* prepare xfer_data struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		req_data.dev_addr = msg->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		req_data.direction = msg->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		req_data.saddr_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		req_data.saddr_dat = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		req_data.buf_size = msg->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		req_data.p_buffer = msg->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		/* usb send command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		status = dev->cx231xx_send_usb_command(bus, &req_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	return status < 0 ? status : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)  * cx231xx_i2c_recv_bytes()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)  * read a byte from the i2c device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static int cx231xx_i2c_recv_bytes(struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 				  const struct i2c_msg *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	struct cx231xx_i2c *bus = i2c_adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	struct cx231xx *dev = bus->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	struct cx231xx_i2c_xfer_data req_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	u16 saddr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	u8 need_gpio = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	if (is_tuner(dev, bus, msg, TUNER_XC5000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		if (msg->len == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 			saddr = msg->buf[0] << 8 | msg->buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		else if (msg->len == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			saddr = msg->buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		if (dev->xc_fw_load_done) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			switch (saddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			case 0x0009:	/* BUSY check */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 				dprintk1(1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 				"GPIO R E A D: Special case BUSY check \n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 				/*Try read BUSY register, just set it to zero*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 				msg->buf[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 				if (msg->len == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 					msg->buf[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 			case 0x0004:	/* read Lock status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 				need_gpio = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			if (need_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 				/* this is a special case to handle Xceive tuner
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 				clock stretch issue with gpio based I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 				dprintk1(1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 				"GPIO R E A D: addr 0x%x, len %d, saddr 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 				msg->addr, msg->len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 				msg->buf[0] << 8 | msg->buf[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 				status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 				    dev->cx231xx_gpio_i2c_write(dev, msg->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 								msg->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 								msg->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 				status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 				    dev->cx231xx_gpio_i2c_read(dev, msg->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 							       msg->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 							       msg->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 				return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		/* prepare xfer_data struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		req_data.dev_addr = msg->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		req_data.direction = msg->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		req_data.saddr_len = msg->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		req_data.saddr_dat = msg->buf[0] << 8 | msg->buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		req_data.buf_size = msg->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		req_data.p_buffer = msg->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		/* usb send command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		status = dev->cx231xx_send_usb_command(bus, &req_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		/* prepare xfer_data struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		req_data.dev_addr = msg->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		req_data.direction = msg->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		req_data.saddr_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		req_data.saddr_dat = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		req_data.buf_size = msg->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		req_data.p_buffer = msg->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		/* usb send command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		status = dev->cx231xx_send_usb_command(bus, &req_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	return status < 0 ? status : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)  * cx231xx_i2c_recv_bytes_with_saddr()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)  * read a byte from the i2c device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static int cx231xx_i2c_recv_bytes_with_saddr(struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 					     const struct i2c_msg *msg1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 					     const struct i2c_msg *msg2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	struct cx231xx_i2c *bus = i2c_adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	struct cx231xx *dev = bus->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	struct cx231xx_i2c_xfer_data req_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	u16 saddr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	u8 need_gpio = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	if (msg1->len == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		saddr = msg1->buf[0] << 8 | msg1->buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	else if (msg1->len == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		saddr = msg1->buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	if (is_tuner(dev, bus, msg2, TUNER_XC5000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		if ((msg2->len < 16)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 			dprintk1(1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 			"i2c_read: addr 0x%x, len %d, saddr 0x%x, len %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			msg2->addr, msg2->len, saddr, msg1->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 			switch (saddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 			case 0x0008:	/* read FW load status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 				need_gpio = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 			case 0x0004:	/* read Lock status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 				need_gpio = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 			if (need_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 				status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 				    dev->cx231xx_gpio_i2c_write(dev, msg1->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 								msg1->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 								msg1->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 				status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 				    dev->cx231xx_gpio_i2c_read(dev, msg2->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 							       msg2->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 							       msg2->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 				return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	/* prepare xfer_data struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	req_data.dev_addr = msg2->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	req_data.direction = msg2->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	req_data.saddr_len = msg1->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	req_data.saddr_dat = saddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	req_data.buf_size = msg2->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	req_data.p_buffer = msg2->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	/* usb send command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	status = dev->cx231xx_send_usb_command(bus, &req_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	return status < 0 ? status : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)  * cx231xx_i2c_check_for_device()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)  * check if there is a i2c_device at the supplied address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static int cx231xx_i2c_check_for_device(struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 					const struct i2c_msg *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	struct cx231xx_i2c *bus = i2c_adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	struct cx231xx *dev = bus->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	struct cx231xx_i2c_xfer_data req_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	u8 buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	/* prepare xfer_data struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	req_data.dev_addr = msg->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	req_data.direction = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	req_data.saddr_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	req_data.saddr_dat = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	req_data.buf_size = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	req_data.p_buffer = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	/* usb send command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	status = dev->cx231xx_send_usb_command(bus, &req_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	return status < 0 ? status : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)  * cx231xx_i2c_xfer()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)  * the main i2c transfer function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static int cx231xx_i2c_xfer(struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 			    struct i2c_msg msgs[], int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	struct cx231xx_i2c *bus = i2c_adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	struct cx231xx *dev = bus->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	int addr, rc, i, byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	mutex_lock(&dev->i2c_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	for (i = 0; i < num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		addr = msgs[i].addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 		dprintk2(2, "%s %s addr=0x%x len=%d:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 			 (msgs[i].flags & I2C_M_RD) ? "read" : "write",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 			 i == num - 1 ? "stop" : "nonstop", addr, msgs[i].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 		if (!msgs[i].len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 			/* no len: check only for device presence */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 			rc = cx231xx_i2c_check_for_device(i2c_adap, &msgs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 			if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 				dprintk2(2, " no device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 				mutex_unlock(&dev->i2c_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 				return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		} else if (msgs[i].flags & I2C_M_RD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 			/* read bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 			rc = cx231xx_i2c_recv_bytes(i2c_adap, &msgs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 			if (i2c_debug >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 				for (byte = 0; byte < msgs[i].len; byte++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 					printk(KERN_CONT " %02x", msgs[i].buf[byte]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		} else if (i + 1 < num && (msgs[i + 1].flags & I2C_M_RD) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 			   msgs[i].addr == msgs[i + 1].addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 			   && (msgs[i].len <= 2) && (bus->nr < 3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 			/* write bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 			if (i2c_debug >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 				for (byte = 0; byte < msgs[i].len; byte++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 					printk(KERN_CONT " %02x", msgs[i].buf[byte]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 				printk(KERN_CONT "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 			/* read bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 			dprintk2(2, "plus %s %s addr=0x%x len=%d:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 				(msgs[i+1].flags & I2C_M_RD) ? "read" : "write",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 				i+1 == num - 1 ? "stop" : "nonstop", addr, msgs[i+1].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 			rc = cx231xx_i2c_recv_bytes_with_saddr(i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 							       &msgs[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 							       &msgs[i + 1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 			if (i2c_debug >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 				for (byte = 0; byte < msgs[i+1].len; byte++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 					printk(KERN_CONT " %02x", msgs[i+1].buf[byte]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 			i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 			/* write bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 			if (i2c_debug >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 				for (byte = 0; byte < msgs[i].len; byte++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 					printk(KERN_CONT " %02x", msgs[i].buf[byte]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 			rc = cx231xx_i2c_send_bytes(i2c_adap, &msgs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 		if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 		if (i2c_debug >= 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 			printk(KERN_CONT "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	mutex_unlock(&dev->i2c_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	return num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	dprintk2(2, " ERROR: %i\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	mutex_unlock(&dev->i2c_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /* ----------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)  * functionality()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static u32 functionality(struct i2c_adapter *adap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static const struct i2c_algorithm cx231xx_algo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	.master_xfer = cx231xx_i2c_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	.functionality = functionality,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static const struct i2c_adapter cx231xx_adap_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	.name = "cx231xx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	.algo = &cx231xx_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /* ----------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)  * i2c_devs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)  * incomplete list of known devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static const char *i2c_devs[128] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	[0x20 >> 1] = "demod",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	[0x60 >> 1] = "colibri",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	[0x88 >> 1] = "hammerhead",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	[0x8e >> 1] = "CIR",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	[0x32 >> 1] = "GeminiIII",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	[0x02 >> 1] = "Aquarius",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	[0xa0 >> 1] = "eeprom",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	[0xc0 >> 1] = "tuner",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	[0xc2 >> 1] = "tuner",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)  * cx231xx_do_i2c_scan()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)  * check i2c address range for devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) void cx231xx_do_i2c_scan(struct cx231xx *dev, int i2c_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	unsigned char buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	int i, rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	struct i2c_adapter *adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	struct i2c_msg msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 		.flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 		.len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 		.buf = &buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	if (!i2c_scan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	/* Don't generate I2C errors during scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	dev->i2c_scan_running = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	adap = cx231xx_get_i2c_adap(dev, i2c_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	for (i = 0; i < 128; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 		msg.addr = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 		rc = i2c_transfer(adap, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 		if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 		dev_info(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 			 "i2c scan: found device @ port %d addr 0x%x  [%s]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 			 i2c_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 			 i << 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 			 i2c_devs[i] ? i2c_devs[i] : "???");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	dev->i2c_scan_running = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)  * cx231xx_i2c_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)  * register i2c bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) int cx231xx_i2c_register(struct cx231xx_i2c *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	struct cx231xx *dev = bus->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 	if (!dev->cx231xx_send_usb_command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	bus->i2c_adap = cx231xx_adap_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	bus->i2c_adap.dev.parent = dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	snprintf(bus->i2c_adap.name, sizeof(bus->i2c_adap.name), "%s-%d", bus->dev->name, bus->nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 	bus->i2c_adap.algo_data = bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	i2c_set_adapdata(&bus->i2c_adap, &dev->v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	bus->i2c_rc = i2c_add_adapter(&bus->i2c_adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	if (0 != bus->i2c_rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 		dev_warn(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 			 "i2c bus %d register FAILED\n", bus->nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	return bus->i2c_rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)  * cx231xx_i2c_unregister()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)  * unregister i2c_bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) void cx231xx_i2c_unregister(struct cx231xx_i2c *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	if (!bus->i2c_rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 		i2c_del_adapter(&bus->i2c_adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)  * cx231xx_i2c_mux_select()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)  * switch i2c master number 1 between port1 and port3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) static int cx231xx_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	struct cx231xx *dev = i2c_mux_priv(muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	return cx231xx_enable_i2c_port_3(dev, chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) int cx231xx_i2c_mux_create(struct cx231xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	dev->muxc = i2c_mux_alloc(&dev->i2c_bus[1].i2c_adap, dev->dev, 2, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 				  cx231xx_i2c_mux_select, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	if (!dev->muxc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 	dev->muxc->priv = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) int cx231xx_i2c_mux_register(struct cx231xx *dev, int mux_no)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 	return i2c_mux_add_adapter(dev->muxc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 				   0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 				   mux_no /* chan_id */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 				   0 /* class */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) void cx231xx_i2c_mux_unregister(struct cx231xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 	i2c_mux_del_adapters(dev->muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) struct i2c_adapter *cx231xx_get_i2c_adap(struct cx231xx *dev, int i2c_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 	switch (i2c_port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 	case I2C_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 		return &dev->i2c_bus[0].i2c_adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 	case I2C_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 		return &dev->i2c_bus[1].i2c_adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 	case I2C_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 		return &dev->i2c_bus[2].i2c_adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 	case I2C_1_MUX_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 		return dev->muxc->adapter[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 	case I2C_1_MUX_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 		return dev->muxc->adapter[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 		BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) EXPORT_SYMBOL_GPL(cx231xx_get_i2c_adap);