^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Filename: cpia2.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2001, STMicrolectronics, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Contact: steve.miller@st.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * This is a USB driver for CPiA2 based video cameras.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * This driver is modelled on the cpia usb driver by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Jochen Scharrlach and Johannes Erdfeldt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifndef __CPIA2_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define __CPIA2_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include "cpia2_registers.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* define for verbose debug output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) //#define _CPIA2_DEBUG_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /***
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Image defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ***/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* Misc constants */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define ALLOW_CORRUPT 0 /* Causes collater to discard checksum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* USB Transfer mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define XFER_ISOC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define XFER_BULK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* USB Alternates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define USBIF_CMDONLY 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define USBIF_BULK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define USBIF_ISO_1 2 /* 128 bytes/ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define USBIF_ISO_2 3 /* 384 bytes/ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define USBIF_ISO_3 4 /* 640 bytes/ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define USBIF_ISO_4 5 /* 768 bytes/ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define USBIF_ISO_5 6 /* 896 bytes/ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define USBIF_ISO_6 7 /* 1023 bytes/ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* Flicker Modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define NEVER_FLICKER 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define FLICKER_60 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define FLICKER_50 50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Debug flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define DEBUG_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define DEBUG_REG 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define DEBUG_DUMP_PATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define DEBUG_DUMP_REGS 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /***
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * Video frame sizes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ***/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) VIDEOSIZE_VGA = 0, /* 640x480 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) VIDEOSIZE_CIF, /* 352x288 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) VIDEOSIZE_QVGA, /* 320x240 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) VIDEOSIZE_QCIF, /* 176x144 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) VIDEOSIZE_288_216,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) VIDEOSIZE_256_192,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) VIDEOSIZE_224_168,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) VIDEOSIZE_192_144,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define STV_IMAGE_CIF_ROWS 288
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define STV_IMAGE_CIF_COLS 352
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define STV_IMAGE_QCIF_ROWS 144
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define STV_IMAGE_QCIF_COLS 176
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define STV_IMAGE_VGA_ROWS 480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define STV_IMAGE_VGA_COLS 640
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define STV_IMAGE_QVGA_ROWS 240
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define STV_IMAGE_QVGA_COLS 320
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define JPEG_MARKER_COM (1<<6) /* Comment segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /***
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * Enums
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ***/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* Sensor types available with cpia2 asics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) enum sensors {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) CPIA2_SENSOR_410,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) CPIA2_SENSOR_500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* Asic types available in the CPiA2 architecture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define CPIA2_ASIC_672 0x67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Device types (stv672, stv676, etc) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define DEVICE_STV_672 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define DEVICE_STV_676 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) enum frame_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) FRAME_EMPTY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) FRAME_READING, /* In the process of being grabbed into */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) FRAME_READY, /* Ready to be read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) FRAME_ERROR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /***
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * Register access (for USB request byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ***/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) CAMERAACCESS_SYSTEM = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) CAMERAACCESS_VC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) CAMERAACCESS_VP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) CAMERAACCESS_IDATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define CAMERAACCESS_TYPE_BLOCK 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define CAMERAACCESS_TYPE_RANDOM 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define CAMERAACCESS_TYPE_MASK 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define CAMERAACCESS_TYPE_REPEAT 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define TRANSFER_READ 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define TRANSFER_WRITE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define DEFAULT_ALT USBIF_ISO_6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define DEFAULT_BRIGHTNESS 0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define DEFAULT_CONTRAST 0x93
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define DEFAULT_SATURATION 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* Power state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define HI_POWER_MODE CPIA2_SYSTEM_CONTROL_HIGH_POWER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define LO_POWER_MODE CPIA2_SYSTEM_CONTROL_LOW_POWER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /********
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * Commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) *******/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) CPIA2_CMD_NONE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) CPIA2_CMD_GET_VERSION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) CPIA2_CMD_GET_PNP_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) CPIA2_CMD_GET_ASIC_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) CPIA2_CMD_GET_SENSOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) CPIA2_CMD_GET_VP_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) CPIA2_CMD_GET_VP_BRIGHTNESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) CPIA2_CMD_SET_VP_BRIGHTNESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) CPIA2_CMD_GET_CONTRAST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) CPIA2_CMD_SET_CONTRAST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) CPIA2_CMD_GET_VP_SATURATION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) CPIA2_CMD_SET_VP_SATURATION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) CPIA2_CMD_GET_VP_GPIO_DIRECTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) CPIA2_CMD_SET_VP_GPIO_DIRECTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) CPIA2_CMD_GET_VP_GPIO_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) CPIA2_CMD_SET_VP_GPIO_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) CPIA2_CMD_GET_VC_MP_GPIO_DIRECTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) CPIA2_CMD_SET_VC_MP_GPIO_DIRECTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) CPIA2_CMD_GET_VC_MP_GPIO_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) CPIA2_CMD_SET_VC_MP_GPIO_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) CPIA2_CMD_ENABLE_PACKET_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) CPIA2_CMD_GET_FLICKER_MODES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) CPIA2_CMD_SET_FLICKER_MODES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) CPIA2_CMD_RESET_FIFO, /* clear fifo and enable stream block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) CPIA2_CMD_SET_HI_POWER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) CPIA2_CMD_SET_LOW_POWER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) CPIA2_CMD_CLEAR_V2W_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) CPIA2_CMD_SET_USER_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) CPIA2_CMD_GET_USER_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) CPIA2_CMD_FRAMERATE_REQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) CPIA2_CMD_SET_COMPRESSION_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) CPIA2_CMD_GET_WAKEUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) CPIA2_CMD_SET_WAKEUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) CPIA2_CMD_GET_PW_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) CPIA2_CMD_SET_PW_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) CPIA2_CMD_GET_SYSTEM_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) CPIA2_CMD_SET_SYSTEM_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) CPIA2_CMD_GET_VP_SYSTEM_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) CPIA2_CMD_GET_VP_SYSTEM_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) CPIA2_CMD_SET_VP_SYSTEM_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) CPIA2_CMD_GET_VP_EXP_MODES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) CPIA2_CMD_SET_VP_EXP_MODES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) CPIA2_CMD_GET_DEVICE_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) CPIA2_CMD_SET_DEVICE_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) CPIA2_CMD_SET_SERIAL_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) CPIA2_CMD_SET_SENSOR_CR1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) CPIA2_CMD_GET_VC_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) CPIA2_CMD_SET_VC_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) CPIA2_CMD_SET_TARGET_KB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) CPIA2_CMD_SET_DEF_JPEG_OPT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) CPIA2_CMD_REHASH_VP4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) CPIA2_CMD_GET_USER_EFFECTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) CPIA2_CMD_SET_USER_EFFECTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) enum user_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) COMMAND_NONE = 0x00000001,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) COMMAND_SET_FPS = 0x00000002,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) COMMAND_SET_COLOR_PARAMS = 0x00000004,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) COMMAND_GET_COLOR_PARAMS = 0x00000008,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) COMMAND_SET_FORMAT = 0x00000010, /* size, etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) COMMAND_SET_FLICKER = 0x00000020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /***
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * Some defines specific to the 676 chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ***/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define CAMACC_CIF 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define CAMACC_VGA 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define CAMACC_QCIF 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define CAMACC_QVGA 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct cpia2_register {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) u8 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct cpia2_reg_mask {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) u8 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) u8 and_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) u8 or_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) u8 fill;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct cpia2_command {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) u32 command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) u8 req_mode; /* (Block or random) | registerBank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u8 reg_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) u8 direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) u8 start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) union reg_types {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct cpia2_register registers[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct cpia2_reg_mask masks[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) u8 block_data[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u8 *patch_data; /* points to function defined block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) } buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) struct camera_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) u8 firmware_revision_hi; /* For system register set (bank 0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) u8 firmware_revision_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) u8 asic_id; /* Video Compressor set (bank 1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) u8 asic_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) u8 vp_device_hi; /* Video Processor set (bank 2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) u8 vp_device_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) u8 sensor_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) u8 sensor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) } version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) u32 device_type; /* enumerated from vendor/product ids.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) * Currently, either STV_672 or STV_676 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) u16 vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) u16 product;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) u16 device_revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) } pnp_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) u8 brightness; /* CPIA2_VP_EXPOSURE_TARGET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) u8 contrast; /* Note: this is CPIA2_VP_YRANGE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) u8 saturation; /* CPIA2_VP_SATURATION */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) } color_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u8 cam_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) u8 flicker_mode_req; /* 1 if flicker on, else never flicker */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) } flicker_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) u8 jpeg_options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) u8 creep_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) u8 user_squeeze;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) u8 inhibit_htables;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) } compression;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u8 ohsize; /* output image size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u8 ovsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) u8 hcrop; /* cropping start_pos/4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) u8 vcrop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) u8 hphase; /* scaling registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) u8 vphase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) u8 hispan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) u8 vispan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) u8 hicrop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) u8 vicrop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) u8 hifraction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) u8 vifraction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) } image_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) int width; /* actual window width */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) int height; /* actual window height */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) } roi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) u8 video_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) u8 frame_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) u8 video_size; /* Not a register, just a convenience for cropped sizes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) u8 gpio_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u8 gpio_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) u8 system_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) u8 system_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) u8 lowlight_boost; /* Bool: 0 = off, 1 = on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) u8 device_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) u8 exposure_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) u8 user_effects;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) } vp_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) u8 pw_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) u8 wakeup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) u8 vc_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) u8 vc_mp_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) u8 vc_mp_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) u8 quality;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) } vc_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) u8 power_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) u8 system_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) u8 stream_mode; /* This is the current alternate for usb drivers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) u8 allow_corrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) } camera_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define NUM_SBUF 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) struct cpia2_sbuf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) char *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) struct urb *urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) struct framebuf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) u64 ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) unsigned long seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) int num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) int length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) int max_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) volatile enum frame_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) u8 *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct framebuf *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) struct camera_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /* locks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct v4l2_device v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) struct mutex v4l2_lock; /* serialize file operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) struct v4l2_ctrl_handler hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* Lights control cluster */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct v4l2_ctrl *top_light;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct v4l2_ctrl *bottom_light;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) struct v4l2_ctrl *usb_alt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* camera status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) int first_image_seen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) enum sensors sensor_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) u8 flush;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) struct v4l2_fh *stream_fh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) u8 mmapped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) int streaming; /* 0 = no, 1 = yes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) int xfer_mode; /* XFER_BULK or XFER_ISOC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) struct camera_params params; /* camera settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /* v4l */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) int video_size; /* VIDEO_SIZE_ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) struct video_device vdev; /* v4l videodev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) u32 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) u32 height; /* Its size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) __u32 pixelformat; /* Format fourcc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /* USB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) struct usb_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) unsigned char iface;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) unsigned int cur_alt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) unsigned int old_alt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) struct cpia2_sbuf sbuf[NUM_SBUF]; /* Double buffering */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) wait_queue_head_t wq_stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) /* Buffering */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) u32 frame_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) int num_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) unsigned long frame_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) u8 *frame_buffer; /* frame buffer data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct framebuf *buffers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct framebuf * volatile curbuff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct framebuf *workbuff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) /* MJPEG Extension */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) int APPn; /* Number of APP segment to be written, must be 0..15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) int APP_len; /* Length of data in JPEG APPn segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) char APP_data[60]; /* Data in the JPEG APPn segment. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) int COM_len; /* Length of data in JPEG COM segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) char COM_data[60]; /* Data in JPEG COM segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) /* v4l */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) int cpia2_register_camera(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) void cpia2_unregister_camera(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) void cpia2_camera_release(struct v4l2_device *v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) /* core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) int cpia2_reset_camera(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) int cpia2_set_low_power(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) void cpia2_dbg_dump_registers(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) int cpia2_match_video_size(int width, int height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) void cpia2_set_camera_state(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) void cpia2_save_camera_state(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) void cpia2_set_color_params(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) void cpia2_set_brightness(struct camera_data *cam, unsigned char value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) void cpia2_set_contrast(struct camera_data *cam, unsigned char value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) void cpia2_set_saturation(struct camera_data *cam, unsigned char value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) int cpia2_set_flicker_mode(struct camera_data *cam, int mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) void cpia2_set_format(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) int cpia2_send_command(struct camera_data *cam, struct cpia2_command *cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) int cpia2_do_command(struct camera_data *cam,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) unsigned int command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) unsigned char direction, unsigned char param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) void cpia2_deinit_camera_struct(struct camera_data *cam, struct usb_interface *intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct camera_data *cpia2_init_camera_struct(struct usb_interface *intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) int cpia2_init_camera(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) int cpia2_allocate_buffers(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) void cpia2_free_buffers(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) long cpia2_read(struct camera_data *cam,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) char __user *buf, unsigned long count, int noblock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) __poll_t cpia2_poll(struct camera_data *cam,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) struct file *filp, poll_table *wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) int cpia2_remap_buffer(struct camera_data *cam, struct vm_area_struct *vma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) void cpia2_set_property_flip(struct camera_data *cam, int prop_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) void cpia2_set_property_mirror(struct camera_data *cam, int prop_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) int cpia2_set_gpio(struct camera_data *cam, unsigned char setting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) int cpia2_set_fps(struct camera_data *cam, int framerate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) /* usb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) int cpia2_usb_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) void cpia2_usb_cleanup(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) int cpia2_usb_transfer_cmd(struct camera_data *cam, void *registers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) u8 request, u8 start, u8 count, u8 direction);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) int cpia2_usb_stream_start(struct camera_data *cam, unsigned int alternate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) int cpia2_usb_stream_stop(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) int cpia2_usb_stream_pause(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) int cpia2_usb_stream_resume(struct camera_data *cam);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) int cpia2_usb_change_streaming_alternate(struct camera_data *cam,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) unsigned int alt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /* ----------------------- debug functions ---------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) #ifdef _CPIA2_DEBUG_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) #define ALOG(lev, fmt, args...) printk(lev "%s:%d %s(): " fmt, __FILE__, __LINE__, __func__, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) #define LOG(fmt, args...) ALOG(KERN_INFO, fmt, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) #define ERR(fmt, args...) ALOG(KERN_ERR, fmt, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) #define DBG(fmt, args...) ALOG(KERN_DEBUG, fmt, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) #define ALOG(fmt,args...) printk(fmt,##args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) #define LOG(fmt,args...) ALOG(KERN_INFO "cpia2: "fmt,##args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) #define ERR(fmt,args...) ALOG(KERN_ERR "cpia2: "fmt,##args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) #define DBG(fmn,args...) do {} while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) /* No function or lineno, for shorter lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) #define KINFO(fmt, args...) printk(KERN_INFO fmt,##args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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