^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // tuner-xc2028
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // Copyright (c) 2007-2008 Mauro Carvalho Chehab <mchehab@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Copyright (c) 2007 Michel Ludwig (michel.ludwig@gmail.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // - frontend interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/div64.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <media/tuner.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "tuner-i2c.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "tuner-xc2028.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "tuner-xc2028-types.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/dvb/frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* Max transfer size done by I2C transfer functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MAX_XFER_SIZE 80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Registers (Write-only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define XREG_INIT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define XREG_RF_FREQ 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define XREG_POWER_DOWN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* Registers (Read-only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define XREG_FREQ_ERROR 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define XREG_LOCK 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define XREG_VERSION 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define XREG_PRODUCT_ID 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define XREG_HSYNC_FREQ 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define XREG_FRAME_LINES 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define XREG_SNR 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define XREG_ADC_ENV 0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static int debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) module_param(debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MODULE_PARM_DESC(debug, "enable verbose debug messages");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static int no_poweroff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) module_param(no_poweroff, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "1 keep device energized and with tuner ready all the times.\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) " Faster, but consumes more power and keeps the device hotter\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static char audio_std[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) module_param_string(audio_std, audio_std, sizeof(audio_std), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MODULE_PARM_DESC(audio_std,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) "Audio standard. XC3028 audio decoder explicitly needs to know what audio\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) "standard is needed for some video standards with audio A2 or NICAM.\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) "The valid values are:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) "A2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) "A2/A\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) "A2/B\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) "NICAM\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) "NICAM/A\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) "NICAM/B\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static char firmware_name[30];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MODULE_PARM_DESC(firmware_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) "Firmware file name. Allows overriding the default firmware name\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static LIST_HEAD(hybrid_tuner_instance_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static DEFINE_MUTEX(xc2028_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* struct for storing firmware table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct firmware_description {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) v4l2_std_id id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) __u16 int_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned char *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct firmware_properties {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) v4l2_std_id id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) v4l2_std_id std_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) __u16 int_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned int scode_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int scode_nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) enum xc2028_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) XC2028_NO_FIRMWARE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) XC2028_WAITING_FIRMWARE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) XC2028_ACTIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) XC2028_SLEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) XC2028_NODEV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct xc2028_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct list_head hybrid_tuner_instance_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct tuner_i2c_props i2c_props;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) __u32 frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) enum xc2028_state state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) const char *fname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct firmware_description *firm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) int firm_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) __u16 firm_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) __u16 hwmodel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) __u16 hwvers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct xc2028_ctrl ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct firmware_properties cur_fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define i2c_send(priv, buf, size) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) int _rc; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) _rc = tuner_i2c_xfer_send(&priv->i2c_props, buf, size); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (size != _rc) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) tuner_info("i2c output error: rc = %d (should be %d)\n",\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) _rc, (int)size); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (priv->ctrl.msleep) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) msleep(priv->ctrl.msleep); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) _rc; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define i2c_send_recv(priv, obuf, osize, ibuf, isize) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) int _rc; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) _rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, obuf, osize, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ibuf, isize); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (isize != _rc) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) tuner_err("i2c input error: rc = %d (should be %d)\n", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) _rc, (int)isize); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (priv->ctrl.msleep) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) msleep(priv->ctrl.msleep); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) _rc; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define send_seq(priv, data...) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static u8 _val[] = data; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int _rc; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (sizeof(_val) != \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) (_rc = tuner_i2c_xfer_send(&priv->i2c_props, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) _val, sizeof(_val)))) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) tuner_err("Error on line %d: %d\n", __LINE__, _rc); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) } else if (priv->ctrl.msleep) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) msleep(priv->ctrl.msleep); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) _rc; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static int xc2028_get_reg(struct xc2028_data *priv, u16 reg, u16 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) unsigned char buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) unsigned char ibuf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) tuner_dbg("%s %04x called\n", __func__, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) buf[0] = reg >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) buf[1] = (unsigned char) reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (i2c_send_recv(priv, buf, 2, ibuf, 2) != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) *val = (ibuf[1]) | (ibuf[0] << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (type & BASE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) printk(KERN_CONT "BASE ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (type & INIT1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) printk(KERN_CONT "INIT1 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (type & F8MHZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) printk(KERN_CONT "F8MHZ ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (type & MTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) printk(KERN_CONT "MTS ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (type & D2620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) printk(KERN_CONT "D2620 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (type & D2633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) printk(KERN_CONT "D2633 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (type & DTV6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) printk(KERN_CONT "DTV6 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (type & QAM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) printk(KERN_CONT "QAM ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (type & DTV7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) printk(KERN_CONT "DTV7 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (type & DTV78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) printk(KERN_CONT "DTV78 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (type & DTV8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) printk(KERN_CONT "DTV8 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (type & FM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) printk(KERN_CONT "FM ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (type & INPUT1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) printk(KERN_CONT "INPUT1 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (type & LCD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) printk(KERN_CONT "LCD ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (type & NOGD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) printk(KERN_CONT "NOGD ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (type & MONO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) printk(KERN_CONT "MONO ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (type & ATSC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) printk(KERN_CONT "ATSC ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (type & IF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) printk(KERN_CONT "IF ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (type & LG60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) printk(KERN_CONT "LG60 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (type & ATI638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) printk(KERN_CONT "ATI638 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (type & OREN538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) printk(KERN_CONT "OREN538 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (type & OREN36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) printk(KERN_CONT "OREN36 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (type & TOYOTA388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) printk(KERN_CONT "TOYOTA388 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (type & TOYOTA794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) printk(KERN_CONT "TOYOTA794 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (type & DIBCOM52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) printk(KERN_CONT "DIBCOM52 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (type & ZARLINK456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) printk(KERN_CONT "ZARLINK456 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (type & CHINA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) printk(KERN_CONT "CHINA ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (type & F6MHZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) printk(KERN_CONT "F6MHZ ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (type & INPUT2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) printk(KERN_CONT "INPUT2 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (type & SCODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) printk(KERN_CONT "SCODE ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (type & HAS_IF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) printk(KERN_CONT "HAS_IF_%d ", int_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static v4l2_std_id parse_audio_std_option(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (strcasecmp(audio_std, "A2") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return V4L2_STD_A2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (strcasecmp(audio_std, "A2/A") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return V4L2_STD_A2_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (strcasecmp(audio_std, "A2/B") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return V4L2_STD_A2_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (strcasecmp(audio_std, "NICAM") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return V4L2_STD_NICAM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (strcasecmp(audio_std, "NICAM/A") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return V4L2_STD_NICAM_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (strcasecmp(audio_std, "NICAM/B") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return V4L2_STD_NICAM_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int check_device_status(struct xc2028_data *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) switch (priv->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) case XC2028_NO_FIRMWARE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) case XC2028_WAITING_FIRMWARE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) case XC2028_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) case XC2028_SLEEP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) case XC2028_NODEV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static void free_firmware(struct xc2028_data *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* free allocated f/w string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (priv->fname != firmware_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) kfree(priv->fname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) priv->fname = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) priv->state = XC2028_NO_FIRMWARE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (!priv->firm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) for (i = 0; i < priv->firm_size; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) kfree(priv->firm[i].ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) kfree(priv->firm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) priv->firm = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) priv->firm_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int load_all_firmwares(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) const struct firmware *fw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) const unsigned char *p, *endp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) int n, n_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) char name[33];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) p = fw->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) endp = p + fw->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (fw->size < sizeof(name) - 1 + 2 + 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) tuner_err("Error: firmware file %s has invalid size!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) priv->fname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) goto corrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) memcpy(name, p, sizeof(name) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) name[sizeof(name) - 1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) p += sizeof(name) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) priv->firm_version = get_unaligned_le16(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) p += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) n_array = get_unaligned_le16(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) p += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) tuner_info("Loading %d firmware images from %s, type: %s, ver %d.%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) n_array, priv->fname, name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) priv->firm_version >> 8, priv->firm_version & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (priv->firm == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) tuner_err("Not enough memory to load firmware file.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) priv->firm_size = n_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) n = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) while (p < endp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) __u32 type, size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) v4l2_std_id id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) __u16 int_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) n++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (n >= n_array) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) tuner_err("More firmware images in file than were expected!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) goto corrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /* Checks if there's enough bytes to read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (endp - p < sizeof(type) + sizeof(id) + sizeof(size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) goto header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) type = get_unaligned_le32(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) p += sizeof(type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) id = get_unaligned_le64(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) p += sizeof(id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (type & HAS_IF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) int_freq = get_unaligned_le16(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) p += sizeof(int_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (endp - p < sizeof(size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) goto header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) size = get_unaligned_le32(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) p += sizeof(size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (!size || size > endp - p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) tuner_err("Firmware type ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) dump_firm_type(type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) printk(KERN_CONT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) "(%x), id %llx is corrupted (size=%zd, expected %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) type, (unsigned long long)id, (endp - p), size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) goto corrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) priv->firm[n].ptr = kmemdup(p, size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (priv->firm[n].ptr == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) tuner_err("Not enough memory to load firmware file.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) tuner_dbg("Reading firmware type ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (debug) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) dump_firm_type_and_int_freq(type, int_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) printk(KERN_CONT "(%x), id %llx, size=%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) type, (unsigned long long)id, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) priv->firm[n].type = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) priv->firm[n].id = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) priv->firm[n].size = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) priv->firm[n].int_freq = int_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) p += size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (n + 1 != priv->firm_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) tuner_err("Firmware file is incomplete!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) goto corrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) header:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) tuner_err("Firmware header is incomplete!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) corrupt:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) tuner_err("Error: firmware file is corrupted!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) tuner_info("Releasing partially loaded firmware file.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) free_firmware(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) if (rc == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) tuner_dbg("Firmware files loaded.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) priv->state = XC2028_NODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) static int seek_firmware(struct dvb_frontend *fe, unsigned int type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) v4l2_std_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) int i, best_i = -1, best_nr_matches = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) unsigned int type_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) tuner_dbg("%s called, want type=", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (debug) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dump_firm_type(type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) printk(KERN_CONT "(%x), id %016llx.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) type, (unsigned long long)*id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) if (!priv->firm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) tuner_err("Error! firmware not loaded\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) if (((type & ~SCODE) == 0) && (*id == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) *id = V4L2_STD_PAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (type & BASE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) type_mask = BASE_TYPES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) else if (type & SCODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) type &= SCODE_TYPES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) type_mask = SCODE_TYPES & ~HAS_IF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) } else if (type & DTV_TYPES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) type_mask = DTV_TYPES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) else if (type & STD_SPECIFIC_TYPES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) type_mask = STD_SPECIFIC_TYPES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) type &= type_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (!(type & SCODE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) type_mask = ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) /* Seek for exact match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) for (i = 0; i < priv->firm_size; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if ((type == (priv->firm[i].type & type_mask)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) (*id == priv->firm[i].id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) goto found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /* Seek for generic video standard match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) for (i = 0; i < priv->firm_size; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) v4l2_std_id match_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) int nr_matches;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (type != (priv->firm[i].type & type_mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) match_mask = *id & priv->firm[i].id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (!match_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if ((*id & match_mask) == *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) goto found; /* Supports all the requested standards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) nr_matches = hweight64(match_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (nr_matches > best_nr_matches) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) best_nr_matches = nr_matches;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) best_i = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (best_nr_matches > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) tuner_dbg("Selecting best matching firmware (%d bits) for type=",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) best_nr_matches);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) dump_firm_type(type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) printk(KERN_CONT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) "(%x), id %016llx:\n", type, (unsigned long long)*id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) i = best_i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) goto found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) /*FIXME: Would make sense to seek for type "hint" match ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) i = -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) goto ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) found:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) *id = priv->firm[i].id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) ret:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) tuner_dbg("%s firmware for type=", (i < 0) ? "Can't find" : "Found");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (debug) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) dump_firm_type(type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) printk(KERN_CONT "(%x), id %016llx.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) type, (unsigned long long)*id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) static inline int do_tuner_callback(struct dvb_frontend *fe, int cmd, int arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) /* analog side (tuner-core) uses i2c_adap->algo_data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) * digital side is not guaranteed to have algo_data defined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) * digital side will always have fe->dvb defined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * analog side (tuner-core) doesn't (yet) define fe->dvb.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return (!fe->callback) ? -EINVAL :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) fe->dvb->priv : priv->i2c_props.adap->algo_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) DVB_FRONTEND_COMPONENT_TUNER, cmd, arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static int load_firmware(struct dvb_frontend *fe, unsigned int type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) v4l2_std_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) int pos, rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) unsigned char *p, *endp, buf[MAX_XFER_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (priv->ctrl.max_len > sizeof(buf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) priv->ctrl.max_len = sizeof(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) pos = seek_firmware(fe, type, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (pos < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) return pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) tuner_info("Loading firmware for type=");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) dump_firm_type(priv->firm[pos].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) printk(KERN_CONT "(%x), id %016llx.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) priv->firm[pos].type, (unsigned long long)*id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) p = priv->firm[pos].ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) endp = p + priv->firm[pos].size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) while (p < endp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) __u16 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) /* Checks if there's enough bytes to read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (p + sizeof(size) > endp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) tuner_err("Firmware chunk size is wrong\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) size = le16_to_cpu(*(__le16 *) p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) p += sizeof(size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (size == 0xffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) if (!size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) /* Special callback command received */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) tuner_err("Error at RESET code %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) (*p) & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (size >= 0xff00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) switch (size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) case 0xff00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) rc = do_tuner_callback(fe, XC2028_RESET_CLK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) tuner_err("Error at RESET code %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) (*p) & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) tuner_info("Invalid RESET code %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) size & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* Checks for a sleep command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) if (size & 0x8000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) msleep(size & 0x7fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) if ((size + p > endp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) tuner_err("missing bytes: need %d, have %zd\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) size, (endp - p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) buf[0] = *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) p++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) size--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) /* Sends message chunks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) while (size > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) int len = (size < priv->ctrl.max_len - 1) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) size : priv->ctrl.max_len - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) memcpy(buf + 1, p, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) rc = i2c_send(priv, buf, len + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) tuner_err("%d returned from send\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) p += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) size -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) /* silently fail if the frontend doesn't support I2C flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) rc = do_tuner_callback(fe, XC2028_I2C_FLUSH, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) if ((rc < 0) && (rc != -EINVAL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) tuner_err("error executing flush: %d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) static int load_scode(struct dvb_frontend *fe, unsigned int type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) v4l2_std_id *id, __u16 int_freq, int scode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) int pos, rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) unsigned char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) if (!int_freq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) pos = seek_firmware(fe, type, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) if (pos < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) return pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) for (pos = 0; pos < priv->firm_size; pos++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) if ((priv->firm[pos].int_freq == int_freq) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) (priv->firm[pos].type & HAS_IF))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if (pos == priv->firm_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) p = priv->firm[pos].ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (priv->firm[pos].type & HAS_IF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) if (priv->firm[pos].size != 12 * 16 || scode >= 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) p += 12 * scode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) /* 16 SCODE entries per file; each SCODE entry is 12 bytes and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) * has a 2-byte size header in the firmware format. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) if (priv->firm[pos].size != 14 * 16 || scode >= 16 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) le16_to_cpu(*(__le16 *)(p + 14 * scode)) != 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) p += 14 * scode + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) tuner_info("Loading SCODE for type=");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) dump_firm_type_and_int_freq(priv->firm[pos].type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) priv->firm[pos].int_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) printk(KERN_CONT "(%x), id %016llx.\n", priv->firm[pos].type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) (unsigned long long)*id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) if (priv->firm_version < 0x0202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) rc = send_seq(priv, {0x20, 0x00, 0x00, 0x00});
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) rc = send_seq(priv, {0xa0, 0x00, 0x00, 0x00});
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) rc = i2c_send(priv, p, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) rc = send_seq(priv, {0x00, 0x8c});
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) static int xc2028_sleep(struct dvb_frontend *fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) static int check_firmware(struct dvb_frontend *fe, unsigned int type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) v4l2_std_id std, __u16 int_freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) struct firmware_properties new_fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) int rc, retry_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) u16 version, hwmodel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) v4l2_std_id std0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) rc = check_device_status(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (priv->ctrl.mts && !(type & FM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) type |= MTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) retry:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) new_fw.type = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) new_fw.id = std;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) new_fw.std_req = std;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) new_fw.scode_table = SCODE | priv->ctrl.scode_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) new_fw.scode_nr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) new_fw.int_freq = int_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) tuner_dbg("checking firmware, user requested type=");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) if (debug) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) dump_firm_type(new_fw.type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) printk(KERN_CONT "(%x), id %016llx, ", new_fw.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) (unsigned long long)new_fw.std_req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) if (!int_freq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) printk(KERN_CONT "scode_tbl ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) dump_firm_type(priv->ctrl.scode_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) printk(KERN_CONT "(%x), ", priv->ctrl.scode_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) printk(KERN_CONT "int_freq %d, ", new_fw.int_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) printk(KERN_CONT "scode_nr %d\n", new_fw.scode_nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) * No need to reload base firmware if it matches and if the tuner
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) * is not at sleep mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) if ((priv->state == XC2028_ACTIVE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) (((BASE | new_fw.type) & BASE_TYPES) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) (priv->cur_fw.type & BASE_TYPES))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) tuner_dbg("BASE firmware not changed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) goto skip_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) /* Updating BASE - forget about all currently loaded firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) /* Reset is needed before loading firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) /* BASE firmwares are all std0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) std0 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) rc = load_firmware(fe, BASE | new_fw.type, &std0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) tuner_err("Error %d while loading base firmware\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) /* Load INIT1, if needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) tuner_dbg("Load init1 firmware, if exists\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) rc = load_firmware(fe, BASE | INIT1 | new_fw.type, &std0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) if (rc == -ENOENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) rc = load_firmware(fe, (BASE | INIT1 | new_fw.type) & ~F8MHZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) &std0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) if (rc < 0 && rc != -ENOENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) tuner_err("Error %d while loading init1 firmware\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) skip_base:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) * No need to reload standard specific firmware if base firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) * was not reloaded and requested video standards have not changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) if (priv->cur_fw.type == (BASE | new_fw.type) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) priv->cur_fw.std_req == std) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) tuner_dbg("Std-specific firmware already loaded.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) goto skip_std_specific;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) /* Reloading std-specific firmware forces a SCODE update */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) priv->cur_fw.scode_table = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) rc = load_firmware(fe, new_fw.type, &new_fw.id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (rc == -ENOENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) rc = load_firmware(fe, new_fw.type & ~F8MHZ, &new_fw.id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) skip_std_specific:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) if (priv->cur_fw.scode_table == new_fw.scode_table &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) priv->cur_fw.scode_nr == new_fw.scode_nr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) tuner_dbg("SCODE firmware already loaded.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) goto check_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) if (new_fw.type & FM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) goto check_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) /* Load SCODE firmware, if exists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) tuner_dbg("Trying to load scode %d\n", new_fw.scode_nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) new_fw.int_freq, new_fw.scode_nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) check_device:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) if (xc2028_get_reg(priv, 0x0004, &version) < 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) xc2028_get_reg(priv, 0x0008, &hwmodel) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) tuner_err("Unable to read tuner registers.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) tuner_dbg("Device is Xceive %d version %d.%d, firmware version %d.%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) hwmodel, (version & 0xf000) >> 12, (version & 0xf00) >> 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) (version & 0xf0) >> 4, version & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) if (priv->ctrl.read_not_reliable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) goto read_not_reliable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) /* Check firmware version against what we downloaded. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) if (priv->firm_version != ((version & 0xf0) << 4 | (version & 0x0f))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) if (!priv->ctrl.read_not_reliable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) tuner_err("Incorrect readback of firmware version.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) tuner_err("Returned an incorrect version. However, read is not reliable enough. Ignoring it.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) hwmodel = 3028;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) /* Check that the tuner hardware model remains consistent over time. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) if (priv->hwmodel == 0 && (hwmodel == 2028 || hwmodel == 3028)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) priv->hwmodel = hwmodel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) priv->hwvers = version & 0xff00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) priv->hwvers != (version & 0xff00)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) tuner_err("Read invalid device hardware information - tuner hung?\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) read_not_reliable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) priv->cur_fw = new_fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) * By setting BASE in cur_fw.type only after successfully loading all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) * firmwares, we can:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) * 1. Identify that BASE firmware with type=0 has been loaded;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) * 2. Tell whether BASE firmware was just changed the next time through.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) priv->cur_fw.type |= BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) priv->state = XC2028_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) free_firmware(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) if (retry_count < 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) retry_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) tuner_dbg("Retrying firmware load\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) goto retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) /* Firmware didn't load. Put the device to sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) xc2028_sleep(fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) if (rc == -ENOENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) static int xc2028_signal(struct dvb_frontend *fe, u16 *strength)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) u16 frq_lock, signal = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) int rc, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) rc = check_device_status(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) /* If the device is sleeping, no channel is tuned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) if (!rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) *strength = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) mutex_lock(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) /* Sync Lock Indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) goto ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) if (frq_lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) msleep(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) /* Frequency didn't lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) if (frq_lock == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) goto ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) /* Get SNR of the video signal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) rc = xc2028_get_reg(priv, XREG_SNR, &signal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) goto ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) /* Signal level is 3 bits only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) signal = ((1 << 12) - 1) | ((signal & 0x07) << 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) ret:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) mutex_unlock(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) *strength = signal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) tuner_dbg("signal strength is %d\n", signal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) static int xc2028_get_afc(struct dvb_frontend *fe, s32 *afc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) int i, rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) u16 frq_lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) s16 afc_reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) rc = check_device_status(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) /* If the device is sleeping, no channel is tuned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) if (!rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) *afc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) mutex_lock(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) /* Sync Lock Indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) goto ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) if (frq_lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) msleep(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) /* Frequency didn't lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) if (frq_lock == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) goto ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) /* Get AFC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) rc = xc2028_get_reg(priv, XREG_FREQ_ERROR, &afc_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) goto ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) *afc = afc_reg * 15625; /* Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) tuner_dbg("AFC is %d Hz\n", *afc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) ret:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) mutex_unlock(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) #define DIV 15625
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) enum v4l2_tuner_type new_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) unsigned int type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) v4l2_std_id std,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) u16 int_freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) int rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) unsigned char buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) u32 div, offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) mutex_lock(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) tuner_dbg("should set frequency %d kHz\n", freq / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) if (check_firmware(fe, type, std, int_freq) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) goto ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) /* On some cases xc2028 can disable video output, if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) * very weak signals are received. By sending a soft
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) * reset, this is re-enabled. So, it is better to always
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) * send a soft reset before changing channels, to be sure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) * that xc2028 will be in a safe state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) * Maybe this might also be needed for DTV.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) switch (new_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) case V4L2_TUNER_ANALOG_TV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) rc = send_seq(priv, {0x00, 0x00});
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) /* Analog mode requires offset = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) case V4L2_TUNER_RADIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) /* Radio mode requires offset = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) case V4L2_TUNER_DIGITAL_TV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) * Digital modes require an offset to adjust to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) * proper frequency. The offset depends on what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) * firmware version is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) * Adjust to the center frequency. This is calculated by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) * formula: offset = 1.25MHz - BW/2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) * For DTV 7/8, the firmware uses BW = 8000, so it needs a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) * further adjustment to get the frequency center on VHF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) * The firmware DTV78 used to work fine in UHF band (8 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) * bandwidth) but not at all in VHF band (7 MHz bandwidth).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) * The real problem was connected to the formula used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) * calculate the center frequency offset in VHF band.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) * In fact, removing the 500KHz adjustment fixed the problem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) * This is coherent to what was implemented for the DTV7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) * firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) * In the end, now the center frequency is the same for all 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) * firmwares (DTV7, DTV8, DTV78) and doesn't depend on channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) * bandwidth.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) if (priv->cur_fw.type & DTV6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) offset = 1750000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) else /* DTV7 or DTV8 or DTV78 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) offset = 2750000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) * xc3028 additional "magic"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) * Depending on the firmware version, it needs some adjustments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) * to properly centralize the frequency. This seems to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) * needed to compensate the SCODE table adjustments made by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) * newer firmwares
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) * The proper adjustment would be to do it at s-code table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) * However, this didn't work, as reported by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) * Robert Lowery <rglowery@exemail.com.au>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) * Still need tests for XC3028L (firmware 3.2 or upper)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) * So, for now, let's just comment the per-firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) * version of this change. Reports with xc3028l working
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) * with and without the lines below are welcome
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) if (priv->firm_version < 0x0302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) if (priv->cur_fw.type & DTV7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) offset += 500000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) if (priv->cur_fw.type & DTV7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) offset -= 300000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) else if (type != ATSC) /* DVB @6MHz, DTV 8 and DTV 7/8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) offset += 200000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) tuner_err("Unsupported tuner type %d.\n", new_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) div = (freq - offset + DIV / 2) / DIV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) /* CMD= Set frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) if (priv->firm_version < 0x0202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) rc = send_seq(priv, {0x00, XREG_RF_FREQ, 0x00, 0x00});
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) rc = send_seq(priv, {0x80, XREG_RF_FREQ, 0x00, 0x00});
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) goto ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) /* Return code shouldn't be checked.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) The reset CLK is needed only with tm6000.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) Driver should work fine even if this fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) if (priv->ctrl.msleep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) msleep(priv->ctrl.msleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) do_tuner_callback(fe, XC2028_RESET_CLK, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) buf[0] = 0xff & (div >> 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) buf[1] = 0xff & (div >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) buf[2] = 0xff & (div >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) buf[3] = 0xff & (div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) rc = i2c_send(priv, buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) goto ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) priv->frequency = freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) tuner_dbg("divisor= %*ph (freq=%d.%03d)\n", 4, buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) freq / 1000000, (freq % 1000000) / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) ret:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) mutex_unlock(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) static int xc2028_set_analog_freq(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) struct analog_parameters *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) unsigned int type=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) if (p->mode == V4L2_TUNER_RADIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) type |= FM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) if (priv->ctrl.input1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) type |= INPUT1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) return generic_set_freq(fe, (625l * p->frequency) / 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) V4L2_TUNER_RADIO, type, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) /* if std is not defined, choose one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) if (!p->std)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) p->std = V4L2_STD_MN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) /* PAL/M, PAL/N, PAL/Nc and NTSC variants should use 6MHz firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) if (!(p->std & V4L2_STD_MN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) type |= F8MHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) /* Add audio hack to std mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) p->std |= parse_audio_std_option();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) return generic_set_freq(fe, 62500l * p->frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) V4L2_TUNER_ANALOG_TV, type, p->std, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) static int xc2028_set_params(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) struct dtv_frontend_properties *c = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) u32 delsys = c->delivery_system;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) u32 bw = c->bandwidth_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) unsigned int type = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) u16 demod = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) rc = check_device_status(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) switch (delsys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) case SYS_DVBT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) case SYS_DVBT2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) * The only countries with 6MHz seem to be Taiwan/Uruguay.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) * Both seem to require QAM firmware for OFDM decoding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) * Tested in Taiwan by Terry Wu <terrywu2009@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) if (bw <= 6000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) type |= QAM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) switch (priv->ctrl.type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) case XC2028_D2633:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) type |= D2633;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) case XC2028_D2620:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) type |= D2620;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) case XC2028_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) /* Zarlink seems to need D2633 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) if (priv->ctrl.demod == XC3028_FE_ZARLINK456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) type |= D2633;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) type |= D2620;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) case SYS_ATSC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) /* The only ATSC firmware (at least on v2.7) is D2633 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) type |= ATSC | D2633;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) /* DVB-S and pure QAM (FE_QAM) are not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) if (bw <= 6000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) type |= DTV6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) priv->ctrl.vhfbw7 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) priv->ctrl.uhfbw8 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) } else if (bw <= 7000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) if (c->frequency < 470000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) priv->ctrl.vhfbw7 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) priv->ctrl.uhfbw8 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) type |= F8MHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) if (c->frequency < 470000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) priv->ctrl.vhfbw7 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) priv->ctrl.uhfbw8 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) type |= F8MHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) /* All S-code tables need a 200kHz shift */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) if (priv->ctrl.demod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) demod = priv->ctrl.demod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) * Newer firmwares require a 200 kHz offset only for ATSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) if (type == ATSC || priv->firm_version < 0x0302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) demod += 200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) * The DTV7 S-code table needs a 700 kHz shift.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) * DTV7 is only used in Australia. Germany or Italy may also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) * use this firmware after initialization, but a tune to a UHF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) * channel should then cause DTV78 to be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) * Unfortunately, on real-field tests, the s-code offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) * didn't work as expected, as reported by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) * Robert Lowery <rglowery@exemail.com.au>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) return generic_set_freq(fe, c->frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) V4L2_TUNER_DIGITAL_TV, type, 0, demod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) static int xc2028_sleep(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) rc = check_device_status(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) /* Device is already in sleep mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) if (!rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) /* Avoid firmware reload on slow devices or if PM disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) if (no_poweroff || priv->ctrl.disable_power_mgmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) tuner_dbg("Putting xc2028/3028 into poweroff mode.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) if (debug > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) tuner_dbg("Printing sleep stack trace:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) dump_stack();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) mutex_lock(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) if (priv->firm_version < 0x0202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) rc = send_seq(priv, {0x00, XREG_POWER_DOWN, 0x00, 0x00});
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) rc = send_seq(priv, {0x80, XREG_POWER_DOWN, 0x00, 0x00});
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) if (rc >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) priv->state = XC2028_SLEEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) mutex_unlock(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) static void xc2028_dvb_release(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) mutex_lock(&xc2028_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) /* only perform final cleanup if this is the last instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) if (hybrid_tuner_report_instance_count(priv) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) free_firmware(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) if (priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) hybrid_tuner_release_state(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) mutex_unlock(&xc2028_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) fe->tuner_priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) static int xc2028_get_frequency(struct dvb_frontend *fe, u32 *frequency)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) rc = check_device_status(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) *frequency = priv->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) static void load_firmware_cb(const struct firmware *fw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) void *context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) struct dvb_frontend *fe = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) tuner_dbg("request_firmware_nowait(): %s\n", fw ? "OK" : "error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) if (!fw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) tuner_err("Could not load firmware %s.\n", priv->fname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) priv->state = XC2028_NODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) rc = load_all_firmwares(fe, fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) release_firmware(fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) priv->state = XC2028_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) static int xc2028_set_config(struct dvb_frontend *fe, void *priv_cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) struct xc2028_data *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) struct xc2028_ctrl *p = priv_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) tuner_dbg("%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) mutex_lock(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) * Copy the config data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) memcpy(&priv->ctrl, p, sizeof(priv->ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) * If firmware name changed, frees firmware. As free_firmware will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) * reset the status to NO_FIRMWARE, this forces a new request_firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) if (!firmware_name[0] && p->fname &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) priv->fname && strcmp(p->fname, priv->fname))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) free_firmware(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) if (priv->ctrl.max_len < 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) priv->ctrl.max_len = 13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) if (priv->state == XC2028_NO_FIRMWARE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) if (!firmware_name[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) priv->fname = kstrdup(p->fname, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) priv->fname = firmware_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) if (!priv->fname) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) rc = request_firmware_nowait(THIS_MODULE, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) priv->fname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) priv->i2c_props.adap->dev.parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) fe, load_firmware_cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) tuner_err("Failed to request firmware %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) priv->fname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) priv->state = XC2028_NODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) priv->state = XC2028_WAITING_FIRMWARE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) mutex_unlock(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) static const struct dvb_tuner_ops xc2028_dvb_tuner_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) .info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) .name = "Xceive XC3028",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) .frequency_min_hz = 42 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) .frequency_max_hz = 864 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) .frequency_step_hz = 50 * kHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) .set_config = xc2028_set_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) .set_analog_params = xc2028_set_analog_freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) .release = xc2028_dvb_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) .get_frequency = xc2028_get_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) .get_rf_strength = xc2028_signal,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) .get_afc = xc2028_get_afc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) .set_params = xc2028_set_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) .sleep = xc2028_sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) struct dvb_frontend *xc2028_attach(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) struct xc2028_config *cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) struct xc2028_data *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) int instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) if (debug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) printk(KERN_DEBUG "xc2028: Xcv2028/3028 init called!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) if (NULL == cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) if (!fe) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) printk(KERN_ERR "xc2028: No frontend!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) mutex_lock(&xc2028_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) instance = hybrid_tuner_request_state(struct xc2028_data, priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) hybrid_tuner_instance_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) cfg->i2c_adap, cfg->i2c_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) "xc2028");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) switch (instance) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) /* memory allocation failure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) /* new tuner instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) priv->ctrl.max_len = 13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) mutex_init(&priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) fe->tuner_priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) /* existing tuner instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) fe->tuner_priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) memcpy(&fe->ops.tuner_ops, &xc2028_dvb_tuner_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) sizeof(xc2028_dvb_tuner_ops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) tuner_info("type set to %s\n", "XCeive xc2028/xc3028 tuner");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) if (cfg->ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) xc2028_set_config(fe, cfg->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) mutex_unlock(&xc2028_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) return fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) mutex_unlock(&xc2028_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) xc2028_dvb_release(fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) EXPORT_SYMBOL(xc2028_attach);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) MODULE_DESCRIPTION("Xceive xc2028/xc3028 tuner driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) MODULE_AUTHOR("Michel Ludwig <michel.ludwig@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@kernel.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) MODULE_FIRMWARE(XC2028_DEFAULT_FIRMWARE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) MODULE_FIRMWARE(XC3028L_DEFAULT_FIRMWARE);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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