^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * i2c tv tuner chip device driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * controls all those simple 4-control-bytes style tuners.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This "tuner-simple" module was split apart from the original "tuner" module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <media/tuner.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <media/tuner-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "tuner-i2c.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "tuner-simple.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static int debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) module_param(debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MODULE_PARM_DESC(debug, "enable verbose debug messages");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define TUNER_SIMPLE_MAX 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static unsigned int simple_devcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) module_param(offset, int, 0664);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MODULE_PARM_DESC(offset, "Allows to specify an offset for tuner");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static unsigned int atv_input[TUNER_SIMPLE_MAX] = \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) { [0 ... (TUNER_SIMPLE_MAX-1)] = 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static unsigned int dtv_input[TUNER_SIMPLE_MAX] = \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) { [0 ... (TUNER_SIMPLE_MAX-1)] = 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) module_param_array(atv_input, int, NULL, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) module_param_array(dtv_input, int, NULL, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MODULE_PARM_DESC(atv_input, "specify atv rf input, 0 for autoselect");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MODULE_PARM_DESC(dtv_input, "specify dtv rf input, 0 for autoselect");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* tv standard selection for Temic 4046 FM5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) this value takes the low bits of control byte 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) from datasheet Rev.01, Feb.00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) standard BG I L L2 D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) picture IF 38.9 38.9 38.9 33.95 38.9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) sound 1 33.4 32.9 32.4 40.45 32.4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) sound 2 33.16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) NICAM 33.05 32.348 33.05 33.05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define TEMIC_SET_PAL_I 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define TEMIC_SET_PAL_DK 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define TEMIC_SET_PAL_L 0x0a /* SECAM ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define TEMIC_SET_PAL_L2 0x0b /* change IF ! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define TEMIC_SET_PAL_BG 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* tv tuner system standard selection for Philips FQ1216ME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) this value takes the low bits of control byte 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) from datasheet "1999 Nov 16" (supersedes "1999 Mar 23")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) standard BG DK I L L`
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) picture carrier 38.90 38.90 38.90 38.90 33.95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) colour 34.47 34.47 34.47 34.47 38.38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) sound 1 33.40 32.40 32.90 32.40 40.45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) sound 2 33.16 - - - -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) NICAM 33.05 33.05 32.35 33.05 39.80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PHILIPS_SET_PAL_I 0x01 /* Bit 2 always zero !*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PHILIPS_SET_PAL_BGDK 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define PHILIPS_SET_PAL_L2 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define PHILIPS_SET_PAL_L 0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* system switching for Philips FI1216MF MK2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) from datasheet "1996 Jul 09",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) standard BG L L'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) picture carrier 38.90 38.90 33.95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) colour 34.47 34.37 38.38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) sound 1 33.40 32.40 40.45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) sound 2 33.16 - -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) NICAM 33.05 33.05 39.80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define PHILIPS_MF_SET_STD_BG 0x01 /* Bit 2 must be zero, Bit 3 is system output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define PHILIPS_MF_SET_STD_L 0x03 /* Used on Secam France */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define PHILIPS_MF_SET_STD_LC 0x02 /* Used on SECAM L' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* Control byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define TUNER_RATIO_MASK 0x06 /* Bit cb1:cb2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define TUNER_RATIO_SELECT_50 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define TUNER_RATIO_SELECT_32 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define TUNER_RATIO_SELECT_166 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define TUNER_RATIO_SELECT_62 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define TUNER_CHARGE_PUMP 0x40 /* Bit cb6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* Status byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define TUNER_POR 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define TUNER_FL 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define TUNER_MODE 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define TUNER_AFC 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define TUNER_SIGNAL 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define TUNER_STEREO 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define TUNER_PLL_LOCKED 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define TUNER_STEREO_MK3 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static DEFINE_MUTEX(tuner_simple_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static LIST_HEAD(hybrid_tuner_instance_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct tuner_simple_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) unsigned int nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u16 last_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct tuner_i2c_props i2c_props;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct list_head hybrid_tuner_instance_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) unsigned int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct tunertype *tun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u32 frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u32 bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) bool radio_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static int tuner_read_status(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned char byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (1 != tuner_i2c_xfer_recv(&priv->i2c_props, &byte, 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static inline int tuner_signal(const int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return (status & TUNER_SIGNAL) << 13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static inline int tuner_stereo(const int type, const int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) case TUNER_PHILIPS_FM1216ME_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) case TUNER_PHILIPS_FM1236_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) case TUNER_PHILIPS_FM1256_IH3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) case TUNER_LG_NTSC_TAPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) case TUNER_TCL_MF02GIP_5N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return ((status & TUNER_SIGNAL) == TUNER_STEREO_MK3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) case TUNER_PHILIPS_FM1216MK5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return status | TUNER_STEREO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return status & TUNER_STEREO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static inline int tuner_islocked(const int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return (status & TUNER_FL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static inline int tuner_afcstatus(const int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return (status & TUNER_AFC) - 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static int simple_get_status(struct dvb_frontend *fe, u32 *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int tuner_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (priv->i2c_props.adap == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) tuner_status = tuner_read_status(fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) *status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (tuner_islocked(tuner_status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) *status = TUNER_STATUS_LOCKED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (tuner_stereo(priv->type, tuner_status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) *status |= TUNER_STATUS_STEREO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) tuner_dbg("AFC Status: %d\n", tuner_afcstatus(tuner_status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static int simple_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) int signal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (priv->i2c_props.adap == NULL || !priv->radio_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) signal = tuner_signal(tuner_read_status(fe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) *strength = signal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) tuner_dbg("Signal strength: %d\n", signal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static inline char *tuner_param_name(enum param_type type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) case TUNER_PARAM_TYPE_RADIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) name = "radio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) case TUNER_PARAM_TYPE_PAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) name = "pal";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) case TUNER_PARAM_TYPE_SECAM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) name = "secam";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) case TUNER_PARAM_TYPE_NTSC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) name = "ntsc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) case TUNER_PARAM_TYPE_DIGITAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) name = "digital";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) name = "unknown";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static struct tuner_params *simple_tuner_params(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) enum param_type desired_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct tunertype *tun = priv->tun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) for (i = 0; i < tun->count; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (desired_type == tun->params[i].type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* use default tuner params if desired_type not available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (i == tun->count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) tuner_dbg("desired params (%s) undefined for tuner %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) tuner_param_name(desired_type), priv->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) tuner_dbg("using tuner params #%d (%s)\n", i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) tuner_param_name(tun->params[i].type));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return &tun->params[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static int simple_config_lookup(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct tuner_params *t_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) unsigned *frequency, u8 *config, u8 *cb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) for (i = 0; i < t_params->count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (*frequency > t_params->ranges[i].limit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (i == t_params->count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) tuner_dbg("frequency out of range (%d > %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) *frequency, t_params->ranges[i - 1].limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) *frequency = t_params->ranges[--i].limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) *config = t_params->ranges[i].config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) *cb = t_params->ranges[i].cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) tuner_dbg("freq = %d.%02d (%d), range = %d, config = 0x%02x, cb = 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) *frequency / 16, *frequency % 16 * 100 / 16, *frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) i, *config, *cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static void simple_set_rf_input(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) u8 *config, u8 *cb, unsigned int rf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) switch (priv->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) case TUNER_PHILIPS_TUV1236D:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) switch (rf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) *cb |= 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) *cb &= ~0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) case TUNER_PHILIPS_FCV1236D:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) switch (rf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) *cb |= 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) *cb &= ~0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static int simple_std_setup(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) struct analog_parameters *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) u8 *config, u8 *cb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /* tv norm specific stuff for multi-norm tuners */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) switch (priv->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) case TUNER_PHILIPS_SECAM: /* FI1216MF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* 0x01 -> ??? no change ??? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* 0x02 -> PAL BDGHI / SECAM L */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /* 0x04 -> ??? PAL others / SECAM others ??? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) *cb &= ~0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (params->std & V4L2_STD_SECAM_L)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /* also valid for V4L2_STD_SECAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) *cb |= PHILIPS_MF_SET_STD_L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) else if (params->std & V4L2_STD_SECAM_LC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) *cb |= PHILIPS_MF_SET_STD_LC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) else /* V4L2_STD_B|V4L2_STD_GH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) *cb |= PHILIPS_MF_SET_STD_BG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) case TUNER_TEMIC_4046FM5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) *cb &= ~0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (params->std & V4L2_STD_PAL_BG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) *cb |= TEMIC_SET_PAL_BG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) } else if (params->std & V4L2_STD_PAL_I) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) *cb |= TEMIC_SET_PAL_I;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) } else if (params->std & V4L2_STD_PAL_DK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) *cb |= TEMIC_SET_PAL_DK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) } else if (params->std & V4L2_STD_SECAM_L) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) *cb |= TEMIC_SET_PAL_L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) case TUNER_PHILIPS_FQ1216ME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) *cb &= ~0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (params->std & (V4L2_STD_PAL_BG|V4L2_STD_PAL_DK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) *cb |= PHILIPS_SET_PAL_BGDK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) } else if (params->std & V4L2_STD_PAL_I) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) *cb |= PHILIPS_SET_PAL_I;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) } else if (params->std & V4L2_STD_SECAM_L) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) *cb |= PHILIPS_SET_PAL_L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) case TUNER_PHILIPS_FCV1236D:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /* 0x00 -> ATSC antenna input 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /* 0x01 -> ATSC antenna input 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /* 0x02 -> NTSC antenna input 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) /* 0x03 -> NTSC antenna input 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) *cb &= ~0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (!(params->std & V4L2_STD_ATSC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) *cb |= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) case TUNER_MICROTUNE_4042FI5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* Set the charge pump for fast tuning */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) *config |= TUNER_CHARGE_PUMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) case TUNER_PHILIPS_TUV1236D:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) struct tuner_i2c_props i2c = priv->i2c_props;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* 0x40 -> ATSC antenna input 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /* 0x48 -> ATSC antenna input 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /* 0x00 -> NTSC antenna input 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* 0x08 -> NTSC antenna input 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) u8 buffer[4] = { 0x14, 0x00, 0x17, 0x00};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) *cb &= ~0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) if (params->std & V4L2_STD_ATSC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) *cb |= 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) buffer[1] = 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) /* set to the correct mode (analog or digital) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) i2c.addr = 0x0a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) rc = tuner_i2c_xfer_send(&i2c, &buffer[0], 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (2 != rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) tuner_warn("i2c i/o error: rc == %d (should be 2)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) rc = tuner_i2c_xfer_send(&i2c, &buffer[2], 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (2 != rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) tuner_warn("i2c i/o error: rc == %d (should be 2)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (atv_input[priv->nr])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) simple_set_rf_input(fe, config, cb, atv_input[priv->nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static int simple_set_aux_byte(struct dvb_frontend *fe, u8 config, u8 aux)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) u8 buffer[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) buffer[0] = (config & ~0x38) | 0x18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) buffer[1] = aux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) tuner_dbg("setting aux byte: 0x%02x 0x%02x\n", buffer[0], buffer[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (2 != rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) tuner_warn("i2c i/o error: rc == %d (should be 2)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return rc == 2 ? 0 : rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static int simple_post_tune(struct dvb_frontend *fe, u8 *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) u16 div, u8 config, u8 cb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) switch (priv->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) case TUNER_LG_TDVS_H06XF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) simple_set_aux_byte(fe, config, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) case TUNER_PHILIPS_FQ1216LME_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) simple_set_aux_byte(fe, config, 0x60); /* External AGC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) case TUNER_MICROTUNE_4042FI5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) /* FIXME - this may also work for other tuners */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) unsigned long timeout = jiffies + msecs_to_jiffies(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) u8 status_byte = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* Wait until the PLL locks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (time_after(jiffies, timeout))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) rc = tuner_i2c_xfer_recv(&priv->i2c_props,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) &status_byte, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (1 != rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) tuner_warn("i2c i/o read error: rc == %d (should be 1)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (status_byte & TUNER_PLL_LOCKED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /* Set the charge pump for optimized phase noise figure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) config &= ~TUNER_CHARGE_PUMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) buffer[0] = (div>>8) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) buffer[1] = div & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) buffer[2] = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) buffer[3] = cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) buffer[0], buffer[1], buffer[2], buffer[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) if (4 != rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) tuner_warn("i2c i/o error: rc == %d (should be 4)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) static int simple_radio_bandswitch(struct dvb_frontend *fe, u8 *buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) switch (priv->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) case TUNER_TENA_9533_DI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) case TUNER_YMEC_TVF_5533MF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) tuner_dbg("This tuner doesn't have FM. Most cards have a TEA5767 for FM\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) case TUNER_PHILIPS_FM1216ME_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) case TUNER_PHILIPS_FM1236_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) case TUNER_PHILIPS_FMD1216ME_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) case TUNER_PHILIPS_FMD1216MEX_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) case TUNER_LG_NTSC_TAPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) case TUNER_PHILIPS_FM1256_IH3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) case TUNER_TCL_MF02GIP_5N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) buffer[3] = 0x19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) case TUNER_PHILIPS_FM1216MK5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) buffer[2] = 0x88;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) buffer[3] = 0x09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) case TUNER_TNF_5335MF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) buffer[3] = 0x11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) case TUNER_LG_PAL_FM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) buffer[3] = 0xa5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) case TUNER_THOMSON_DTT761X:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) buffer[3] = 0x39;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) case TUNER_PHILIPS_FQ1216LME_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) case TUNER_PHILIPS_FQ1236_MK5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) tuner_err("This tuner doesn't have FM\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) /* Set the low band for sanity, since it covers 88-108 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) buffer[3] = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) case TUNER_MICROTUNE_4049FM5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) buffer[3] = 0xa4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static int simple_set_tv_freq(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) struct analog_parameters *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) u8 config, cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) u16 div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) u8 buffer[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) int rc, IFPCoff, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) enum param_type desired_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct tuner_params *t_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /* IFPCoff = Video Intermediate Frequency - Vif:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 940 =16*58.75 NTSC/J (Japan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 732 =16*45.75 M/N STD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 704 =16*44 ATSC (at DVB code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 632 =16*39.50 I U.K.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 622.4=16*38.90 B/G D/K I, L STD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 592 =16*37.00 D China
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 590 =16.36.875 B Australia
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 543.2=16*33.95 L' STD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 171.2=16*10.70 FM Radio (at set_radio_freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if (params->std == V4L2_STD_NTSC_M_JP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) IFPCoff = 940;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) desired_type = TUNER_PARAM_TYPE_NTSC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) } else if ((params->std & V4L2_STD_MN) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) !(params->std & ~V4L2_STD_MN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) IFPCoff = 732;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) desired_type = TUNER_PARAM_TYPE_NTSC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) } else if (params->std == V4L2_STD_SECAM_LC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) IFPCoff = 543;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) desired_type = TUNER_PARAM_TYPE_SECAM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) IFPCoff = 623;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) desired_type = TUNER_PARAM_TYPE_PAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) t_params = simple_tuner_params(fe, desired_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) i = simple_config_lookup(fe, t_params, ¶ms->frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) &config, &cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) div = params->frequency + IFPCoff + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) tuner_dbg("Freq= %d.%02d MHz, V_IF=%d.%02d MHz, Offset=%d.%02d MHz, div=%0d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) params->frequency / 16, params->frequency % 16 * 100 / 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) IFPCoff / 16, IFPCoff % 16 * 100 / 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) offset / 16, offset % 16 * 100 / 16, div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* tv norm specific stuff for multi-norm tuners */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) simple_std_setup(fe, params, &config, &cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (t_params->cb_first_if_lower_freq && div < priv->last_div) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) buffer[0] = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) buffer[1] = cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) buffer[2] = (div>>8) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) buffer[3] = div & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) buffer[0] = (div>>8) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) buffer[1] = div & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) buffer[2] = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) buffer[3] = cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) priv->last_div = div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) if (t_params->has_tda9887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) struct v4l2_priv_tun_config tda9887_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) int tda_config = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) int is_secam_l = (params->std & (V4L2_STD_SECAM_L |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) V4L2_STD_SECAM_LC)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) !(params->std & ~(V4L2_STD_SECAM_L |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) V4L2_STD_SECAM_LC));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) tda9887_cfg.tuner = TUNER_TDA9887;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) tda9887_cfg.priv = &tda_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) if (params->std == V4L2_STD_SECAM_LC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) if (t_params->port1_active ^ t_params->port1_invert_for_secam_lc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) tda_config |= TDA9887_PORT1_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) if (t_params->port2_active ^ t_params->port2_invert_for_secam_lc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) tda_config |= TDA9887_PORT2_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (t_params->port1_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) tda_config |= TDA9887_PORT1_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (t_params->port2_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) tda_config |= TDA9887_PORT2_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) if (t_params->intercarrier_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) tda_config |= TDA9887_INTERCARRIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if (is_secam_l) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (i == 0 && t_params->default_top_secam_low)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) tda_config |= TDA9887_TOP(t_params->default_top_secam_low);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) else if (i == 1 && t_params->default_top_secam_mid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) tda_config |= TDA9887_TOP(t_params->default_top_secam_mid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) else if (t_params->default_top_secam_high)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) tda_config |= TDA9887_TOP(t_params->default_top_secam_high);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) if (i == 0 && t_params->default_top_low)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) tda_config |= TDA9887_TOP(t_params->default_top_low);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) else if (i == 1 && t_params->default_top_mid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) tda_config |= TDA9887_TOP(t_params->default_top_mid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) else if (t_params->default_top_high)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) tda_config |= TDA9887_TOP(t_params->default_top_high);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) if (t_params->default_pll_gating_18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) tda_config |= TDA9887_GATING_18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) i2c_clients_command(priv->i2c_props.adap, TUNER_SET_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) &tda9887_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) buffer[0], buffer[1], buffer[2], buffer[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (4 != rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) tuner_warn("i2c i/o error: rc == %d (should be 4)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) simple_post_tune(fe, &buffer[0], div, config, cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static int simple_set_radio_freq(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) struct analog_parameters *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) struct tunertype *tun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) u8 buffer[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) u16 div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) int rc, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) struct tuner_params *t_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) unsigned int freq = params->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) bool mono = params->audmode == V4L2_TUNER_MODE_MONO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) tun = priv->tun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) for (j = tun->count-1; j > 0; j--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) if (tun->params[j].type == TUNER_PARAM_TYPE_RADIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) /* default t_params (j=0) will be used if desired type wasn't found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) t_params = &tun->params[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) /* Select Radio 1st IF used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) switch (t_params->radio_if) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) case 0: /* 10.7 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) freq += (unsigned int)(10.7*16000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) case 1: /* 33.3 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) freq += (unsigned int)(33.3*16000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) case 2: /* 41.3 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) freq += (unsigned int)(41.3*16000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) tuner_warn("Unsupported radio_if value %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) t_params->radio_if);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) buffer[2] = (t_params->ranges[0].config & ~TUNER_RATIO_MASK) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) TUNER_RATIO_SELECT_50; /* 50 kHz step */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /* Bandswitch byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (simple_radio_bandswitch(fe, &buffer[0]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) /* Convert from 1/16 kHz V4L steps to 1/20 MHz (=50 kHz) PLL steps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) freq * (1 Mhz / 16000 V4L steps) * (20 PLL steps / 1 MHz) =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) freq * (1/800) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) div = (freq + 400) / 800;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (t_params->cb_first_if_lower_freq && div < priv->last_div) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) buffer[0] = buffer[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) buffer[1] = buffer[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) buffer[2] = (div>>8) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) buffer[3] = div & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) buffer[0] = (div>>8) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) buffer[1] = div & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) tuner_dbg("radio 0x%02x 0x%02x 0x%02x 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) buffer[0], buffer[1], buffer[2], buffer[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) priv->last_div = div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) if (t_params->has_tda9887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) int config = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) struct v4l2_priv_tun_config tda9887_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) tda9887_cfg.tuner = TUNER_TDA9887;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) tda9887_cfg.priv = &config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) if (t_params->port1_active &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) !t_params->port1_fm_high_sensitivity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) config |= TDA9887_PORT1_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) if (t_params->port2_active &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) !t_params->port2_fm_high_sensitivity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) config |= TDA9887_PORT2_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) if (t_params->intercarrier_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) config |= TDA9887_INTERCARRIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) if (t_params->port1_set_for_fm_mono && mono)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) config &= ~TDA9887_PORT1_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) if (t_params->fm_gain_normal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) config |= TDA9887_GAIN_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) if (t_params->radio_if == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) config |= TDA9887_RIF_41_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) i2c_clients_command(priv->i2c_props.adap, TUNER_SET_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) &tda9887_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) if (4 != rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) tuner_warn("i2c i/o error: rc == %d (should be 4)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) /* Write AUX byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) switch (priv->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) case TUNER_PHILIPS_FM1216ME_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) buffer[2] = 0x98;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) buffer[3] = 0x20; /* set TOP AGC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) if (4 != rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) tuner_warn("i2c i/o error: rc == %d (should be 4)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) static int simple_set_params(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) struct analog_parameters *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) int ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) if (priv->i2c_props.adap == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) switch (params->mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) case V4L2_TUNER_RADIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) priv->radio_mode = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) ret = simple_set_radio_freq(fe, params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) priv->frequency = params->frequency * 125 / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) case V4L2_TUNER_ANALOG_TV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) case V4L2_TUNER_DIGITAL_TV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) priv->radio_mode = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) ret = simple_set_tv_freq(fe, params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) priv->frequency = params->frequency * 62500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) priv->bandwidth = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) static void simple_set_dvb(struct dvb_frontend *fe, u8 *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) const u32 delsys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) const u32 frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) const u32 bandwidth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) switch (priv->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) case TUNER_PHILIPS_FMD1216ME_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) case TUNER_PHILIPS_FMD1216MEX_MK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) if (bandwidth == 8000000 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) frequency >= 158870000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) buf[3] |= 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) case TUNER_PHILIPS_TD1316:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) /* determine band */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) buf[3] |= (frequency < 161000000) ? 1 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) (frequency < 444000000) ? 2 : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) /* setup PLL filter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) if (bandwidth == 8000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) buf[3] |= 1 << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) case TUNER_PHILIPS_TUV1236D:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) case TUNER_PHILIPS_FCV1236D:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) unsigned int new_rf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (dtv_input[priv->nr])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) new_rf = dtv_input[priv->nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) switch (delsys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) case SYS_DVBC_ANNEX_B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) new_rf = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) case SYS_ATSC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) new_rf = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) simple_set_rf_input(fe, &buf[2], &buf[3], new_rf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static u32 simple_dvb_configure(struct dvb_frontend *fe, u8 *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) const u32 delsys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) const u32 freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) const u32 bw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) /* This function returns the tuned frequency on success, 0 on error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) struct tunertype *tun = priv->tun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) struct tuner_params *t_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) u8 config, cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) u32 div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) u32 frequency = freq / 62500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) if (!tun->stepsize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) /* tuner-core was loaded before the digital tuner was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) * configured and somehow picked the wrong tuner type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) tuner_err("attempt to treat tuner %d (%s) as digital tuner without stepsize defined.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) priv->type, priv->tun->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) return 0; /* failure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) t_params = simple_tuner_params(fe, TUNER_PARAM_TYPE_DIGITAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) ret = simple_config_lookup(fe, t_params, &frequency, &config, &cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) return 0; /* failure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) div = ((frequency + t_params->iffreq) * 62500 + offset +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) tun->stepsize/2) / tun->stepsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) buf[0] = div >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) buf[1] = div & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) buf[2] = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) buf[3] = cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) simple_set_dvb(fe, buf, delsys, freq, bw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) tuner_dbg("%s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) tun->name, div, buf[0], buf[1], buf[2], buf[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) /* calculate the frequency we set it to */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) return (div * tun->stepsize) - t_params->iffreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) static int simple_dvb_calc_regs(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) u8 *buf, int buf_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) struct dtv_frontend_properties *c = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) u32 delsys = c->delivery_system;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) u32 bw = c->bandwidth_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) u32 frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) if (buf_len < 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) frequency = simple_dvb_configure(fe, buf+1, delsys, c->frequency, bw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) if (frequency == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) buf[0] = priv->i2c_props.addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) priv->frequency = frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) priv->bandwidth = c->bandwidth_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) return 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) static int simple_dvb_set_params(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) struct dtv_frontend_properties *c = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) u32 delsys = c->delivery_system;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) u32 bw = c->bandwidth_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) u32 freq = c->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) u32 frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) u32 prev_freq, prev_bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) u8 buf[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) if (priv->i2c_props.adap == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) prev_freq = priv->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) prev_bw = priv->bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) frequency = simple_dvb_configure(fe, buf+1, delsys, freq, bw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) if (frequency == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) buf[0] = priv->i2c_props.addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) priv->frequency = frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) priv->bandwidth = bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) /* put analog demod in standby when tuning digital */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) if (fe->ops.analog_ops.standby)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) fe->ops.analog_ops.standby(fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) /* buf[0] contains the i2c address, but *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) * we already have it in i2c_props.addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) ret = tuner_i2c_xfer_send(&priv->i2c_props, buf+1, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) if (ret != 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) /* calc_regs sets frequency and bandwidth. if we failed, unset them */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) priv->frequency = prev_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) priv->bandwidth = prev_bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) static int simple_init(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) if (priv->i2c_props.adap == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) if (priv->tun->initdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) ret = tuner_i2c_xfer_send(&priv->i2c_props,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) priv->tun->initdata + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) priv->tun->initdata[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) if (ret != priv->tun->initdata[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) static int simple_sleep(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) if (priv->i2c_props.adap == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) if (priv->tun->sleepdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) ret = tuner_i2c_xfer_send(&priv->i2c_props,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) priv->tun->sleepdata + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) priv->tun->sleepdata[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) if (ret != priv->tun->sleepdata[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) static void simple_release(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) mutex_lock(&tuner_simple_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) if (priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) hybrid_tuner_release_state(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) mutex_unlock(&tuner_simple_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) fe->tuner_priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) static int simple_get_frequency(struct dvb_frontend *fe, u32 *frequency)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) *frequency = priv->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) static int simple_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) struct tuner_simple_priv *priv = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) *bandwidth = priv->bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) static const struct dvb_tuner_ops simple_tuner_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) .init = simple_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) .sleep = simple_sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) .set_analog_params = simple_set_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) .set_params = simple_dvb_set_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) .calc_regs = simple_dvb_calc_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) .release = simple_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) .get_frequency = simple_get_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) .get_bandwidth = simple_get_bandwidth,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) .get_status = simple_get_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) .get_rf_strength = simple_get_rf_strength,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) struct dvb_frontend *simple_tuner_attach(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) u8 i2c_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) unsigned int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) struct tuner_simple_priv *priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) int instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) if (type >= tuner_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) printk(KERN_WARNING "%s: invalid tuner type: %d (max: %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) __func__, type, tuner_count-1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) /* If i2c_adap is set, check that the tuner is at the correct address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) * Otherwise, if i2c_adap is NULL, the tuner will be programmed directly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) * by the digital demod via calc_regs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) if (i2c_adap != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) u8 b[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) struct i2c_msg msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) .addr = i2c_addr, .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) .buf = b, .len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) if (1 != i2c_transfer(i2c_adap, &msg, 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) printk(KERN_WARNING "tuner-simple %d-%04x: unable to probe %s, proceeding anyway.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) i2c_adapter_id(i2c_adap), i2c_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) tuners[type].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) fe->ops.i2c_gate_ctrl(fe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) mutex_lock(&tuner_simple_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) instance = hybrid_tuner_request_state(struct tuner_simple_priv, priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) hybrid_tuner_instance_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) i2c_adap, i2c_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) "tuner-simple");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) switch (instance) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) mutex_unlock(&tuner_simple_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) fe->tuner_priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) priv->type = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) priv->tun = &tuners[type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) priv->nr = simple_devcount++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) fe->tuner_priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) mutex_unlock(&tuner_simple_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) memcpy(&fe->ops.tuner_ops, &simple_tuner_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) sizeof(struct dvb_tuner_ops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) if (type != priv->type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) tuner_warn("couldn't set type to %d. Using %d (%s) instead\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) type, priv->type, priv->tun->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) tuner_info("type set to %d (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) priv->type, priv->tun->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) if ((debug) || ((atv_input[priv->nr] > 0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) (dtv_input[priv->nr] > 0))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) if (0 == atv_input[priv->nr])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) tuner_info("tuner %d atv rf input will be autoselected\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) priv->nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) tuner_info("tuner %d atv rf input will be set to input %d (insmod option)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) priv->nr, atv_input[priv->nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) if (0 == dtv_input[priv->nr])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) tuner_info("tuner %d dtv rf input will be autoselected\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) priv->nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) tuner_info("tuner %d dtv rf input will be set to input %d (insmod option)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) priv->nr, dtv_input[priv->nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) strscpy(fe->ops.tuner_ops.info.name, priv->tun->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) sizeof(fe->ops.tuner_ops.info.name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) return fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) EXPORT_SYMBOL_GPL(simple_tuner_attach);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) MODULE_DESCRIPTION("Simple 4-control-bytes style tuner driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) MODULE_AUTHOR("Ralph Metzler, Gerd Knorr, Gunther Mayer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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