^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Silicon Labs Si2146/2147/2148/2157/2158 silicon tuner driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef SI2157_PRIV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define SI2157_PRIV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <media/v4l2-mc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "si2157.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) enum si2157_pads {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) SI2157_PAD_RF_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) SI2157_PAD_VID_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) SI2157_PAD_AUD_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) SI2157_NUM_PADS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* state struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct si2157_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct mutex i2c_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct dvb_frontend *fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned int active:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned int inversion:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned int dont_load_firmware:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u8 chiptype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u8 if_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 if_frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u32 bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u32 frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct delayed_work stat_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #if defined(CONFIG_MEDIA_CONTROLLER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct media_device *mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct media_entity ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct media_pad pad[SI2157_NUM_PADS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define SI2157_CHIPTYPE_SI2157 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define SI2157_CHIPTYPE_SI2146 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define SI2157_CHIPTYPE_SI2141 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define SI2157_CHIPTYPE_SI2177 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* firmware command struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define SI2157_ARGLEN 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct si2157_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u8 args[SI2157_ARGLEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unsigned wlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned rlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define SI2158_A20_FIRMWARE "dvb-tuner-si2158-a20-01.fw"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define SI2141_A10_FIRMWARE "dvb-tuner-si2141-a10-01.fw"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define SI2157_A30_FIRMWARE "dvb-tuner-si2157-a30-01.fw"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #endif