Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *  mxl5007t.h - driver for the MaxLinear MxL5007T silicon tuner
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (C) 2008 Michael Krufky <mkrufky@linuxtv.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef __MXL5007T_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define __MXL5007T_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* ------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) enum mxl5007t_if_freq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	MxL_IF_4_MHZ,      /*  4000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	MxL_IF_4_5_MHZ,    /*  4500000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	MxL_IF_4_57_MHZ,   /*  4570000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	MxL_IF_5_MHZ,      /*  5000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	MxL_IF_5_38_MHZ,   /*  5380000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	MxL_IF_6_MHZ,      /*  6000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	MxL_IF_6_28_MHZ,   /*  6280000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	MxL_IF_9_1915_MHZ, /*  9191500 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	MxL_IF_35_25_MHZ,  /* 35250000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	MxL_IF_36_15_MHZ,  /* 36150000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	MxL_IF_44_MHZ,     /* 44000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) enum mxl5007t_xtal_freq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	MxL_XTAL_16_MHZ,      /* 16000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	MxL_XTAL_20_MHZ,      /* 20000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	MxL_XTAL_20_25_MHZ,   /* 20250000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	MxL_XTAL_20_48_MHZ,   /* 20480000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	MxL_XTAL_24_MHZ,      /* 24000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	MxL_XTAL_25_MHZ,      /* 25000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	MxL_XTAL_25_14_MHZ,   /* 25140000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	MxL_XTAL_27_MHZ,      /* 27000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	MxL_XTAL_28_8_MHZ,    /* 28800000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	MxL_XTAL_32_MHZ,      /* 32000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	MxL_XTAL_40_MHZ,      /* 40000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	MxL_XTAL_44_MHZ,      /* 44000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	MxL_XTAL_48_MHZ,      /* 48000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	MxL_XTAL_49_3811_MHZ, /* 49381100 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) enum mxl5007t_clkout_amp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	MxL_CLKOUT_AMP_0_94V = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	MxL_CLKOUT_AMP_0_53V = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	MxL_CLKOUT_AMP_0_37V = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	MxL_CLKOUT_AMP_0_28V = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	MxL_CLKOUT_AMP_0_23V = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	MxL_CLKOUT_AMP_0_20V = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	MxL_CLKOUT_AMP_0_17V = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	MxL_CLKOUT_AMP_0_15V = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct mxl5007t_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	s32 if_diff_out_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	enum mxl5007t_clkout_amp clk_out_amp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	enum mxl5007t_xtal_freq xtal_freq_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	enum mxl5007t_if_freq if_freq_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	unsigned int invert_if:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	unsigned int loop_thru_enable:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	unsigned int clk_out_enable:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #if IS_REACHABLE(CONFIG_MEDIA_TUNER_MXL5007T)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) extern struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 					    struct i2c_adapter *i2c, u8 addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 					    struct mxl5007t_config *cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static inline struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 						   struct i2c_adapter *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 						   u8 addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 						   struct mxl5007t_config *cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #endif /* __MXL5007T_H__ */