^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * vivid-sdr-cap.c - software defined radio support functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kthread.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/freezer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/math64.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/v4l2-dv-timings.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <media/v4l2-event.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <media/v4l2-dv-timings.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/fixp-arith.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "vivid-core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "vivid-ctrls.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "vivid-sdr-cap.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* stream formats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct vivid_format {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u32 pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u32 buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* format descriptions for capture and preview */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static const struct vivid_format formats[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .pixelformat = V4L2_SDR_FMT_CU8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .buffersize = SDR_CAP_SAMPLES_PER_BUF * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .pixelformat = V4L2_SDR_FMT_CS8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .buffersize = SDR_CAP_SAMPLES_PER_BUF * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static const struct v4l2_frequency_band bands_adc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .tuner = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .type = V4L2_TUNER_ADC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .rangelow = 300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .rangehigh = 300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .tuner = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .type = V4L2_TUNER_ADC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .index = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .rangelow = 900001,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .rangehigh = 2800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .tuner = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .type = V4L2_TUNER_ADC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .index = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .rangelow = 3200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .rangehigh = 3200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* ADC band midpoints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define BAND_ADC_0 ((bands_adc[0].rangehigh + bands_adc[1].rangelow) / 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define BAND_ADC_1 ((bands_adc[1].rangehigh + bands_adc[2].rangelow) / 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static const struct v4l2_frequency_band bands_fm[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .tuner = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .type = V4L2_TUNER_RF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .rangelow = 50000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .rangehigh = 2000000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static void vivid_thread_sdr_cap_tick(struct vivid_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct vivid_buffer *sdr_cap_buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) dprintk(dev, 1, "SDR Capture Thread Tick\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Drop a certain percentage of buffers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (dev->perc_dropped_buffers &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) prandom_u32_max(100) < dev->perc_dropped_buffers)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) spin_lock(&dev->slock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (!list_empty(&dev->sdr_cap_active)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) sdr_cap_buf = list_entry(dev->sdr_cap_active.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct vivid_buffer, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) list_del(&sdr_cap_buf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) spin_unlock(&dev->slock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (sdr_cap_buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) sdr_cap_buf->vb.sequence = dev->sdr_cap_seq_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) v4l2_ctrl_request_setup(sdr_cap_buf->vb.vb2_buf.req_obj.req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) &dev->ctrl_hdl_sdr_cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) v4l2_ctrl_request_complete(sdr_cap_buf->vb.vb2_buf.req_obj.req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) &dev->ctrl_hdl_sdr_cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) vivid_sdr_cap_process(dev, sdr_cap_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) sdr_cap_buf->vb.vb2_buf.timestamp =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ktime_get_ns() + dev->time_wrap_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) vb2_buffer_done(&sdr_cap_buf->vb.vb2_buf, dev->dqbuf_error ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) dev->dqbuf_error = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int vivid_thread_sdr_cap(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct vivid_dev *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u64 samples_since_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u64 buffers_since_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u64 next_jiffies_since_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned long jiffies_since_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) unsigned long cur_jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned wait_jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) dprintk(dev, 1, "SDR Capture Thread Start\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) set_freezable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* Resets frame counters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) dev->sdr_cap_seq_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (dev->seq_wrap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dev->sdr_cap_seq_offset = 0xffffff80U;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dev->jiffies_sdr_cap = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) dev->sdr_cap_seq_resync = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) try_to_freeze();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (kthread_should_stop())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (!mutex_trylock(&dev->mutex)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) schedule_timeout_uninterruptible(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) cur_jiffies = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (dev->sdr_cap_seq_resync) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) dev->jiffies_sdr_cap = cur_jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) dev->sdr_cap_seq_offset = dev->sdr_cap_seq_count + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) dev->sdr_cap_seq_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dev->sdr_cap_seq_resync = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* Calculate the number of jiffies since we started streaming */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) jiffies_since_start = cur_jiffies - dev->jiffies_sdr_cap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* Get the number of buffers streamed since the start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) buffers_since_start =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) (u64)jiffies_since_start * dev->sdr_adc_freq +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) (HZ * SDR_CAP_SAMPLES_PER_BUF) / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) do_div(buffers_since_start, HZ * SDR_CAP_SAMPLES_PER_BUF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * After more than 0xf0000000 (rounded down to a multiple of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * 'jiffies-per-day' to ease jiffies_to_msecs calculation)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * jiffies have passed since we started streaming reset the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * counters and keep track of the sequence offset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (jiffies_since_start > JIFFIES_RESYNC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) dev->jiffies_sdr_cap = cur_jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) dev->sdr_cap_seq_offset = buffers_since_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) buffers_since_start = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) dev->sdr_cap_seq_count =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) buffers_since_start + dev->sdr_cap_seq_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) vivid_thread_sdr_cap_tick(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) mutex_unlock(&dev->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * Calculate the number of samples streamed since we started,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * not including the current buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) samples_since_start = buffers_since_start * SDR_CAP_SAMPLES_PER_BUF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* And the number of jiffies since we started */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) jiffies_since_start = jiffies - dev->jiffies_sdr_cap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* Increase by the number of samples in one buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) samples_since_start += SDR_CAP_SAMPLES_PER_BUF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * Calculate when that next buffer is supposed to start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * in jiffies since we started streaming.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) next_jiffies_since_start = samples_since_start * HZ +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) dev->sdr_adc_freq / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) do_div(next_jiffies_since_start, dev->sdr_adc_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* If it is in the past, then just schedule asap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (next_jiffies_since_start < jiffies_since_start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) next_jiffies_since_start = jiffies_since_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) wait_jiffies = next_jiffies_since_start - jiffies_since_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) schedule_timeout_interruptible(wait_jiffies ? wait_jiffies : 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) dprintk(dev, 1, "SDR Capture Thread End\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static int sdr_cap_queue_setup(struct vb2_queue *vq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) unsigned *nbuffers, unsigned *nplanes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned sizes[], struct device *alloc_devs[])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /* 2 = max 16-bit sample returned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) sizes[0] = SDR_CAP_SAMPLES_PER_BUF * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) *nplanes = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static int sdr_cap_buf_prepare(struct vb2_buffer *vb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) unsigned size = SDR_CAP_SAMPLES_PER_BUF * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) dprintk(dev, 1, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (dev->buf_prepare_error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * Error injection: test what happens if buf_prepare() returns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * an error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) dev->buf_prepare_error = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (vb2_plane_size(vb, 0) < size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) dprintk(dev, 1, "%s data will not fit into plane (%lu < %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) __func__, vb2_plane_size(vb, 0), size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) vb2_set_plane_payload(vb, 0, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static void sdr_cap_buf_queue(struct vb2_buffer *vb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct vivid_buffer *buf = container_of(vbuf, struct vivid_buffer, vb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) dprintk(dev, 1, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) spin_lock(&dev->slock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) list_add_tail(&buf->list, &dev->sdr_cap_active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) spin_unlock(&dev->slock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static int sdr_cap_start_streaming(struct vb2_queue *vq, unsigned count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct vivid_dev *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) dprintk(dev, 1, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) dev->sdr_cap_seq_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (dev->start_streaming_error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) dev->start_streaming_error = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) } else if (dev->kthread_sdr_cap == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) dev->kthread_sdr_cap = kthread_run(vivid_thread_sdr_cap, dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) "%s-sdr-cap", dev->v4l2_dev.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (IS_ERR(dev->kthread_sdr_cap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) v4l2_err(&dev->v4l2_dev, "kernel_thread() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) err = PTR_ERR(dev->kthread_sdr_cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) dev->kthread_sdr_cap = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) struct vivid_buffer *buf, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) list_for_each_entry_safe(buf, tmp, &dev->sdr_cap_active, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) list_del(&buf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) vb2_buffer_done(&buf->vb.vb2_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) VB2_BUF_STATE_QUEUED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) /* abort streaming and wait for last buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static void sdr_cap_stop_streaming(struct vb2_queue *vq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct vivid_dev *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (dev->kthread_sdr_cap == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) while (!list_empty(&dev->sdr_cap_active)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct vivid_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) buf = list_entry(dev->sdr_cap_active.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) struct vivid_buffer, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) list_del(&buf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) v4l2_ctrl_request_complete(buf->vb.vb2_buf.req_obj.req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) &dev->ctrl_hdl_sdr_cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /* shutdown control thread */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) kthread_stop(dev->kthread_sdr_cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) dev->kthread_sdr_cap = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static void sdr_cap_buf_request_complete(struct vb2_buffer *vb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) v4l2_ctrl_request_complete(vb->req_obj.req, &dev->ctrl_hdl_sdr_cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) const struct vb2_ops vivid_sdr_cap_qops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .queue_setup = sdr_cap_queue_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .buf_prepare = sdr_cap_buf_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .buf_queue = sdr_cap_buf_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .start_streaming = sdr_cap_start_streaming,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .stop_streaming = sdr_cap_stop_streaming,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .buf_request_complete = sdr_cap_buf_request_complete,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .wait_prepare = vb2_ops_wait_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .wait_finish = vb2_ops_wait_finish,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) int vivid_sdr_enum_freq_bands(struct file *file, void *fh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) struct v4l2_frequency_band *band)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) switch (band->tuner) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (band->index >= ARRAY_SIZE(bands_adc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) *band = bands_adc[band->index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (band->index >= ARRAY_SIZE(bands_fm))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) *band = bands_fm[band->index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) int vivid_sdr_g_frequency(struct file *file, void *fh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) struct v4l2_frequency *vf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) struct vivid_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) switch (vf->tuner) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) vf->frequency = dev->sdr_adc_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) vf->type = V4L2_TUNER_ADC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) vf->frequency = dev->sdr_fm_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) vf->type = V4L2_TUNER_RF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) int vivid_sdr_s_frequency(struct file *file, void *fh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) const struct v4l2_frequency *vf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct vivid_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) unsigned freq = vf->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) unsigned band;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) switch (vf->tuner) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (vf->type != V4L2_TUNER_ADC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (freq < BAND_ADC_0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) band = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) else if (freq < BAND_ADC_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) band = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) band = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) freq = clamp_t(unsigned, freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) bands_adc[band].rangelow,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) bands_adc[band].rangehigh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) if (vb2_is_streaming(&dev->vb_sdr_cap_q) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) freq != dev->sdr_adc_freq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /* resync the thread's timings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) dev->sdr_cap_seq_resync = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) dev->sdr_adc_freq = freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (vf->type != V4L2_TUNER_RF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) dev->sdr_fm_freq = clamp_t(unsigned, freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) bands_fm[0].rangelow,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) bands_fm[0].rangehigh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) int vivid_sdr_g_tuner(struct file *file, void *fh, struct v4l2_tuner *vt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) switch (vt->index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) strscpy(vt->name, "ADC", sizeof(vt->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) vt->type = V4L2_TUNER_ADC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) vt->capability =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) vt->rangelow = bands_adc[0].rangelow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) vt->rangehigh = bands_adc[2].rangehigh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) strscpy(vt->name, "RF", sizeof(vt->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) vt->type = V4L2_TUNER_RF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) vt->capability =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) vt->rangelow = bands_fm[0].rangelow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) vt->rangehigh = bands_fm[0].rangehigh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) int vivid_sdr_s_tuner(struct file *file, void *fh, const struct v4l2_tuner *vt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (vt->index > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) int vidioc_enum_fmt_sdr_cap(struct file *file, void *fh, struct v4l2_fmtdesc *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (f->index >= ARRAY_SIZE(formats))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) f->pixelformat = formats[f->index].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) int vidioc_g_fmt_sdr_cap(struct file *file, void *fh, struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) struct vivid_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) f->fmt.sdr.pixelformat = dev->sdr_pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) f->fmt.sdr.buffersize = dev->sdr_buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) int vidioc_s_fmt_sdr_cap(struct file *file, void *fh, struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) struct vivid_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) struct vb2_queue *q = &dev->vb_sdr_cap_q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (vb2_is_busy(q))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) for (i = 0; i < ARRAY_SIZE(formats); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (formats[i].pixelformat == f->fmt.sdr.pixelformat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) dev->sdr_pixelformat = formats[i].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) dev->sdr_buffersize = formats[i].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) f->fmt.sdr.buffersize = formats[i].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) dev->sdr_pixelformat = formats[0].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) dev->sdr_buffersize = formats[0].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) f->fmt.sdr.pixelformat = formats[0].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) f->fmt.sdr.buffersize = formats[0].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) int vidioc_try_fmt_sdr_cap(struct file *file, void *fh, struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) for (i = 0; i < ARRAY_SIZE(formats); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (formats[i].pixelformat == f->fmt.sdr.pixelformat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) f->fmt.sdr.buffersize = formats[i].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) f->fmt.sdr.pixelformat = formats[0].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) f->fmt.sdr.buffersize = formats[0].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #define FIXP_N (15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) #define FIXP_FRAC (1 << FIXP_N)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) #define FIXP_2PI ((int)(2 * 3.141592653589 * FIXP_FRAC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) #define M_100000PI (3.14159 * 100000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) void vivid_sdr_cap_process(struct vivid_dev *dev, struct vivid_buffer *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) u8 *vbuf = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) unsigned long i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) unsigned long plane_size = vb2_plane_size(&buf->vb.vb2_buf, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) s64 s64tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) s32 src_phase_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) s32 mod_phase_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) s32 fixp_i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) s32 fixp_q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) /* calculate phase step */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) #define BEEP_FREQ 1000 /* 1kHz beep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) src_phase_step = DIV_ROUND_CLOSEST(FIXP_2PI * BEEP_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) dev->sdr_adc_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) for (i = 0; i < plane_size; i += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) mod_phase_step = fixp_cos32_rad(dev->sdr_fixp_src_phase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) FIXP_2PI) >> (31 - FIXP_N);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) dev->sdr_fixp_src_phase += src_phase_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) s64tmp = (s64) mod_phase_step * dev->sdr_fm_deviation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) dev->sdr_fixp_mod_phase += div_s64(s64tmp, M_100000PI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * Transfer phase angle to [0, 2xPI] in order to avoid variable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) * overflow and make it suitable for cosine implementation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * used, which does not support negative angles.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) dev->sdr_fixp_src_phase %= FIXP_2PI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) dev->sdr_fixp_mod_phase %= FIXP_2PI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) if (dev->sdr_fixp_mod_phase < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) dev->sdr_fixp_mod_phase += FIXP_2PI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) fixp_i = fixp_cos32_rad(dev->sdr_fixp_mod_phase, FIXP_2PI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) fixp_q = fixp_sin32_rad(dev->sdr_fixp_mod_phase, FIXP_2PI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) /* Normalize fraction values represented with 32 bit precision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * to fixed point representation with FIXP_N bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) fixp_i >>= (31 - FIXP_N);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) fixp_q >>= (31 - FIXP_N);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) switch (dev->sdr_pixelformat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) case V4L2_SDR_FMT_CU8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /* convert 'fixp float' to u8 [0, +255] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* u8 = X * 127.5 + 127.5; X is float [-1.0, +1.0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) fixp_i = fixp_i * 1275 + FIXP_FRAC * 1275;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) fixp_q = fixp_q * 1275 + FIXP_FRAC * 1275;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) *vbuf++ = DIV_ROUND_CLOSEST(fixp_i, FIXP_FRAC * 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) *vbuf++ = DIV_ROUND_CLOSEST(fixp_q, FIXP_FRAC * 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) case V4L2_SDR_FMT_CS8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /* convert 'fixp float' to s8 [-128, +127] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) /* s8 = X * 127.5 - 0.5; X is float [-1.0, +1.0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) fixp_i = fixp_i * 1275 - FIXP_FRAC * 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) fixp_q = fixp_q * 1275 - FIXP_FRAC * 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) *vbuf++ = DIV_ROUND_CLOSEST(fixp_i, FIXP_FRAC * 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) *vbuf++ = DIV_ROUND_CLOSEST(fixp_q, FIXP_FRAC * 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags