^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * cxd2880-spi.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Sony CXD2880 DVB-T2/T tuner + demodulator driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * SPI adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2016, 2017, 2018 Sony Semiconductor Solutions Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define pr_fmt(fmt) KBUILD_MODNAME ": %s: " fmt, __func__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/ktime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <media/dvb_demux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <media/dmxdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "cxd2880.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CXD2880_MAX_FILTER_SIZE 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define BURST_WRITE_MAX 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MAX_TRANS_PKT 300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct cxd2880_ts_buf_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u8 read_ready:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u8 almost_full:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u8 almost_empty:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u8 overflow:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u8 underflow:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u16 pkt_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct cxd2880_pid_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u8 is_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u16 pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct cxd2880_pid_filter_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u8 is_negative;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct cxd2880_pid_config pid_config[CXD2880_MAX_FILTER_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct cxd2880_dvb_spi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct dvb_frontend dvb_fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct dvb_adapter adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct dvb_demux demux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct dmxdev dmxdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct dmx_frontend dmx_fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct task_struct *cxd2880_ts_read_thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct spi_device *spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct mutex spi_mutex; /* For SPI access exclusive control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int feed_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int all_pid_feed_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct regulator *vcc_supply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u8 *ts_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct cxd2880_pid_filter_config filter_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int cxd2880_write_spi(struct spi_device *spi, u8 *data, u32 size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct spi_message msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct spi_transfer tx = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (!spi || !data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) pr_err("invalid arg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) tx.tx_buf = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) tx.len = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) spi_message_init(&msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) spi_message_add_tail(&tx, &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return spi_sync(spi, &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static int cxd2880_write_reg(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) u8 sub_address, const u8 *data, u32 size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u8 send_data[BURST_WRITE_MAX + 4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) const u8 *write_data_top = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (!spi || !data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) pr_err("invalid arg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (size > BURST_WRITE_MAX || size > U8_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) pr_err("data size > WRITE_MAX\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (sub_address + size > 0x100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) pr_err("out of range\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) send_data[0] = 0x0e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) write_data_top = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) send_data[1] = sub_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) send_data[2] = (u8)size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) memcpy(&send_data[3], write_data_top, send_data[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ret = cxd2880_write_spi(spi, send_data, send_data[2] + 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) pr_err("write spi failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int cxd2880_spi_read_ts(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u8 *read_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u32 packet_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u8 data[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct spi_message message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct spi_transfer transfer[2] = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!spi || !read_data || !packet_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) pr_err("invalid arg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (packet_num > 0xffff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) pr_err("packet num > 0xffff\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) data[0] = 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) data[1] = packet_num >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) data[2] = packet_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) spi_message_init(&message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) transfer[0].len = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) transfer[0].tx_buf = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) spi_message_add_tail(&transfer[0], &message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) transfer[1].len = packet_num * 188;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) transfer[1].rx_buf = read_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) spi_message_add_tail(&transfer[1], &message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ret = spi_sync(spi, &message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) pr_err("spi_write_then_read failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int cxd2880_spi_read_ts_buffer_info(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct cxd2880_ts_buf_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) u8 send_data = 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) u8 recv_data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (!spi || !info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) pr_err("invalid arg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ret = spi_write_then_read(spi, &send_data, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) recv_data, sizeof(recv_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) pr_err("spi_write_then_read failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) info->read_ready = (recv_data[0] & 0x80) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) info->almost_full = (recv_data[0] & 0x40) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) info->almost_empty = (recv_data[0] & 0x20) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) info->overflow = (recv_data[0] & 0x10) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) info->underflow = (recv_data[0] & 0x08) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) info->pkt_num = ((recv_data[0] & 0x07) << 8) | recv_data[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static int cxd2880_spi_clear_ts_buffer(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) u8 data = 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) ret = cxd2880_write_spi(spi, &data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) pr_err("write spi failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static int cxd2880_set_pid_filter(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct cxd2880_pid_filter_config *cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u8 data[65];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) u16 pid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) if (!spi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) pr_err("invalid arg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) data[0] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ret = cxd2880_write_reg(spi, 0x00, &data[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (!cfg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) data[0] = 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ret = cxd2880_write_reg(spi, 0x50, &data[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) data[0] = cfg->is_negative ? 0x01 : 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) for (i = 0; i < CXD2880_MAX_FILTER_SIZE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) pid = cfg->pid_config[i].pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (cfg->pid_config[i].is_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) data[1 + (i * 2)] = (pid >> 8) | 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) data[2 + (i * 2)] = pid & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) data[1 + (i * 2)] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) data[2 + (i * 2)] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret = cxd2880_write_reg(spi, 0x50, data, 65);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int cxd2880_update_pid_filter(struct cxd2880_dvb_spi *dvb_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct cxd2880_pid_filter_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) bool is_all_pid_filter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (!dvb_spi || !cfg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) pr_err("invalid arg.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) mutex_lock(&dvb_spi->spi_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (is_all_pid_filter) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) struct cxd2880_pid_filter_config tmpcfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) memset(&tmpcfg, 0, sizeof(tmpcfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) tmpcfg.is_negative = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) tmpcfg.pid_config[0].is_enable = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) tmpcfg.pid_config[0].pid = 0x1fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) ret = cxd2880_set_pid_filter(dvb_spi->spi, &tmpcfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ret = cxd2880_set_pid_filter(dvb_spi->spi, cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) mutex_unlock(&dvb_spi->spi_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) pr_err("set_pid_filter failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static int cxd2880_ts_read(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct cxd2880_dvb_spi *dvb_spi = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct cxd2880_ts_buf_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ktime_t start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) dvb_spi = arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (!dvb_spi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) pr_err("invalid arg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ret = cxd2880_spi_clear_ts_buffer(dvb_spi->spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) pr_err("set_clear_ts_buffer failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) start = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) while (!kthread_should_stop()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ret = cxd2880_spi_read_ts_buffer_info(dvb_spi->spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) pr_err("spi_read_ts_buffer_info error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (info.pkt_num > MAX_TRANS_PKT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) for (i = 0; i < info.pkt_num / MAX_TRANS_PKT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) cxd2880_spi_read_ts(dvb_spi->spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) dvb_spi->ts_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) MAX_TRANS_PKT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) dvb_dmx_swfilter(&dvb_spi->demux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) dvb_spi->ts_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) MAX_TRANS_PKT * 188);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) start = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) } else if ((info.pkt_num > 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) (ktime_to_ms(ktime_sub(ktime_get(), start)) >= 500)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) cxd2880_spi_read_ts(dvb_spi->spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) dvb_spi->ts_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) info.pkt_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) dvb_dmx_swfilter(&dvb_spi->demux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) dvb_spi->ts_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) info.pkt_num * 188);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) start = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int cxd2880_start_feed(struct dvb_demux_feed *feed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct dvb_demux *demux = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) struct cxd2880_dvb_spi *dvb_spi = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (!feed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) pr_err("invalid arg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) demux = feed->demux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) if (!demux) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) pr_err("feed->demux is NULL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) dvb_spi = demux->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (dvb_spi->feed_count == CXD2880_MAX_FILTER_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) pr_err("Exceeded maximum PID count (32).");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) pr_err("Selected PID cannot be enabled.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (feed->pid == 0x2000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) if (dvb_spi->all_pid_feed_count == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) ret = cxd2880_update_pid_filter(dvb_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) &dvb_spi->filter_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) pr_err("update pid filter failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) dvb_spi->all_pid_feed_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) pr_debug("all PID feed (count = %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) dvb_spi->all_pid_feed_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct cxd2880_pid_filter_config cfgtmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) cfgtmp = dvb_spi->filter_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) for (i = 0; i < CXD2880_MAX_FILTER_SIZE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (cfgtmp.pid_config[i].is_enable == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) cfgtmp.pid_config[i].is_enable = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) cfgtmp.pid_config[i].pid = feed->pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) pr_debug("store PID %d to #%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) feed->pid, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (i == CXD2880_MAX_FILTER_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) pr_err("PID filter is full.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (!dvb_spi->all_pid_feed_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ret = cxd2880_update_pid_filter(dvb_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) &cfgtmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) dvb_spi->filter_config = cfgtmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (dvb_spi->feed_count == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) dvb_spi->ts_buf =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) kmalloc(MAX_TRANS_PKT * 188,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) GFP_KERNEL | GFP_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (!dvb_spi->ts_buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) pr_err("ts buffer allocate failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) memset(&dvb_spi->filter_config, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) sizeof(dvb_spi->filter_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) dvb_spi->all_pid_feed_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) dvb_spi->cxd2880_ts_read_thread = kthread_run(cxd2880_ts_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) dvb_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) "cxd2880_ts_read");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (IS_ERR(dvb_spi->cxd2880_ts_read_thread)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) pr_err("kthread_run failed/\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) kfree(dvb_spi->ts_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) dvb_spi->ts_buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) memset(&dvb_spi->filter_config, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) sizeof(dvb_spi->filter_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) dvb_spi->all_pid_feed_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return PTR_ERR(dvb_spi->cxd2880_ts_read_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) dvb_spi->feed_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) pr_debug("start feed (count %d)\n", dvb_spi->feed_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) static int cxd2880_stop_feed(struct dvb_demux_feed *feed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) struct dvb_demux *demux = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct cxd2880_dvb_spi *dvb_spi = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (!feed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) pr_err("invalid arg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) demux = feed->demux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if (!demux) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) pr_err("feed->demux is NULL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) dvb_spi = demux->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (!dvb_spi->feed_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) pr_err("no feed is started\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (feed->pid == 0x2000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * Special PID case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) * Number of 0x2000 feed request was stored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * in dvb_spi->all_pid_feed_count.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) if (dvb_spi->all_pid_feed_count <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) pr_err("PID %d not found.\n", feed->pid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) dvb_spi->all_pid_feed_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) struct cxd2880_pid_filter_config cfgtmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) cfgtmp = dvb_spi->filter_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) for (i = 0; i < CXD2880_MAX_FILTER_SIZE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (feed->pid == cfgtmp.pid_config[i].pid &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) cfgtmp.pid_config[i].is_enable != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) cfgtmp.pid_config[i].is_enable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) cfgtmp.pid_config[i].pid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) pr_debug("removed PID %d from #%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) feed->pid, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) dvb_spi->filter_config = cfgtmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (i == CXD2880_MAX_FILTER_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) pr_err("PID %d not found\n", feed->pid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) ret = cxd2880_update_pid_filter(dvb_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) &dvb_spi->filter_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) dvb_spi->all_pid_feed_count > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) dvb_spi->feed_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (dvb_spi->feed_count == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) int ret_stop = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) ret_stop = kthread_stop(dvb_spi->cxd2880_ts_read_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (ret_stop) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) pr_err("'kthread_stop failed. (%d)\n", ret_stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) ret = ret_stop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) kfree(dvb_spi->ts_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) dvb_spi->ts_buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) pr_debug("stop feed ok.(count %d)\n", dvb_spi->feed_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) static const struct of_device_id cxd2880_spi_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) { .compatible = "sony,cxd2880" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) MODULE_DEVICE_TABLE(of, cxd2880_spi_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) cxd2880_spi_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) struct cxd2880_dvb_spi *dvb_spi = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) struct cxd2880_config config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (!spi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) pr_err("invalid arg.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) dvb_spi = kzalloc(sizeof(struct cxd2880_dvb_spi), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (!dvb_spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) dvb_spi->vcc_supply = devm_regulator_get_optional(&spi->dev, "vcc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (IS_ERR(dvb_spi->vcc_supply)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) if (PTR_ERR(dvb_spi->vcc_supply) == -EPROBE_DEFER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) ret = -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) goto fail_regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) dvb_spi->vcc_supply = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) ret = regulator_enable(dvb_spi->vcc_supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) goto fail_regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) dvb_spi->spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) mutex_init(&dvb_spi->spi_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) dev_set_drvdata(&spi->dev, dvb_spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) config.spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) config.spi_mutex = &dvb_spi->spi_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) ret = dvb_register_adapter(&dvb_spi->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) "CXD2880",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) &spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) adapter_nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) pr_err("dvb_register_adapter() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) goto fail_adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (!dvb_attach(cxd2880_attach, &dvb_spi->dvb_fe, &config)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) pr_err("cxd2880_attach failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) goto fail_attach;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) ret = dvb_register_frontend(&dvb_spi->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) &dvb_spi->dvb_fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) pr_err("dvb_register_frontend() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) goto fail_frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) dvb_spi->demux.dmx.capabilities = DMX_TS_FILTERING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) dvb_spi->demux.priv = dvb_spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) dvb_spi->demux.filternum = CXD2880_MAX_FILTER_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) dvb_spi->demux.feednum = CXD2880_MAX_FILTER_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) dvb_spi->demux.start_feed = cxd2880_start_feed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) dvb_spi->demux.stop_feed = cxd2880_stop_feed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) ret = dvb_dmx_init(&dvb_spi->demux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) pr_err("dvb_dmx_init() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) goto fail_dmx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) dvb_spi->dmxdev.filternum = CXD2880_MAX_FILTER_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) dvb_spi->dmxdev.demux = &dvb_spi->demux.dmx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) dvb_spi->dmxdev.capabilities = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) ret = dvb_dmxdev_init(&dvb_spi->dmxdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) &dvb_spi->adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) pr_err("dvb_dmxdev_init() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) goto fail_dmxdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) dvb_spi->dmx_fe.source = DMX_FRONTEND_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ret = dvb_spi->demux.dmx.add_frontend(&dvb_spi->demux.dmx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) &dvb_spi->dmx_fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) pr_err("add_frontend() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) goto fail_dmx_fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) ret = dvb_spi->demux.dmx.connect_frontend(&dvb_spi->demux.dmx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) &dvb_spi->dmx_fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) pr_err("dvb_register_frontend() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) goto fail_fe_conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) pr_info("Sony CXD2880 has successfully attached.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) fail_fe_conn:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) dvb_spi->demux.dmx.remove_frontend(&dvb_spi->demux.dmx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) &dvb_spi->dmx_fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) fail_dmx_fe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) dvb_dmxdev_release(&dvb_spi->dmxdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) fail_dmxdev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) dvb_dmx_release(&dvb_spi->demux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) fail_dmx:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) dvb_unregister_frontend(&dvb_spi->dvb_fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) fail_frontend:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) dvb_frontend_detach(&dvb_spi->dvb_fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) fail_attach:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) dvb_unregister_adapter(&dvb_spi->adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) fail_adapter:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) if (dvb_spi->vcc_supply)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) regulator_disable(dvb_spi->vcc_supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) fail_regulator:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) kfree(dvb_spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) cxd2880_spi_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) struct cxd2880_dvb_spi *dvb_spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (!spi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) pr_err("invalid arg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) dvb_spi = dev_get_drvdata(&spi->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) if (!dvb_spi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) pr_err("failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) dvb_spi->demux.dmx.remove_frontend(&dvb_spi->demux.dmx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) &dvb_spi->dmx_fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) dvb_dmxdev_release(&dvb_spi->dmxdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) dvb_dmx_release(&dvb_spi->demux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) dvb_unregister_frontend(&dvb_spi->dvb_fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) dvb_frontend_detach(&dvb_spi->dvb_fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) dvb_unregister_adapter(&dvb_spi->adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (dvb_spi->vcc_supply)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) regulator_disable(dvb_spi->vcc_supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) kfree(dvb_spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) pr_info("cxd2880_spi remove ok.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static const struct spi_device_id cxd2880_spi_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) { "cxd2880", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) MODULE_DEVICE_TABLE(spi, cxd2880_spi_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static struct spi_driver cxd2880_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) .name = "cxd2880",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .of_match_table = cxd2880_spi_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) .id_table = cxd2880_spi_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) .probe = cxd2880_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) .remove = cxd2880_spi_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) module_spi_driver(cxd2880_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) MODULE_DESCRIPTION("Sony CXD2880 DVB-T2/T tuner + demod driver SPI adapter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) MODULE_AUTHOR("Sony Semiconductor Solutions Corporation");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) MODULE_LICENSE("GPL v2");