^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * serial_ir.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * serial_ir - Device driver that records pulse- and pause-lengths
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (space-lengths) between DDCD event on a serial port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Copyright (C) 2016 Sean Young <sean@mess.org> (port to rc-core)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/serial_reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <media/rc-core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct serial_ir_hw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int signal_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int signal_pin_change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u8 on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u8 off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned set_send_carrier:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned set_duty_cycle:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void (*send_pulse)(unsigned int length, ktime_t edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) void (*send_space)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define IR_HOMEBREW 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define IR_IRDEO 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define IR_IRDEO_REMOTE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define IR_ANIMAX 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define IR_IGOR 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* module parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static int io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static ulong iommap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static int ioshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static bool softcarrier = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static bool share_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static bool txsense; /* 0 = active high, 1 = active low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* forward declarations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static void send_pulse_irdeo(unsigned int length, ktime_t edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static void send_space_irdeo(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #ifdef CONFIG_IR_SERIAL_TRANSMITTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static void send_pulse_homebrew(unsigned int length, ktime_t edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static void send_space_homebrew(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static struct serial_ir_hw hardware[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) [IR_HOMEBREW] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .lock = __SPIN_LOCK_UNLOCKED(hardware[IR_HOMEBREW].lock),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .signal_pin = UART_MSR_DCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .signal_pin_change = UART_MSR_DDCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .off = (UART_MCR_RTS | UART_MCR_OUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #ifdef CONFIG_IR_SERIAL_TRANSMITTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .send_pulse = send_pulse_homebrew,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .send_space = send_space_homebrew,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .set_send_carrier = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .set_duty_cycle = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) [IR_IRDEO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .lock = __SPIN_LOCK_UNLOCKED(hardware[IR_IRDEO].lock),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .signal_pin = UART_MSR_DSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .signal_pin_change = UART_MSR_DDSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .on = UART_MCR_OUT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .send_pulse = send_pulse_irdeo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .send_space = send_space_irdeo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .set_duty_cycle = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) [IR_IRDEO_REMOTE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .lock = __SPIN_LOCK_UNLOCKED(hardware[IR_IRDEO_REMOTE].lock),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .signal_pin = UART_MSR_DSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .signal_pin_change = UART_MSR_DDSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .send_pulse = send_pulse_irdeo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .send_space = send_space_irdeo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .set_duty_cycle = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) [IR_ANIMAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .lock = __SPIN_LOCK_UNLOCKED(hardware[IR_ANIMAX].lock),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .signal_pin = UART_MSR_DCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .signal_pin_change = UART_MSR_DDCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .on = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) [IR_IGOR] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .lock = __SPIN_LOCK_UNLOCKED(hardware[IR_IGOR].lock),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .signal_pin = UART_MSR_DSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .signal_pin_change = UART_MSR_DDSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .off = (UART_MCR_RTS | UART_MCR_OUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #ifdef CONFIG_IR_SERIAL_TRANSMITTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .send_pulse = send_pulse_homebrew,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .send_space = send_space_homebrew,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .set_send_carrier = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .set_duty_cycle = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define RS_ISR_PASS_LIMIT 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct serial_ir {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ktime_t lastkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct rc_dev *rcdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct timer_list timeout_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) unsigned int carrier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) unsigned int duty_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static struct serial_ir serial_ir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* fetch serial input packet (1 byte) from register offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static u8 sinp(int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (iommap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* the register is memory-mapped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) offset <<= ioshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return inb(io + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* write serial output packet (1 byte) of value to register offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static void soutp(int offset, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (iommap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* the register is memory-mapped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) offset <<= ioshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) outb(value, io + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static void on(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (txsense)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) soutp(UART_MCR, hardware[type].off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) soutp(UART_MCR, hardware[type].on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static void off(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (txsense)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) soutp(UART_MCR, hardware[type].on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) soutp(UART_MCR, hardware[type].off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static void send_pulse_irdeo(unsigned int length, ktime_t target)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) long rawbits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) unsigned char output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) unsigned char chunk, shifted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* how many bits have to be sent ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) rawbits = length * 1152 / 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (serial_ir.duty_cycle > 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) chunk = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) chunk = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) shifted = chunk << (i * 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) shifted >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) output &= (~shifted);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (i == 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) soutp(UART_TX, output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) while (!(sinp(UART_LSR) & UART_LSR_THRE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) output = 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (i != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) soutp(UART_TX, output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) while (!(sinp(UART_LSR) & UART_LSR_TEMT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static void send_space_irdeo(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #ifdef CONFIG_IR_SERIAL_TRANSMITTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static void send_pulse_homebrew_softcarrier(unsigned int length, ktime_t edge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ktime_t now, target = ktime_add_us(edge, length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * delta should never exceed 4 seconds and on m68k
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * ndelay(s64) does not compile; so use s32 rather than s64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) s32 delta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) unsigned int pulse, space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* Ensure the dividend fits into 32 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) pulse = DIV_ROUND_CLOSEST(serial_ir.duty_cycle * (NSEC_PER_SEC / 100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) serial_ir.carrier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) space = DIV_ROUND_CLOSEST((100 - serial_ir.duty_cycle) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) (NSEC_PER_SEC / 100), serial_ir.carrier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) now = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (ktime_compare(now, target) >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) on();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) edge = ktime_add_ns(edge, pulse);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) delta = ktime_to_ns(ktime_sub(edge, now));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (delta > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ndelay(delta);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) now = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) off();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (ktime_compare(now, target) >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) edge = ktime_add_ns(edge, space);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) delta = ktime_to_ns(ktime_sub(edge, now));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (delta > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) ndelay(delta);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static void send_pulse_homebrew(unsigned int length, ktime_t edge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (softcarrier)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) send_pulse_homebrew_softcarrier(length, edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) on();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static void send_space_homebrew(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) off();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static void frbwrite(unsigned int l, bool is_pulse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* simple noise filter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static unsigned int ptr, pulse, space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct ir_raw_event ev = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (ptr > 0 && is_pulse) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) pulse += l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (pulse > 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) ev.duration = space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ev.pulse = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ev.duration = pulse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ev.pulse = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ptr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) pulse = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (!is_pulse) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (ptr == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (l > 20000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) space = l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (l > 20000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) space += pulse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (space > IR_MAX_DURATION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) space = IR_MAX_DURATION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) space += l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (space > IR_MAX_DURATION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) space = IR_MAX_DURATION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) pulse = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) ev.duration = space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) ev.pulse = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) ev.duration = pulse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) ev.pulse = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) ptr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) pulse = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) ev.duration = l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ev.pulse = is_pulse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static irqreturn_t serial_ir_irq_handler(int i, void *blah)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) ktime_t kt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) int counter, dcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) ktime_t delkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) unsigned int data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static int last_dcd = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* not our interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) counter = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) counter++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) status = sinp(UART_MSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (counter > RS_ISR_PASS_LIMIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) dev_err(&serial_ir.pdev->dev, "Trapped in interrupt");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if ((status & hardware[type].signal_pin_change) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) sense != -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* get current time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) kt = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * The driver needs to know if your receiver is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * active high or active low, or the space/pulse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) * sense could be inverted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* calc time since last interrupt in nanoseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) dcd = (status & hardware[type].signal_pin) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (dcd == last_dcd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) dev_dbg(&serial_ir.pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) "ignoring spike: %d %d %lldns %lldns\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) dcd, sense, ktime_to_ns(kt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ktime_to_ns(serial_ir.lastkt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) delkt = ktime_sub(kt, serial_ir.lastkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (ktime_compare(delkt, ktime_set(15, 0)) > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) data = IR_MAX_DURATION; /* really long time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (!(dcd ^ sense)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* sanity check */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) dev_err(&serial_ir.pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) "dcd unexpected: %d %d %lldns %lldns\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) dcd, sense, ktime_to_ns(kt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) ktime_to_ns(serial_ir.lastkt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * detecting pulse while this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * MUST be a space!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) sense = sense ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) data = ktime_to_us(delkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) frbwrite(data, !(dcd ^ sense));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) serial_ir.lastkt = kt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) last_dcd = dcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) mod_timer(&serial_ir.timeout_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) jiffies + usecs_to_jiffies(serial_ir.rcdev->timeout));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ir_raw_event_handle(serial_ir.rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int hardware_init_port(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) u8 scratch, scratch2, scratch3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * This is a simple port existence test, borrowed from the autoconfig
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * function in drivers/tty/serial/8250/8250_port.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) scratch = sinp(UART_IER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) soutp(UART_IER, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) #ifdef __i386__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) outb(0xff, 0x080);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) scratch2 = sinp(UART_IER) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) soutp(UART_IER, 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) #ifdef __i386__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) outb(0x00, 0x080);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) scratch3 = sinp(UART_IER) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) soutp(UART_IER, scratch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (scratch2 != 0 || scratch3 != 0x0f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) /* we fail, there's nothing here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) pr_err("port existence test failed, cannot continue\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) /* Set DLAB 0. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) /* First of all, disable all interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) soutp(UART_IER, sinp(UART_IER) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) (~(UART_IER_MSI | UART_IER_RLSI | UART_IER_THRI | UART_IER_RDI)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) /* Clear registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) sinp(UART_LSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) sinp(UART_RX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) sinp(UART_IIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) sinp(UART_MSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /* Set line for power source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) off();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /* Clear registers again to be sure. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) sinp(UART_LSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) sinp(UART_RX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) sinp(UART_IIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) sinp(UART_MSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) case IR_IRDEO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) case IR_IRDEO_REMOTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /* setup port to 7N1 @ 115200 Baud */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) /* Set DLAB 1. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) /* Set divisor to 1 => 115200 Baud */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) soutp(UART_DLM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) soutp(UART_DLL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /* Set DLAB 0 + 7N1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) soutp(UART_LCR, UART_LCR_WLEN7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /* THR interrupt already disabled at this point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static void serial_ir_timeout(struct timer_list *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) struct ir_raw_event ev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .timeout = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .duration = serial_ir.rcdev->timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) ir_raw_event_store_with_filter(serial_ir.rcdev, &ev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) ir_raw_event_handle(serial_ir.rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /* Needed by serial_ir_probe() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static int serial_ir_tx(struct rc_dev *dev, unsigned int *txbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) unsigned int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static int serial_ir_tx_duty_cycle(struct rc_dev *dev, u32 cycle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) static int serial_ir_tx_carrier(struct rc_dev *dev, u32 carrier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static int serial_ir_open(struct rc_dev *rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static void serial_ir_close(struct rc_dev *rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static int serial_ir_probe(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) struct rc_dev *rcdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) int i, nlow, nhigh, result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) rcdev = devm_rc_allocate_device(&dev->dev, RC_DRIVER_IR_RAW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if (!rcdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (hardware[type].send_pulse && hardware[type].send_space)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) rcdev->tx_ir = serial_ir_tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) if (hardware[type].set_send_carrier)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) rcdev->s_tx_carrier = serial_ir_tx_carrier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (hardware[type].set_duty_cycle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) rcdev->s_tx_duty_cycle = serial_ir_tx_duty_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) case IR_HOMEBREW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) rcdev->device_name = "Serial IR type home-brew";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) case IR_IRDEO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) rcdev->device_name = "Serial IR type IRdeo";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) case IR_IRDEO_REMOTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) rcdev->device_name = "Serial IR type IRdeo remote";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) case IR_ANIMAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) rcdev->device_name = "Serial IR type AnimaX";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) case IR_IGOR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) rcdev->device_name = "Serial IR type IgorPlug";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) rcdev->input_phys = KBUILD_MODNAME "/input0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) rcdev->input_id.bustype = BUS_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) rcdev->input_id.vendor = 0x0001;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) rcdev->input_id.product = 0x0001;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) rcdev->input_id.version = 0x0100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) rcdev->open = serial_ir_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) rcdev->close = serial_ir_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) rcdev->dev.parent = &serial_ir.pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) rcdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) rcdev->driver_name = KBUILD_MODNAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) rcdev->map_name = RC_MAP_RC6_MCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) rcdev->min_timeout = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) rcdev->timeout = IR_DEFAULT_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) rcdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) rcdev->rx_resolution = 250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) serial_ir.rcdev = rcdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) timer_setup(&serial_ir.timeout_timer, serial_ir_timeout, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) result = devm_request_irq(&dev->dev, irq, serial_ir_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) share_irq ? IRQF_SHARED : 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) KBUILD_MODNAME, &hardware);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (result < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) if (result == -EBUSY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) dev_err(&dev->dev, "IRQ %d busy\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) else if (result == -EINVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) dev_err(&dev->dev, "Bad irq number or handler\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) /* Reserve io region. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if ((iommap &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) (devm_request_mem_region(&dev->dev, iommap, 8UL << ioshift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) KBUILD_MODNAME) == NULL)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) (!iommap && (devm_request_region(&dev->dev, io, 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) KBUILD_MODNAME) == NULL))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) dev_err(&dev->dev, "port %04x already in use\n", io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) dev_warn(&dev->dev, "use 'setserial /dev/ttySX uart none'\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) dev_warn(&dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) "or compile the serial port driver as module and\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) dev_warn(&dev->dev, "make sure this module is loaded first\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) result = hardware_init_port();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (result < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) /* Initialize pulse/space widths */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) serial_ir.duty_cycle = 50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) serial_ir.carrier = 38000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) /* If pin is high, then this must be an active low receiver. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) if (sense == -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) /* wait 1/2 sec for the power supply */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) msleep(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) * probe 9 times every 0.04s, collect "votes" for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) * active high/low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) nlow = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) nhigh = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) for (i = 0; i < 9; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (sinp(UART_MSR) & hardware[type].signal_pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) nlow++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) nhigh++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) msleep(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) sense = nlow >= nhigh ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) dev_info(&dev->dev, "auto-detected active %s receiver\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) sense ? "low" : "high");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) dev_info(&dev->dev, "Manually using active %s receiver\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) sense ? "low" : "high");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) dev_dbg(&dev->dev, "Interrupt %d, port %04x obtained\n", irq, io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) return devm_rc_register_device(&dev->dev, rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) static int serial_ir_open(struct rc_dev *rcdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) /* initialize timestamp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) serial_ir.lastkt = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) spin_lock_irqsave(&hardware[type].lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) /* Set DLAB 0. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) soutp(UART_IER, sinp(UART_IER) | UART_IER_MSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) spin_unlock_irqrestore(&hardware[type].lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) static void serial_ir_close(struct rc_dev *rcdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) spin_lock_irqsave(&hardware[type].lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) /* Set DLAB 0. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) /* First of all, disable all interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) soutp(UART_IER, sinp(UART_IER) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) (~(UART_IER_MSI | UART_IER_RLSI | UART_IER_THRI | UART_IER_RDI)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) spin_unlock_irqrestore(&hardware[type].lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) static int serial_ir_tx(struct rc_dev *dev, unsigned int *txbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) unsigned int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) ktime_t edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) s64 delta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) spin_lock_irqsave(&hardware[type].lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (type == IR_IRDEO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) /* DTR, RTS down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) on();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) edge = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) for (i = 0; i < count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) if (i % 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) hardware[type].send_space();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) hardware[type].send_pulse(txbuf[i], edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) edge = ktime_add_us(edge, txbuf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) delta = ktime_us_delta(edge, ktime_get());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) if (delta > 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) spin_unlock_irqrestore(&hardware[type].lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) usleep_range(delta - 25, delta + 25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) spin_lock_irqsave(&hardware[type].lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) } else if (delta > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) udelay(delta);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) off();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) spin_unlock_irqrestore(&hardware[type].lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) static int serial_ir_tx_duty_cycle(struct rc_dev *dev, u32 cycle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) serial_ir.duty_cycle = cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) static int serial_ir_tx_carrier(struct rc_dev *dev, u32 carrier)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (carrier > 500000 || carrier < 20000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) serial_ir.carrier = carrier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) static int serial_ir_suspend(struct platform_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) pm_message_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) /* Set DLAB 0. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) /* Disable all interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) soutp(UART_IER, sinp(UART_IER) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) (~(UART_IER_MSI | UART_IER_RLSI | UART_IER_THRI | UART_IER_RDI)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) /* Clear registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) sinp(UART_LSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) sinp(UART_RX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) sinp(UART_IIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) sinp(UART_MSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) static int serial_ir_resume(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) result = hardware_init_port();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) if (result < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) spin_lock_irqsave(&hardware[type].lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) /* Enable Interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) serial_ir.lastkt = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) soutp(UART_IER, sinp(UART_IER) | UART_IER_MSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) off();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) spin_unlock_irqrestore(&hardware[type].lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) static struct platform_driver serial_ir_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) .probe = serial_ir_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) .suspend = serial_ir_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) .resume = serial_ir_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .name = "serial_ir",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) static int __init serial_ir_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) result = platform_driver_register(&serial_ir_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) if (result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) serial_ir.pdev = platform_device_alloc("serial_ir", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) if (!serial_ir.pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) result = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) goto exit_driver_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) result = platform_device_add(serial_ir.pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) if (result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) goto exit_device_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) exit_device_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) platform_device_put(serial_ir.pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) exit_driver_unregister:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) platform_driver_unregister(&serial_ir_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) static void serial_ir_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) platform_device_unregister(serial_ir.pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) platform_driver_unregister(&serial_ir_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) static int __init serial_ir_init_module(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) case IR_HOMEBREW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) case IR_IRDEO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) case IR_IRDEO_REMOTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) case IR_ANIMAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) case IR_IGOR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) /* if nothing specified, use ttyS0/com1 and irq 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) io = io ? io : 0x3f8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) irq = irq ? irq : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) if (!softcarrier) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) case IR_HOMEBREW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) case IR_IGOR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) hardware[type].set_send_carrier = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) hardware[type].set_duty_cycle = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) /* make sure sense is either -1, 0, or 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) if (sense != -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) sense = !!sense;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) return serial_ir_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) static void __exit serial_ir_exit_module(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) del_timer_sync(&serial_ir.timeout_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) serial_ir_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) module_init(serial_ir_init_module);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) module_exit(serial_ir_exit_module);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, Christoph Bartelmus, Andrei Tanas");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) module_param(type, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo, 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) module_param_hw(io, int, ioport, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) /* some architectures (e.g. intel xscale) have memory mapped registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) module_param_hw(iommap, ulong, other, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O (0 = no memory mapped io)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) * some architectures (e.g. intel xscale) align the 8bit serial registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) * on 32bit word boundaries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) module_param_hw(ioshift, int, other, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) module_param_hw(irq, int, irq, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) module_param_hw(share_irq, bool, other, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) module_param(sense, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit (0 = active high, 1 = active low )");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) #ifdef CONFIG_IR_SERIAL_TRANSMITTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) module_param(txsense, bool, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) MODULE_PARM_DESC(txsense, "Sense of transmitter circuit (0 = active high, 1 = active low )");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) module_param(softcarrier, bool, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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