Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) // ir-imon-decoder.c - handle iMon protocol
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) // Copyright (C) 2018 by Sean Young <sean@mess.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include "rc-core-priv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define IMON_UNIT		416 /* us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define IMON_BITS		30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define IMON_CHKBITS		(BIT(30) | BIT(25) | BIT(24) | BIT(22) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 				 BIT(21) | BIT(20) | BIT(19) | BIT(18) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 				 BIT(17) | BIT(16) | BIT(14) | BIT(13) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 				 BIT(12) | BIT(11) | BIT(10) | BIT(9))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * This protocol has 30 bits. The format is one IMON_UNIT header pulse,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * followed by 30 bits. Each bit is one IMON_UNIT check field, and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * one IMON_UNIT field with the actual bit (1=space, 0=pulse).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * The check field is always space for some bits, for others it is pulse if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * both the preceding and current bit are zero, else space. IMON_CHKBITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * defines which bits are of type check.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * There is no way to distinguish an incomplete message from one where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * the lower bits are all set, iow. the last pulse is for the lowest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * bit which is 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) enum imon_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	STATE_INACTIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	STATE_BIT_CHK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	STATE_BIT_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	STATE_FINISHED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	STATE_ERROR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static void ir_imon_decode_scancode(struct rc_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct imon_dec *imon = &dev->raw->imon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	/* Keyboard/Mouse toggle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	if (imon->bits == 0x299115b7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		imon->stick_keyboard = !imon->stick_keyboard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	if ((imon->bits & 0xfc0000ff) == 0x680000b7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		int rel_x, rel_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		u8 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		buf = imon->bits >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		rel_x = (buf & 0x08) | (buf & 0x10) >> 2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 			(buf & 0x20) >> 4 | (buf & 0x40) >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		if (imon->bits & 0x02000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 			rel_x |= ~0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		buf = imon->bits >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		rel_y = (buf & 0x08) | (buf & 0x10) >> 2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 			(buf & 0x20) >> 4 | (buf & 0x40) >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		if (imon->bits & 0x01000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			rel_y |= ~0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		if (rel_x && rel_y && imon->stick_keyboard) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 			if (abs(rel_y) > abs(rel_x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 				imon->bits = rel_y > 0 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 					0x289515b7 : /* KEY_DOWN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 					0x2aa515b7;  /* KEY_UP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 				imon->bits = rel_x > 0 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 					0x2ba515b7 : /* KEY_RIGHT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 					0x29a515b7;  /* KEY_LEFT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		if (!imon->stick_keyboard) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			input_report_rel(dev->input_dev, REL_X, rel_x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			input_report_rel(dev->input_dev, REL_Y, rel_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 			input_report_key(dev->input_dev, BTN_LEFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 					 (imon->bits & 0x00010000) != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 			input_report_key(dev->input_dev, BTN_RIGHT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 					 (imon->bits & 0x00040000) != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	rc_keydown(dev, RC_PROTO_IMON, imon->bits, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * ir_imon_decode() - Decode one iMON pulse or space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  * @dev:	the struct rc_dev descriptor of the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  * @ev:		the struct ir_raw_event descriptor of the pulse/space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * This function returns -EINVAL if the pulse violates the state machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static int ir_imon_decode(struct rc_dev *dev, struct ir_raw_event ev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	struct imon_dec *data = &dev->raw->imon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (!is_timing_event(ev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		if (ev.reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			data->state = STATE_INACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	dev_dbg(&dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		"iMON decode started at state %d bitno %d (%uus %s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		data->state, data->count, ev.duration, TO_STR(ev.pulse));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	 * Since iMON protocol is a series of bits, if at any point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	 * we encounter an error, make sure that any remaining bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	 * aren't parsed as a scancode made up of less bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	 * Note that if the stick is held, then the remote repeats
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	 * the scancode with about 12ms between them. So, make sure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	 * we have at least 10ms of space after an error. That way,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	 * we're at a new scancode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (data->state == STATE_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		if (!ev.pulse && ev.duration > MS_TO_US(10))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			data->state = STATE_INACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		if (!geq_margin(ev.duration, IMON_UNIT, IMON_UNIT / 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		decrease_duration(&ev, IMON_UNIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		switch (data->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		case STATE_INACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 			if (ev.pulse) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 				data->state = STATE_BIT_CHK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 				data->bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 				data->count = IMON_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		case STATE_BIT_CHK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			if (IMON_CHKBITS & BIT(data->count))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 				data->last_chk = ev.pulse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			else if (ev.pulse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 				goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			data->state = STATE_BIT_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		case STATE_BIT_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			data->bits <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 			if (!ev.pulse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 				data->bits |= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 			if (IMON_CHKBITS & BIT(data->count)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 				if (data->last_chk != !(data->bits & 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 					goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 			if (!data->count--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 				data->state = STATE_FINISHED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 				data->state = STATE_BIT_CHK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		case STATE_FINISHED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			if (ev.pulse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 				goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			ir_imon_decode_scancode(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 			data->state = STATE_INACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	dev_dbg(&dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		"iMON decode failed at state %d bitno %d (%uus %s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		data->state, data->count, ev.duration, TO_STR(ev.pulse));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	data->state = STATE_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)  * ir_imon_encode() - Encode a scancode as a stream of raw events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)  * @protocol:	protocol to encode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)  * @scancode:	scancode to encode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)  * @events:	array of raw ir events to write into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)  * @max:	maximum size of @events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)  * Returns:	The number of events written.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)  *		-ENOBUFS if there isn't enough space in the array to fit the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)  *		encoding. In this case all @max events will have been written.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int ir_imon_encode(enum rc_proto protocol, u32 scancode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			  struct ir_raw_event *events, unsigned int max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	struct ir_raw_event *e = events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	int i, pulse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	if (!max--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		return -ENOBUFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	init_ir_raw_event_duration(e, 1, IMON_UNIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	for (i = IMON_BITS; i >= 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		if (BIT(i) & IMON_CHKBITS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			pulse = !(scancode & (BIT(i) | BIT(i + 1)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 			pulse = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		if (pulse == e->pulse) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			e->duration += IMON_UNIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 			if (!max--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 				return -ENOBUFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 			init_ir_raw_event_duration(++e, pulse, IMON_UNIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		pulse = !(scancode & BIT(i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		if (pulse == e->pulse) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			e->duration += IMON_UNIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			if (!max--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 				return -ENOBUFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			init_ir_raw_event_duration(++e, pulse, IMON_UNIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	if (e->pulse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		e++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	return e - events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static int ir_imon_register(struct rc_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	struct imon_dec *imon = &dev->raw->imon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	imon->stick_keyboard = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static struct ir_raw_handler imon_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	.protocols	= RC_PROTO_BIT_IMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	.decode		= ir_imon_decode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	.encode		= ir_imon_encode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	.carrier	= 38000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	.raw_register	= ir_imon_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	.min_timeout	= IMON_UNIT * IMON_BITS * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static int __init ir_imon_decode_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	ir_raw_handler_register(&imon_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	pr_info("IR iMON protocol handler initialized\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static void __exit ir_imon_decode_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	ir_raw_handler_unregister(&imon_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) module_init(ir_imon_decode_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) module_exit(ir_imon_decode_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) MODULE_AUTHOR("Sean Young <sean@mess.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MODULE_DESCRIPTION("iMON IR protocol decoder");