Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * GemTek radio card driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 1998 Jonas Munsin <jmunsin@iki.fi>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * GemTek hasn't released any specs on the card, so the protocol had to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * be reverse engineered with dosemu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Besides the protocol changes, this is mostly a copy of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *    RadioTrack II driver for Linux radio support (C) 1998 Ben Pfaff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *    Based on RadioTrack I/RadioReveal (C) 1997 M. Kirkwood
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *    Converted to new API by Alan Cox <alan@lxorguk.ukuu.org.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  *    Various bugfixes and enhancements by Russell Kroll <rkroll@exploits.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * Converted to the radio-isa framework by Hans Verkuil <hans.verkuil@cisco.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * Converted to V4L2 API by Mauro Carvalho Chehab <mchehab@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * Note: this card seems to swap the left and right audio channels!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * Fully tested with the Keene USB FM Transmitter and the v4l2-compliance tool.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/module.h>	/* Modules			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/init.h>		/* Initdata			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/ioport.h>	/* request_region		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/delay.h>	/* udelay			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/videodev2.h>	/* kernel radio structs		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/io.h>		/* outb, outb_p			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/pnp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <media/v4l2-ioctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include "radio-isa.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * Module info.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) MODULE_AUTHOR("Jonas Munsin, Pekka Seppänen <pexu@kapsi.fi>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) MODULE_DESCRIPTION("A driver for the GemTek Radio card.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) MODULE_VERSION("1.0.0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * Module params.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #ifndef CONFIG_RADIO_GEMTEK_PORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define CONFIG_RADIO_GEMTEK_PORT -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #ifndef CONFIG_RADIO_GEMTEK_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define CONFIG_RADIO_GEMTEK_PROBE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define GEMTEK_MAX 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static bool probe = CONFIG_RADIO_GEMTEK_PROBE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static bool hardmute;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) static int io[GEMTEK_MAX] = { [0] = CONFIG_RADIO_GEMTEK_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			      [1 ... (GEMTEK_MAX - 1)] = -1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static int radio_nr[GEMTEK_MAX]	= { [0 ... (GEMTEK_MAX - 1)] = -1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) module_param(probe, bool, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) MODULE_PARM_DESC(probe, "Enable automatic device probing.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) module_param(hardmute, bool, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) MODULE_PARM_DESC(hardmute, "Enable 'hard muting' by shutting down PLL, may reduce static noise.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) module_param_array(io, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) MODULE_PARM_DESC(io, "Force I/O ports for the GemTek Radio card if automatic probing is disabled or fails. The most common I/O ports are: 0x20c 0x30c, 0x24c or 0x34c (0x20c, 0x248 and 0x28c have been reported to work for the combined sound/radiocard).");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) module_param_array(radio_nr, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) MODULE_PARM_DESC(radio_nr, "Radio device numbers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  * Frequency calculation constants.  Intermediate frequency 10.52 MHz (nominal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  * value 10.7 MHz), reference divisor 6.39 kHz (nominal 6.25 kHz).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define FSCALE		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define IF_OFFSET	((unsigned int)(10.52 * 16000 * (1<<FSCALE)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define REF_FREQ	((unsigned int)(6.39 * 16 * (1<<FSCALE)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define GEMTEK_CK		0x01	/* Clock signal			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #define GEMTEK_DA		0x02	/* Serial data			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) #define GEMTEK_CE		0x04	/* Chip enable			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #define GEMTEK_NS		0x08	/* No signal			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) #define GEMTEK_MT		0x10	/* Line mute			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #define GEMTEK_STDF_3_125_KHZ	0x01	/* Standard frequency 3.125 kHz	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define GEMTEK_PLL_OFF		0x07	/* PLL off			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) #define BU2614_BUS_SIZE	32	/* BU2614 / BU2614FS bus size		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define SHORT_DELAY 5		/* usec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define LONG_DELAY 75		/* usec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct gemtek {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	struct radio_isa_card isa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	bool muted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	u32 bu2614data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define BU2614_FREQ_BITS	16 /* D0..D15, Frequency data		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define BU2614_PORT_BITS	3 /* P0..P2, Output port control data	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define BU2614_VOID_BITS	4 /* unused				*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define BU2614_FMES_BITS	1 /* CT, Frequency measurement beginning data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define BU2614_STDF_BITS	3 /* R0..R2, Standard frequency data	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define BU2614_SWIN_BITS	1 /* S, Switch between FMIN / AMIN	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define BU2614_SWAL_BITS        1 /* PS, Swallow counter division (AMIN only)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define BU2614_VOID2_BITS	1 /* unused				*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define BU2614_FMUN_BITS	1 /* GT, Frequency measurement time & unlock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define BU2614_TEST_BITS	1 /* TS, Test data is input		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define BU2614_FREQ_SHIFT	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define BU2614_PORT_SHIFT	(BU2614_FREQ_BITS + BU2614_FREQ_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define BU2614_VOID_SHIFT	(BU2614_PORT_BITS + BU2614_PORT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define BU2614_FMES_SHIFT	(BU2614_VOID_BITS + BU2614_VOID_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define BU2614_STDF_SHIFT	(BU2614_FMES_BITS + BU2614_FMES_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define BU2614_SWIN_SHIFT	(BU2614_STDF_BITS + BU2614_STDF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define BU2614_SWAL_SHIFT	(BU2614_SWIN_BITS + BU2614_SWIN_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define BU2614_VOID2_SHIFT	(BU2614_SWAL_BITS + BU2614_SWAL_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define BU2614_FMUN_SHIFT	(BU2614_VOID2_BITS + BU2614_VOID2_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define BU2614_TEST_SHIFT	(BU2614_FMUN_BITS + BU2614_FMUN_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define MKMASK(field)	(((1UL<<BU2614_##field##_BITS) - 1) << \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			BU2614_##field##_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define BU2614_PORT_MASK	MKMASK(PORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define BU2614_FREQ_MASK	MKMASK(FREQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define BU2614_VOID_MASK	MKMASK(VOID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define BU2614_FMES_MASK	MKMASK(FMES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define BU2614_STDF_MASK	MKMASK(STDF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define BU2614_SWIN_MASK	MKMASK(SWIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define BU2614_SWAL_MASK	MKMASK(SWAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define BU2614_VOID2_MASK	MKMASK(VOID2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define BU2614_FMUN_MASK	MKMASK(FMUN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define BU2614_TEST_MASK	MKMASK(TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)  * Set data which will be sent to BU2614FS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define gemtek_bu2614_set(dev, field, data) ((dev)->bu2614data = \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	((dev)->bu2614data & ~field##_MASK) | ((data) << field##_SHIFT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)  * Transmit settings to BU2614FS over GemTek IC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static void gemtek_bu2614_transmit(struct gemtek *gt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	struct radio_isa_card *isa = &gt->isa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	int i, bit, q, mute;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	mute = gt->muted ? GEMTEK_MT : 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	outb_p(mute | GEMTEK_CE | GEMTEK_DA | GEMTEK_CK, isa->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	udelay(LONG_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	for (i = 0, q = gt->bu2614data; i < 32; i++, q >>= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		bit = (q & 1) ? GEMTEK_DA : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		outb_p(mute | GEMTEK_CE | bit, isa->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		udelay(SHORT_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		outb_p(mute | GEMTEK_CE | bit | GEMTEK_CK, isa->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		udelay(SHORT_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	outb_p(mute | GEMTEK_DA | GEMTEK_CK, isa->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	udelay(SHORT_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)  * Calculate divisor from FM-frequency for BU2614FS (3.125 KHz STDF expected).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static unsigned long gemtek_convfreq(unsigned long freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	return ((freq << FSCALE) + IF_OFFSET + REF_FREQ / 2) / REF_FREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static struct radio_isa_card *gemtek_alloc(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct gemtek *gt = kzalloc(sizeof(*gt), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	if (gt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		gt->muted = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	return gt ? &gt->isa : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)  * Set FM-frequency.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static int gemtek_s_frequency(struct radio_isa_card *isa, u32 freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct gemtek *gt = container_of(isa, struct gemtek, isa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	if (hardmute && gt->muted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	gemtek_bu2614_set(gt, BU2614_PORT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	gemtek_bu2614_set(gt, BU2614_FMES, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	gemtek_bu2614_set(gt, BU2614_SWIN, 0);	/* FM-mode	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	gemtek_bu2614_set(gt, BU2614_SWAL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	gemtek_bu2614_set(gt, BU2614_FMUN, 1);	/* GT bit set	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	gemtek_bu2614_set(gt, BU2614_TEST, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	gemtek_bu2614_set(gt, BU2614_STDF, GEMTEK_STDF_3_125_KHZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	gemtek_bu2614_set(gt, BU2614_FREQ, gemtek_convfreq(freq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	gemtek_bu2614_transmit(gt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)  * Set mute flag.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int gemtek_s_mute_volume(struct radio_isa_card *isa, bool mute, int vol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	struct gemtek *gt = container_of(isa, struct gemtek, isa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	gt->muted = mute;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (hardmute) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		if (!mute)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			return gemtek_s_frequency(isa, isa->freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		/* Turn off PLL, disable data output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		gemtek_bu2614_set(gt, BU2614_PORT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		gemtek_bu2614_set(gt, BU2614_FMES, 0);	/* CT bit off	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		gemtek_bu2614_set(gt, BU2614_SWIN, 0);	/* FM-mode	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		gemtek_bu2614_set(gt, BU2614_SWAL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		gemtek_bu2614_set(gt, BU2614_FMUN, 0);	/* GT bit off	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		gemtek_bu2614_set(gt, BU2614_TEST, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		gemtek_bu2614_set(gt, BU2614_STDF, GEMTEK_PLL_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		gemtek_bu2614_set(gt, BU2614_FREQ, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		gemtek_bu2614_transmit(gt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	/* Read bus contents (CE, CK and DA). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	i = inb_p(isa->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	/* Write it back with mute flag set. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	outb_p((i >> 5) | (mute ? GEMTEK_MT : 0), isa->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	udelay(SHORT_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static u32 gemtek_g_rxsubchans(struct radio_isa_card *isa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	if (inb_p(isa->io) & GEMTEK_NS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		return V4L2_TUNER_SUB_MONO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	return V4L2_TUNER_SUB_STEREO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)  * Check if requested card acts like GemTek Radio card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static bool gemtek_probe(struct radio_isa_card *isa, int io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	int i, q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	q = inb_p(io);	/* Read bus contents before probing. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	/* Try to turn on CE, CK and DA respectively and check if card responds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	   properly. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	for (i = 0; i < 3; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		outb_p(1 << i, io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		udelay(SHORT_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		if ((inb_p(io) & ~GEMTEK_NS) != (0x17 | (1 << (i + 5))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	outb_p(q >> 5, io);	/* Write bus contents back. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	udelay(SHORT_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static const struct radio_isa_ops gemtek_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	.alloc = gemtek_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	.probe = gemtek_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	.s_mute_volume = gemtek_s_mute_volume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	.s_frequency = gemtek_s_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	.g_rxsubchans = gemtek_g_rxsubchans,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static const int gemtek_ioports[] = { 0x20c, 0x30c, 0x24c, 0x34c, 0x248, 0x28c };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static const struct pnp_device_id gemtek_pnp_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	/* AOpen FX-3D/Pro Radio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	{.id = "ADS7183", .driver_data = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	{.id = ""}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) MODULE_DEVICE_TABLE(pnp, gemtek_pnp_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static struct radio_isa_driver gemtek_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		.match		= radio_isa_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		.probe		= radio_isa_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		.remove		= radio_isa_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 			.name	= "radio-gemtek",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	.pnp_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		.name		= "radio-gemtek",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		.id_table	= gemtek_pnp_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		.probe		= radio_isa_pnp_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		.remove		= radio_isa_pnp_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	.io_params = io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	.radio_nr_params = radio_nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	.io_ports = gemtek_ioports,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	.num_of_io_ports = ARRAY_SIZE(gemtek_ioports),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	.region_size = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	.card = "GemTek Radio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	.ops = &gemtek_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	.has_stereo = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static int __init gemtek_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	gemtek_driver.probe = probe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	pnp_register_driver(&gemtek_driver.pnp_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	return isa_register_driver(&gemtek_driver.driver, GEMTEK_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static void __exit gemtek_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	hardmute = true;	/* Turn off PLL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	pnp_unregister_driver(&gemtek_driver.pnp_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	isa_unregister_driver(&gemtek_driver.driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) module_init(gemtek_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) module_exit(gemtek_exit);