Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef __LM7000_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define __LM7000_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /* Sanyo LM7000 tuner chip control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright 2012 Ondrej Zary <linux@rainbow-software.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * based on radio-aimslab.c by M. Kirkwood
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * and radio-sf16fmi.c by M. Kirkwood and Petr Vandrovec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define LM7000_DATA	(1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define LM7000_CLK	(1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define LM7000_CE	(1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define LM7000_FM_100	(0 << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define LM7000_FM_50	(1 << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define LM7000_FM_25	(2 << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define LM7000_BIT_FM	(1 << 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static inline void lm7000_set_freq(u32 freq, void *handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 				void (*set_pins)(void *handle, u8 pins))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	freq += 171200;		/* Add 10.7 MHz IF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	freq /= 400;		/* Convert to 25 kHz units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	val = freq | LM7000_FM_25 | LM7000_BIT_FM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	/* write the 24-bit register, starting with LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	for (i = 0; i < 24; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		data = val & (1 << i) ? LM7000_DATA : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		set_pins(handle, data | LM7000_CE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		udelay(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		set_pins(handle, data | LM7000_CE | LM7000_CLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		udelay(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		set_pins(handle, data | LM7000_CE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		udelay(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	set_pins(handle, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif /* __LM7000_H */