Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Original author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Ben Collins <bcollins@ubuntu.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Additional work by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * John Brooks <john.brooks@bluecherry.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include "solo6x10.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) /* Control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define EE_SHIFT_CLK	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define EE_CS		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define EE_DATA_WRITE	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define EE_DATA_READ	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define EE_ENB		(0x80 | EE_CS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define eeprom_delay()	udelay(100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define eeprom_delay()	solo_reg_read(solo_dev, SOLO_EEPROM_CTRL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define eeprom_delay()	({				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	int i, ret;					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	udelay(100);					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	for (i = ret = 0; i < 1000 && !ret; i++)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		ret = solo_eeprom_reg_read(solo_dev);	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define ADDR_LEN	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) /* Commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define EE_EWEN_CMD	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define EE_EWDS_CMD	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define EE_WRITE_CMD	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define EE_READ_CMD	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define EE_ERASE_CMD	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static unsigned int solo_eeprom_reg_read(struct solo_dev *solo_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	return solo_reg_read(solo_dev, SOLO_EEPROM_CTRL) & EE_DATA_READ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static void solo_eeprom_reg_write(struct solo_dev *solo_dev, u32 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	solo_reg_write(solo_dev, SOLO_EEPROM_CTRL, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	eeprom_delay();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static void solo_eeprom_cmd(struct solo_dev *solo_dev, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ACCESS_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	for (i = 4 + ADDR_LEN; i >= 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		int dataval = (cmd & (1 << i)) ? EE_DATA_WRITE : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE | dataval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 				      EE_SHIFT_CLK | dataval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	int ewen_cmd = (w_en ? 0x3f : 0) | (EE_EWEN_CMD << ADDR_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	unsigned int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	solo_eeprom_cmd(solo_dev, ewen_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 				      EE_SHIFT_CLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		retval = (retval << 1) | solo_eeprom_reg_read(solo_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		retval = (retval << 1) | solo_eeprom_reg_read(solo_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	solo_eeprom_reg_write(solo_dev, ~EE_CS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	retval = (retval << 1) | solo_eeprom_reg_read(solo_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) __be16 solo_eeprom_read(struct solo_dev *solo_dev, int loc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	int read_cmd = loc | (EE_READ_CMD << ADDR_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	u16 retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	solo_eeprom_cmd(solo_dev, read_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				      EE_SHIFT_CLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		retval = (retval << 1) | solo_eeprom_reg_read(solo_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	solo_eeprom_reg_write(solo_dev, ~EE_CS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	return (__force __be16)retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		      __be16 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	int write_cmd = loc | (EE_WRITE_CMD << ADDR_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	unsigned int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	solo_eeprom_cmd(solo_dev, write_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	for (i = 15; i >= 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		unsigned int dataval = ((__force unsigned)data >> i) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		solo_eeprom_reg_write(solo_dev, EE_ENB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		solo_eeprom_reg_write(solo_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 				      EE_ENB | (dataval << 1) | EE_SHIFT_CLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	solo_eeprom_reg_write(solo_dev, EE_ENB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	solo_eeprom_reg_write(solo_dev, ~EE_CS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	solo_eeprom_reg_write(solo_dev, EE_ENB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	for (i = retval = 0; i < 10000 && !retval; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		retval = solo_eeprom_reg_read(solo_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	solo_eeprom_reg_write(solo_dev, ~EE_CS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return !retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }