Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * netup-eeprom.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * 24LC02 EEPROM driver in conjunction with NetUP Dual DVB-S2 CI card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright (C) 2009 NetUP Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Copyright (C) 2009 Abylay Ospan <aospan@netup.ru>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "cx23885.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "netup-eeprom.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define EEPROM_I2C_ADDR 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) int netup_eeprom_read(struct i2c_adapter *i2c_adap, u8 addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	unsigned char buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	/* Read from EEPROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 			.addr	= EEPROM_I2C_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 			.flags	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 			.buf	= &buf[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 			.len	= 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 			.addr	= EEPROM_I2C_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 			.flags	= I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 			.buf	= &buf[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 			.len	= 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	buf[0] = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	buf[1] = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	ret = i2c_transfer(i2c_adap, msg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	if (ret != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		pr_err("eeprom i2c read error, status=%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	return buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int netup_eeprom_write(struct i2c_adapter *i2c_adap, u8 addr, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	unsigned char bufw[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	/* Write into EEPROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 			.addr	= EEPROM_I2C_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 			.flags	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 			.buf	= &bufw[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 			.len	= 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	bufw[0] = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	bufw[1] = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	ret = i2c_transfer(i2c_adap, msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	if (ret != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 		pr_err("eeprom i2c write error, status=%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	mdelay(10); /* prophylactic delay, datasheet write cycle time = 5 ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) void netup_get_card_info(struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 				struct netup_card_info *cinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 	cinfo->rev =  netup_eeprom_read(i2c_adap, 63);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 	for (i = 64, j = 0; i < 70; i++, j++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 		cinfo->port[0].mac[j] =  netup_eeprom_read(i2c_adap, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 	for (i = 70, j = 0; i < 76; i++, j++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 		cinfo->port[1].mac[j] =  netup_eeprom_read(i2c_adap, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };