^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for the Conexant CX23885 PCIe bridge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include "cx23885.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <media/drv-intf/cx25840.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <misc/altera.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "tuner-xc2028.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "netup-eeprom.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "netup-init.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "altera-ci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "xc4000.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "xc5000.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "cx23888-ir.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static unsigned int netup_card_rev = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) module_param(netup_card_rev, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MODULE_PARM_DESC(netup_card_rev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) "NetUP Dual DVB-T/C CI card revision");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static unsigned int enable_885_ir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) module_param(enable_885_ir, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MODULE_PARM_DESC(enable_885_ir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) "Enable integrated IR controller for supported\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) "\t\t CX2388[57] boards that are wired for it:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) "\t\t\tHVR-1250 (reported safe)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) "\t\t\tTeVii S470 (reported unsafe)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) "\t\t This can cause an interrupt storm with some cards.\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) "\t\t Default: 0 [Disabled]");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* ------------------------------------------------------------------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* board config info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct cx23885_board cx23885_boards[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) [CX23885_BOARD_UNKNOWN] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .name = "UNKNOWN/GENERIC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* Ensure safe default for unknown boards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .clk_freq = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .vmux = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .type = CX23885_VMUX_COMPOSITE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .vmux = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .type = CX23885_VMUX_COMPOSITE3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .vmux = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .type = CX23885_VMUX_COMPOSITE4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .vmux = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .name = "Hauppauge WinTV-HVR1800lp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .vmux = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .gpio0 = 0xff00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .type = CX23885_VMUX_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .vmux = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .gpio0 = 0xff01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .vmux = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .gpio0 = 0xff02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .vmux = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .gpio0 = 0xff02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .name = "Hauppauge WinTV-HVR1800",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .portb = CX23885_MPEG_ENCODER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .tuner_type = TUNER_PHILIPS_TDA8290,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .tuner_addr = 0x42, /* 0x84 >> 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .tuner_bus = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) CX25840_VIN2_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .gpio0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) CX25840_VIN6_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .gpio0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) CX25840_VIN8_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .gpio0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .name = "Hauppauge WinTV-HVR1250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #ifdef MT2131_NO_ANALOG_SUPPORT_YET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .tuner_type = TUNER_PHILIPS_TDA8290,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .tuner_addr = 0x42, /* 0x84 >> 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .tuner_bus = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .force_bff = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #ifdef MT2131_NO_ANALOG_SUPPORT_YET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) CX25840_VIN2_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .gpio0 = 0xff00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) CX25840_VIN6_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .gpio0 = 0xff02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) CX25840_VIN8_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .gpio0 = 0xff02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .name = "DViCO FusionHDTV5 Express",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .name = "Hauppauge WinTV-HVR1500Q",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .name = "Hauppauge WinTV-HVR1500",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .tuner_type = TUNER_XC2028,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .tuner_addr = 0x61, /* 0xc2 >> 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) CX25840_VIN2_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .gpio0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) CX25840_VIN6_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .gpio0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) CX25840_VIN8_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .gpio0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .name = "Hauppauge WinTV-HVR1200",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .name = "Hauppauge WinTV-HVR1700",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .name = "Hauppauge WinTV-HVR1400",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .name = "DViCO FusionHDTV7 Dual Express",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .name = "DViCO FusionHDTV DVB-T Dual Express",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .name = "Leadtek Winfast PxDVR3200 H",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .name = "Leadtek Winfast PxPVR2200",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .tuner_type = TUNER_XC2028,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .tuner_addr = 0x61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .tuner_bus = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .vmux = CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) CX25840_VIN5_CH2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .gpio0 = 0x704040,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .vmux = CX25840_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .gpio0 = 0x704040,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .vmux = CX25840_SVIDEO_LUMA3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) CX25840_SVIDEO_CHROMA4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .gpio0 = 0x704040,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .type = CX23885_VMUX_COMPONENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .vmux = CX25840_VIN7_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) CX25840_VIN6_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) CX25840_VIN8_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) CX25840_COMPONENT_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .gpio0 = 0x704040,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .name = "Leadtek Winfast PxDVR3200 H XC4000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .tuner_type = TUNER_XC4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .tuner_addr = 0x61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .radio_type = UNSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .radio_addr = ADDR_UNSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .vmux = CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) CX25840_NONE0_CH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .vmux = CX25840_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .vmux = CX25840_SVIDEO_LUMA3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) CX25840_SVIDEO_CHROMA4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .type = CX23885_VMUX_COMPONENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .vmux = CX25840_VIN7_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) CX25840_VIN6_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) CX25840_VIN8_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) CX25840_COMPONENT_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .name = "Compro VideoMate E650F",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) [CX23885_BOARD_TBS_6920] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .name = "TurboSight TBS 6920",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) [CX23885_BOARD_TBS_6980] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .name = "TurboSight TBS 6980",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) [CX23885_BOARD_TBS_6981] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .name = "TurboSight TBS 6981",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) [CX23885_BOARD_TEVII_S470] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .name = "TeVii S470",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) [CX23885_BOARD_DVBWORLD_2005] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .name = "DVBWorld DVB-S2 2005",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .ci_type = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .name = "NetUP Dual DVB-S2 CI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .name = "Hauppauge WinTV-HVR1270",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .name = "Hauppauge WinTV-HVR1275",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .name = "Hauppauge WinTV-HVR1255",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .tuner_type = TUNER_ABSENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .tuner_addr = 0x42, /* 0x84 >> 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .force_bff = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) CX25840_DIF_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) CX25840_VIN6_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) CX25840_VIN8_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .name = "Hauppauge WinTV-HVR1255",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .tuner_type = TUNER_ABSENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .tuner_addr = 0x42, /* 0x84 >> 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .force_bff = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) CX25840_DIF_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) CX25840_VIN8_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .name = "Hauppauge WinTV-HVR1210",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) [CX23885_BOARD_MYGICA_X8506] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .name = "Mygica X8506 DMB-TH",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .tuner_type = TUNER_XC5000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .tuner_addr = 0x61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .tuner_bus = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .input = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .vmux = CX25840_COMPOSITE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .vmux = CX25840_COMPOSITE8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .vmux = CX25840_SVIDEO_LUMA3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) CX25840_SVIDEO_CHROMA4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .type = CX23885_VMUX_COMPONENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .vmux = CX25840_COMPONENT_ON |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) CX25840_VIN1_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) CX25840_VIN6_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) CX25840_VIN7_CH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .name = "Magic-Pro ProHDTV Extreme 2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .tuner_type = TUNER_XC5000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .tuner_addr = 0x61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .tuner_bus = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .input = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .vmux = CX25840_COMPOSITE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .vmux = CX25840_COMPOSITE8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .vmux = CX25840_SVIDEO_LUMA3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) CX25840_SVIDEO_CHROMA4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .type = CX23885_VMUX_COMPONENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .vmux = CX25840_COMPONENT_ON |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) CX25840_VIN1_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) CX25840_VIN6_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) CX25840_VIN7_CH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .name = "Hauppauge WinTV-HVR1850",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .portb = CX23885_MPEG_ENCODER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .tuner_type = TUNER_ABSENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .tuner_addr = 0x42, /* 0x84 >> 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .force_bff = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) CX25840_DIF_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) CX25840_VIN6_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) CX25840_VIN8_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .name = "Compro VideoMate E800",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) .name = "Hauppauge WinTV-HVR1290",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) [CX23885_BOARD_MYGICA_X8558PRO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .name = "Mygica X8558 PRO DMB-TH",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .name = "LEADTEK WinFast PxTV1200",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .tuner_type = TUNER_XC2028,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .tuner_addr = 0x61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .tuner_bus = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) .vmux = CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) CX25840_NONE0_CH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .vmux = CX25840_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .vmux = CX25840_SVIDEO_LUMA3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) CX25840_SVIDEO_CHROMA4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .type = CX23885_VMUX_COMPONENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) .vmux = CX25840_VIN7_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) CX25840_VIN6_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) CX25840_VIN8_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) CX25840_COMPONENT_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .name = "GoTView X5 3D Hybrid",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .tuner_type = TUNER_XC5000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .tuner_addr = 0x64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .tuner_bus = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .vmux = CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) CX25840_VIN5_CH2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .gpio0 = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .vmux = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .vmux = CX25840_SVIDEO_LUMA3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) CX25840_SVIDEO_CHROMA4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) .ci_type = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .name = "NetUP Dual DVB-T/C-CI RF",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .num_fds_portb = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .num_fds_portc = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .tuner_type = TUNER_XC5000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .tuner_addr = 0x64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .input = { {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .vmux = CX25840_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) [CX23885_BOARD_MPX885] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) .name = "MPX-885",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .vmux = CX25840_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .amux = CX25840_AUDIO6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .gpio0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .type = CX23885_VMUX_COMPOSITE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .vmux = CX25840_COMPOSITE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) .amux = CX25840_AUDIO6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .gpio0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .type = CX23885_VMUX_COMPOSITE3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) .vmux = CX25840_COMPOSITE3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) .gpio0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .type = CX23885_VMUX_COMPOSITE4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .vmux = CX25840_COMPOSITE4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .gpio0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) [CX23885_BOARD_MYGICA_X8507] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) .name = "Mygica X8502/X8507 ISDB-T",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) .tuner_type = TUNER_XC5000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) .tuner_addr = 0x61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) .tuner_bus = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) .input = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .vmux = CX25840_COMPOSITE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .vmux = CX25840_COMPOSITE8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) .vmux = CX25840_SVIDEO_LUMA3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) CX25840_SVIDEO_CHROMA4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .type = CX23885_VMUX_COMPONENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) .vmux = CX25840_COMPONENT_ON |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) CX25840_VIN1_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) CX25840_VIN6_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) CX25840_VIN7_CH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) .name = "TerraTec Cinergy T PCIe Dual",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) [CX23885_BOARD_TEVII_S471] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) .name = "TeVii S471",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) [CX23885_BOARD_PROF_8000] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) .name = "Prof Revolution DVB-S2 8000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) .name = "Hauppauge WinTV-HVR4400/HVR5500",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .tuner_type = TUNER_NXP_TDA18271,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .tuner_addr = 0x60, /* 0xc0 >> 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) .tuner_bus = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) [CX23885_BOARD_HAUPPAUGE_STARBURST] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .name = "Hauppauge WinTV Starburst",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) [CX23885_BOARD_AVERMEDIA_HC81R] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .name = "AVerTV Hybrid Express Slim HC81R",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .tuner_type = TUNER_XC2028,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) .tuner_addr = 0x61, /* 0xc2 >> 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) .tuner_bus = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) .vmux = CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) CX25840_NONE0_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) CX25840_NONE1_CH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) .vmux = CX25840_VIN8_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) CX25840_NONE_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) .amux = CX25840_AUDIO6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) .type = CX23885_VMUX_COMPONENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .vmux = CX25840_VIN1_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) CX25840_NONE_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) CX25840_NONE0_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) CX25840_NONE1_CH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .amux = CX25840_AUDIO6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .name = "DViCO FusionHDTV DVB-T Dual Express2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) .name = "Hauppauge ImpactVCB-e",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .tuner_type = TUNER_ABSENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) CX25840_VIN6_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) CX25840_VIN8_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) [CX23885_BOARD_DVBSKY_T9580] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) .name = "DVBSky T9580",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) [CX23885_BOARD_DVBSKY_T980C] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) .name = "DVBSky T980C",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) [CX23885_BOARD_DVBSKY_S950C] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) .name = "DVBSky S950C",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) [CX23885_BOARD_TT_CT2_4500_CI] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) .name = "Technotrend TT-budget CT2-4500 CI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) [CX23885_BOARD_DVBSKY_S950] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .name = "DVBSky S950",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) [CX23885_BOARD_DVBSKY_S952] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) .name = "DVBSky S952",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) [CX23885_BOARD_DVBSKY_T982] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) .name = "DVBSky T982",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) [CX23885_BOARD_HAUPPAUGE_HVR5525] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) .name = "Hauppauge WinTV-HVR5525",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) .tuner_type = TUNER_ABSENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) .force_bff = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) CX25840_DIF_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) [CX23885_BOARD_VIEWCAST_260E] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) .name = "ViewCast 260e",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) .force_bff = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) .vmux = CX25840_VIN6_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) CX25840_VIN5_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) .type = CX23885_VMUX_COMPONENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) CX25840_VIN6_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) CX25840_VIN5_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) CX25840_COMPONENT_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) [CX23885_BOARD_VIEWCAST_460E] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) .name = "ViewCast 460e",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) .force_bff = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) .vmux = CX25840_VIN4_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) CX25840_VIN6_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) .type = CX23885_VMUX_COMPONENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) CX25840_VIN6_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) CX25840_COMPONENT_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) .type = CX23885_VMUX_COMPOSITE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) .vmux = CX25840_VIN6_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) .name = "Hauppauge WinTV-QuadHD-DVB",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) .tuner_type = TUNER_ABSENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) .force_bff = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) CX25840_DIF_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) .name = "Hauppauge WinTV-QuadHD-DVB(885)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) .tuner_type = TUNER_ABSENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) .name = "Hauppauge WinTV-QuadHD-ATSC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) .tuner_type = TUNER_ABSENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) CX25840_DIF_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) .name = "Hauppauge WinTV-QuadHD-ATSC(885)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) .tuner_type = TUNER_ABSENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) [CX23885_BOARD_HAUPPAUGE_HVR1265_K4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) .name = "Hauppauge WinTV-HVR-1265(161111)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) .portc = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) .tuner_type = TUNER_ABSENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) .type = CX23885_VMUX_TELEVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) CX25840_VIN5_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) CX25840_VIN2_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) CX25840_DIF_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .amux = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) CX25840_VIN6_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) .vmux = CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) CX25840_VIN4_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) CX25840_VIN8_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) [CX23885_BOARD_HAUPPAUGE_STARBURST2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) .name = "Hauppauge WinTV-Starburst2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) .portb = CX23885_MPEG_DVB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) [CX23885_BOARD_AVERMEDIA_CE310B] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .name = "AVerMedia CE310B",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) .porta = CX23885_ANALOG_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) .force_bff = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) .input = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) .type = CX23885_VMUX_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) .vmux = CX25840_VIN1_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) CX25840_NONE_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) CX25840_NONE0_CH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) .type = CX23885_VMUX_SVIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) .vmux = CX25840_VIN8_CH1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) CX25840_NONE_CH2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) CX25840_VIN7_CH3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) CX25840_SVIDEO_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) .amux = CX25840_AUDIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) /* ------------------------------------------------------------------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) /* PCI subsystem IDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) struct cx23885_subid cx23885_subids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) .subdevice = 0x3400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .card = CX23885_BOARD_UNKNOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) .subdevice = 0x7600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) .subdevice = 0x7800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) .subdevice = 0x7801,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .subdevice = 0x7809,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) .subdevice = 0x7911,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) .subvendor = 0x18ac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) .subdevice = 0xd500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) .subdevice = 0x7790,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) .subdevice = 0x7797,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) .subdevice = 0x7710,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) .subdevice = 0x7717,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) .subdevice = 0x71d1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) .subdevice = 0x71d3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) .subdevice = 0x8101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) .subdevice = 0x8010,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) .subvendor = 0x18ac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) .subdevice = 0xd618,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) .subvendor = 0x18ac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) .subdevice = 0xdb78,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) .subvendor = 0x107d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) .subdevice = 0x6681,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) .subvendor = 0x107d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) .subdevice = 0x6f21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) .subvendor = 0x107d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) .subdevice = 0x6f39,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) .subvendor = 0x185b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) .subdevice = 0xe800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) .subvendor = 0x6920,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) .subdevice = 0x8888,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) .card = CX23885_BOARD_TBS_6920,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) .subvendor = 0x6980,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) .subdevice = 0x8888,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) .card = CX23885_BOARD_TBS_6980,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) .subvendor = 0x6981,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) .subdevice = 0x8888,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) .card = CX23885_BOARD_TBS_6981,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) .subvendor = 0xd470,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) .subdevice = 0x9022,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) .card = CX23885_BOARD_TEVII_S470,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) .subvendor = 0x0001,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) .subdevice = 0x2005,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) .card = CX23885_BOARD_DVBWORLD_2005,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) .subvendor = 0x1b55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) .subdevice = 0x2a2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) .subdevice = 0x2211,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) .subdevice = 0x2215,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) .subdevice = 0x221d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) .subdevice = 0x2251,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) .subdevice = 0x2259,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) .subdevice = 0x2291,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) .subdevice = 0x2295,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) .subdevice = 0x2299,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) .subdevice = 0x229d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) .subdevice = 0x22f0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) .subdevice = 0x22f1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) .subdevice = 0x22f2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) .subdevice = 0x22f3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) .subdevice = 0x22f4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) .subdevice = 0x22f5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) .subvendor = 0x14f1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) .subdevice = 0x8651,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) .card = CX23885_BOARD_MYGICA_X8506,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) .subvendor = 0x14f1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) .subdevice = 0x8657,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) .subdevice = 0x8541,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) .subvendor = 0x1858,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) .subdevice = 0xe800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) .subdevice = 0x8551,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) .subvendor = 0x14f1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) .subdevice = 0x8578,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) .card = CX23885_BOARD_MYGICA_X8558PRO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) .subvendor = 0x107d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) .subdevice = 0x6f22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) .subvendor = 0x5654,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) .subdevice = 0x2390,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) .subvendor = 0x1b55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) .subdevice = 0xe2e4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) .subvendor = 0x14f1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) .subdevice = 0x8502,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) .card = CX23885_BOARD_MYGICA_X8507,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) .subvendor = 0x153b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) .subdevice = 0x117e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) .subvendor = 0xd471,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) .subdevice = 0x9022,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) .card = CX23885_BOARD_TEVII_S471,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) .subvendor = 0x8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) .subdevice = 0x3034,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) .card = CX23885_BOARD_PROF_8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) .subdevice = 0xc108,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) .subdevice = 0xc138,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) .subdevice = 0xc12a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) .subdevice = 0xc1f8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) .subvendor = 0x1461,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) .subdevice = 0xd939,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) .card = CX23885_BOARD_AVERMEDIA_HC81R,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) .subdevice = 0x7133,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) .subdevice = 0x7137,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) .subvendor = 0x18ac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) .subdevice = 0xdb98,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) .subvendor = 0x4254,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) .subdevice = 0x9580,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) .card = CX23885_BOARD_DVBSKY_T9580,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) .subvendor = 0x4254,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) .subdevice = 0x980c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) .card = CX23885_BOARD_DVBSKY_T980C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) .subvendor = 0x4254,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) .subdevice = 0x950c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) .card = CX23885_BOARD_DVBSKY_S950C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) .subvendor = 0x13c2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) .subdevice = 0x3013,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) .card = CX23885_BOARD_TT_CT2_4500_CI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) .subvendor = 0x4254,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) .subdevice = 0x0950,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) .card = CX23885_BOARD_DVBSKY_S950,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) .subvendor = 0x4254,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) .subdevice = 0x0952,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) .card = CX23885_BOARD_DVBSKY_S952,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) .subvendor = 0x4254,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) .subdevice = 0x0982,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) .card = CX23885_BOARD_DVBSKY_T982,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) .subdevice = 0xf038,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) .card = CX23885_BOARD_HAUPPAUGE_HVR5525,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) .subvendor = 0x1576,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) .subdevice = 0x0260,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) .card = CX23885_BOARD_VIEWCAST_260E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) .subvendor = 0x1576,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) .subdevice = 0x0460,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) .card = CX23885_BOARD_VIEWCAST_460E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) .subdevice = 0x6a28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) .subdevice = 0x6b28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) .subdevice = 0x6a18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) .subdevice = 0x6b18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) .subdevice = 0x2a18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) .card = CX23885_BOARD_HAUPPAUGE_HVR1265_K4, /* Hauppauge WinTV HVR-1265 (Model 161xx1, Hybrid ATSC/QAM-B) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) .subvendor = 0x0070,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) .subdevice = 0xf02a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) .card = CX23885_BOARD_HAUPPAUGE_STARBURST2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) .subvendor = 0x1461,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) .subdevice = 0x3100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) .card = CX23885_BOARD_AVERMEDIA_CE310B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) void cx23885_card_list(struct cx23885_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) if (0 == dev->pci->subsystem_vendor &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) 0 == dev->pci->subsystem_device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) "%s: be autodetected. Pass card=<n> insmod option\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) "%s: to workaround that. Redirect complaints to the\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) "%s: vendor of the TV card. Best regards,\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) "%s: -- tux\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) dev->name, dev->name, dev->name, dev->name, dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) pr_info("%s: Your board isn't known (yet) to the driver.\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) "%s: Try to pick one of the existing card configs via\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) "%s: card=<n> insmod option. Updating to the latest\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) "%s: version might help as well.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) dev->name, dev->name, dev->name, dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) for (i = 0; i < cx23885_bcount; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) pr_info("%s: card=%d -> %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) dev->name, i, cx23885_boards[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) u32 sn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) /* The serial number record begins with tag 0x59 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) if (*(eeprom_data + 0x00) != 0x59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) pr_info("%s() eeprom records are undefined, no serial number\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) sn = (*(eeprom_data + 0x06) << 24) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) (*(eeprom_data + 0x05) << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) (*(eeprom_data + 0x04) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) (*(eeprom_data + 0x03));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) pr_info("%s: card '%s' sn# MM%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) dev->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) cx23885_boards[dev->board].name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) sn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) struct tveeprom tv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) tveeprom_hauppauge_analog(&tv, eeprom_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) /* Make sure we support the board model */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) switch (tv.model) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) case 22001:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) /* WinTV-HVR1270 (PCIe, Retail, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) * ATSC/QAM and basic analog, IR Blast */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) case 22009:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) /* WinTV-HVR1210 (PCIe, Retail, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) * DVB-T and basic analog, IR Blast */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) case 22011:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) /* WinTV-HVR1270 (PCIe, Retail, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) * ATSC/QAM and basic analog, IR Recv */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) case 22019:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) /* WinTV-HVR1210 (PCIe, Retail, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) * DVB-T and basic analog, IR Recv */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) case 22021:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) /* WinTV-HVR1275 (PCIe, Retail, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) * ATSC/QAM and basic analog, IR Recv */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) case 22029:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) /* WinTV-HVR1210 (PCIe, Retail, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) * DVB-T and basic analog, IR Recv */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) case 22101:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) /* WinTV-HVR1270 (PCIe, Retail, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) * ATSC/QAM and basic analog, IR Blast */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) case 22109:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) /* WinTV-HVR1210 (PCIe, Retail, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) * DVB-T and basic analog, IR Blast */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) case 22111:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) /* WinTV-HVR1270 (PCIe, Retail, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) * ATSC/QAM and basic analog, IR Recv */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) case 22119:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) /* WinTV-HVR1210 (PCIe, Retail, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) * DVB-T and basic analog, IR Recv */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) case 22121:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) /* WinTV-HVR1275 (PCIe, Retail, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) * ATSC/QAM and basic analog, IR Recv */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) case 22129:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) /* WinTV-HVR1210 (PCIe, Retail, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) * DVB-T and basic analog, IR Recv */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) case 71009:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) /* WinTV-HVR1200 (PCIe, Retail, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) * DVB-T and basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) case 71100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) * Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) case 71359:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) /* WinTV-HVR1200 (PCIe, OEM, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) * DVB-T and basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) case 71439:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) /* WinTV-HVR1200 (PCIe, OEM, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) * DVB-T and basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) case 71449:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) /* WinTV-HVR1200 (PCIe, OEM, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) * DVB-T and basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) case 71939:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) /* WinTV-HVR1200 (PCIe, OEM, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) * DVB-T and basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) case 71949:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) /* WinTV-HVR1200 (PCIe, OEM, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) * DVB-T and basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) case 71959:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) /* WinTV-HVR1200 (PCIe, OEM, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) * DVB-T and basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) case 71979:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) /* WinTV-HVR1200 (PCIe, OEM, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) * DVB-T and basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) case 71999:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) /* WinTV-HVR1200 (PCIe, OEM, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) * DVB-T and basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) case 76601:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) channel ATSC and MPEG2 HW Encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) case 77001:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) case 77011:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) case 77041:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) case 77051:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) case 78011:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) Dual channel ATSC and MPEG2 HW Encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) case 78501:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) Dual channel ATSC and MPEG2 HW Encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) case 78521:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) Dual channel ATSC and MPEG2 HW Encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) case 78531:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) Dual channel ATSC and MPEG2 HW Encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) case 78631:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) Dual channel ATSC and MPEG2 HW Encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) case 79001:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) ATSC and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) case 79101:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) ATSC and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) case 79501:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) /* WinTV-HVR1250 (PCIe, No IR, half height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) ATSC [at least] and Basic analog) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) case 79561:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) ATSC and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) case 79571:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) ATSC and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) case 79671:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) ATSC and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) case 80019:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) /* WinTV-HVR1400 (Express Card, Retail, IR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) * DVB-T and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) case 81509:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) * DVB-T and MPEG2 HW Encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) case 81519:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) * DVB-T and MPEG2 HW Encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) case 85021:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) Dual channel ATSC and MPEG2 HW Encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) case 85721:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) Dual channel ATSC and Basic analog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) case 121019:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) /* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) case 121029:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) /* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) case 150329:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) case 161111:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) /* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) case 166100: /* 888 version, hybrid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) case 166200: /* 885 version, DVB only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) DVB-T/T2/C, DVB-T/T2/C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) case 166101: /* 888 version, hybrid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) case 166201: /* 885 version, DVB only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) DVB-T/T2/C, DVB-T/T2/C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) case 165100: /* 888 version, hybrid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) case 165200: /* 885 version, digital only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) /* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) * ATSC/QAM-B, ATSC/QAM-B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) case 165101: /* 888 version, hybrid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) case 165201: /* 885 version, digital only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) /* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) * ATSC/QAM-B, ATSC/QAM-B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) pr_warn("%s: warning: unknown hauppauge model #%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) dev->name, tv.model);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) pr_info("%s: hauppauge eeprom: model=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) dev->name, tv.model);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) /* Some TBS cards require initing a chip using a bitbanged SPI attached
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) to the cx23885 gpio's. If this chip doesn't get init'ed the demod
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) doesn't respond to any command. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) static void tbs_card_init(struct cx23885_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) static const u8 buf[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) 0xe0, 0x06, 0x66, 0x33, 0x65,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) 0x01, 0x17, 0x06, 0xde};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) case CX23885_BOARD_TBS_6980:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) case CX23885_BOARD_TBS_6981:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) cx_set(GP0_IO, 0x00070007);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) usleep_range(1000, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) cx_clear(GP0_IO, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) usleep_range(1000, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) for (i = 0; i < 9 * 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) cx_clear(GP0_IO, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) usleep_range(1000, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) cx_set(GP0_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) usleep_range(1000, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) cx_set(GP0_IO, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) int cx23885_tuner_callback(void *priv, int component, int command, int arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) struct cx23885_tsport *port = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) struct cx23885_dev *dev = port->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) u32 bitmask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) if (command != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) pr_err("%s(): Unknown command 0x%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) __func__, command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) case CX23885_BOARD_HAUPPAUGE_HVR1400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) case CX23885_BOARD_HAUPPAUGE_HVR1500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) /* Tuner Reset Command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) bitmask = 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) /* Two identical tuners on two different i2c buses,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) * we need to reset the correct gpio. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) if (port->nr == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) bitmask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) else if (port->nr == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) bitmask = 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) /* Tuner Reset Command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) bitmask = 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) altera_ci_tuner_reset(dev, port->nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) case CX23885_BOARD_AVERMEDIA_HC81R:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) /* XC3028L Reset Command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) bitmask = 1 << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) if (bitmask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) /* Drive the tuner into reset and back out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) cx_clear(GP0_IO, bitmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) mdelay(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) cx_set(GP0_IO, bitmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) void cx23885_gpio_setup(struct cx23885_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) case CX23885_BOARD_HAUPPAUGE_HVR1250:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) /* GPIO-0 cx24227 demodulator reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) case CX23885_BOARD_HAUPPAUGE_HVR1500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) /* GPIO-0 cx24227 demodulator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) /* GPIO-2 xc3028 tuner */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) /* Put the parts into reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) cx_set(GP0_IO, 0x00050000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) cx_clear(GP0_IO, 0x00000005);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) /* Bring the parts out of reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) cx_set(GP0_IO, 0x00050005);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) /* GPIO-0 cx24227 demodulator reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) /* GPIO-2 xc5000 tuner reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) case CX23885_BOARD_HAUPPAUGE_HVR1800:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) /* GPIO-0 656_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) /* GPIO-1 656_D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) /* GPIO-2 8295A Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) /* GPIO-3-10 cx23417 data0-7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) /* GPIO-11-14 cx23417 addr0-3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) /* GPIO-15-18 cx23417 READY, CS, RD, WR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) /* GPIO-19 IR_RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) /* CX23417 GPIO's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) /* EIO15 Zilog Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) /* EIO14 S5H1409/CX24227 Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) /* Put the demod into reset and protect the eeprom */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) /* Bring the demod and blaster out of reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) mc417_gpio_set(dev, GPIO_15 | GPIO_14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) /* Force the TDA8295A into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) cx23885_gpio_enable(dev, GPIO_2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) cx23885_gpio_set(dev, GPIO_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) cx23885_gpio_clear(dev, GPIO_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) cx23885_gpio_set(dev, GPIO_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) case CX23885_BOARD_HAUPPAUGE_HVR1200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) /* GPIO-0 tda10048 demodulator reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) /* GPIO-2 tda18271 tuner reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) /* Put the parts into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) cx_set(GP0_IO, 0x00050000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) cx_clear(GP0_IO, 0x00000005);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) cx_set(GP0_IO, 0x00050005);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) case CX23885_BOARD_HAUPPAUGE_HVR1700:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) /* GPIO-0 TDA10048 demodulator reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) /* GPIO-2 TDA8295A Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) /* GPIO-3-10 cx23417 data0-7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) /* GPIO-11-14 cx23417 addr0-3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) /* GPIO-15-18 cx23417 READY, CS, RD, WR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) /* The following GPIO's are on the interna AVCore (cx25840) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) /* GPIO-19 IR_RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) /* GPIO-20 IR_TX 416/DVBT Select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) /* GPIO-21 IIS DAT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) /* GPIO-22 IIS WCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) /* GPIO-23 IIS BCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) /* Put the parts into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) cx_set(GP0_IO, 0x00050000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) cx_clear(GP0_IO, 0x00000005);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) cx_set(GP0_IO, 0x00050005);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) case CX23885_BOARD_HAUPPAUGE_HVR1400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) /* GPIO-0 Dibcom7000p demodulator reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) /* GPIO-2 xc3028L tuner reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) /* GPIO-13 LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) /* Put the parts into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) cx_set(GP0_IO, 0x00050000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) cx_clear(GP0_IO, 0x00000005);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) cx_set(GP0_IO, 0x00050005);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) /* GPIO-0 xc5000 tuner reset i2c bus 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) /* GPIO-1 s5h1409 demod reset i2c bus 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) /* GPIO-2 xc5000 tuner reset i2c bus 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) /* GPIO-3 s5h1409 demod reset i2c bus 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) /* Put the parts into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) cx_set(GP0_IO, 0x000f0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) cx_clear(GP0_IO, 0x0000000f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) cx_set(GP0_IO, 0x000f000f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) /* GPIO-0 portb xc3028 reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) /* GPIO-1 portb zl10353 reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) /* GPIO-2 portc xc3028 reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) /* GPIO-3 portc zl10353 reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) /* Put the parts into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) cx_set(GP0_IO, 0x000f0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) cx_clear(GP0_IO, 0x0000000f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) cx_set(GP0_IO, 0x000f000f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) /* GPIO-2 xc3028 tuner reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) /* The following GPIO's are on the internal AVCore (cx25840) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) /* GPIO-? zl10353 demod reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) /* Put the parts into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) cx_set(GP0_IO, 0x00040000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) cx_clear(GP0_IO, 0x00000004);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) cx_set(GP0_IO, 0x00040004);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) case CX23885_BOARD_TBS_6920:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) case CX23885_BOARD_TBS_6980:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) case CX23885_BOARD_TBS_6981:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) case CX23885_BOARD_PROF_8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) cx_write(MC417_CTL, 0x00000036);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) cx_write(MC417_OEN, 0x00001000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) cx_set(MC417_RWD, 0x00000002);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) msleep(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) cx_clear(MC417_RWD, 0x00000800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) msleep(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) cx_set(MC417_RWD, 0x00000800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) msleep(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) /* GPIO-0 INTA from CiMax1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) GPIO-1 INTB from CiMax2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) GPIO-2 reset chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) GPIO-3 to GPIO-10 data/addr for CA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) GPIO-11 ~CS0 to CiMax1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) GPIO-12 ~CS1 to CiMax2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) GPIO-13 ADL0 load LSB addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) GPIO-14 ADL1 load MSB addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) GPIO-15 ~RDY from CiMax
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) GPIO-17 ~RD to CiMax
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) GPIO-18 ~WR to CiMax
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) cx_set(GP0_IO, 0x00040000); /* GPIO as out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) cx_clear(GP0_IO, 0x00030004);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) msleep(100);/* reset delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) /* GPIO-15 IN as ~ACK, rest as OUT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) cx_write(MC417_OEN, 0x00001000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) cx_write(MC417_RWD, 0x0000c300);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) /* enable irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) case CX23885_BOARD_HAUPPAUGE_HVR1270:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) case CX23885_BOARD_HAUPPAUGE_HVR1275:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) case CX23885_BOARD_HAUPPAUGE_HVR1255:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) case CX23885_BOARD_HAUPPAUGE_HVR1210:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) /* GPIO-6 I2C Gate which can isolate the demod from the bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) /* GPIO-9 Demod reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) /* Put the parts into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) cx23885_gpio_clear(dev, GPIO_9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) cx23885_gpio_set(dev, GPIO_9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) case CX23885_BOARD_MYGICA_X8506:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) case CX23885_BOARD_MAGICPRO_PROHDTVE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) case CX23885_BOARD_MYGICA_X8507:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) /* GPIO-0 (0)Analog / (1)Digital TV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) /* GPIO-1 reset XC5000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) /* GPIO-2 demod reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) case CX23885_BOARD_MYGICA_X8558PRO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) /* GPIO-0 reset first ATBM8830 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) /* GPIO-1 reset second ATBM8830 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) case CX23885_BOARD_HAUPPAUGE_HVR1850:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) case CX23885_BOARD_HAUPPAUGE_HVR1290:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) /* GPIO-0 656_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) /* GPIO-1 656_D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) /* GPIO-2 Wake# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) /* GPIO-3-10 cx23417 data0-7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) /* GPIO-11-14 cx23417 addr0-3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) /* GPIO-15-18 cx23417 READY, CS, RD, WR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) /* GPIO-19 IR_RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) /* GPIO-20 C_IR_TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) /* GPIO-21 I2S DAT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) /* GPIO-22 I2S WCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) /* GPIO-23 I2S BCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) /* ALT GPIO: EXP GPIO LATCH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) /* CX23417 GPIO's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) /* GPIO-14 S5H1411/CX24228 Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) /* GPIO-13 EEPROM write protect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) /* Put the demod into reset and protect the eeprom */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) /* Bring the demod out of reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) mc417_gpio_set(dev, GPIO_14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) /* CX24228 GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) /* Connected to IF / Mux */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) /* GPIO-0 ~INT in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) GPIO-1 TMS out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) GPIO-2 ~reset chips out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) GPIO-3 to GPIO-10 data/addr for CA in/out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) GPIO-11 ~CS out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) GPIO-12 ADDR out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) GPIO-13 ~WR out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) GPIO-14 ~RD out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) GPIO-15 ~RDY in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) GPIO-16 TCK out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) GPIO-17 TDO in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) GPIO-18 TDI out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) /* GPIO-0 as INT, reset & TMS low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) cx_clear(GP0_IO, 0x00010006);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) msleep(100);/* reset delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) cx_set(GP0_IO, 0x00000004); /* reset high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) cx_write(MC417_OEN, 0x00005000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) /* ~RD, ~WR high; ADDR low; ~CS high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) cx_write(MC417_RWD, 0x00000d00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) /* enable irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) case CX23885_BOARD_HAUPPAUGE_HVR4400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) case CX23885_BOARD_HAUPPAUGE_STARBURST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) /* GPIO-8 tda10071 demod reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) /* Put the parts into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) case CX23885_BOARD_AVERMEDIA_HC81R:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) cx_clear(MC417_CTL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) /* GPIO-0,1,2 setup direction as output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) cx_set(GP0_IO, 0x00070000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) /* AF9013 demod reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) cx_set(GP0_IO, 0x00010001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) cx_clear(GP0_IO, 0x00010001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) cx_set(GP0_IO, 0x00010001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) /* demod tune? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) cx_clear(GP0_IO, 0x00030003);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) cx_set(GP0_IO, 0x00020002);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) cx_set(GP0_IO, 0x00010001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) cx_clear(GP0_IO, 0x00020002);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) /* XC3028L tuner reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) cx_set(GP0_IO, 0x00040004);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) cx_clear(GP0_IO, 0x00040004);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) cx_set(GP0_IO, 0x00040004);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) msleep(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) case CX23885_BOARD_DVBSKY_T9580:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) case CX23885_BOARD_DVBSKY_S952:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) case CX23885_BOARD_DVBSKY_T982:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) /* enable GPIO3-18 pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) cx_write(MC417_CTL, 0x00000037);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) case CX23885_BOARD_DVBSKY_T980C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) case CX23885_BOARD_DVBSKY_S950C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) case CX23885_BOARD_TT_CT2_4500_CI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) * GPIO-0 INTA from CiMax, input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) * GPIO-1 reset CiMax, output, high active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) * GPIO-2 reset demod, output, low active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) * GPIO-3 to GPIO-10 data/addr for CAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) * GPIO-11 ~CS0 to CiMax1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) * GPIO-12 ~CS1 to CiMax2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) * GPIO-13 ADL0 load LSB addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) * GPIO-14 ADL1 load MSB addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) * GPIO-15 ~RDY from CiMax
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) * GPIO-17 ~RD to CiMax
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) * GPIO-18 ~WR to CiMax
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) msleep(100); /* reset delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) cx_clear(GP0_IO, 0x00010002);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) /* GPIO-15 IN as ~ACK, rest as OUT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) cx_write(MC417_OEN, 0x00001000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) cx_write(MC417_RWD, 0x0000c300);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) /* enable irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) case CX23885_BOARD_DVBSKY_S950:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) cx23885_gpio_enable(dev, GPIO_2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) cx23885_gpio_clear(dev, GPIO_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) cx23885_gpio_set(dev, GPIO_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) case CX23885_BOARD_HAUPPAUGE_HVR5525:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) case CX23885_BOARD_HAUPPAUGE_STARBURST2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) * HVR5525 GPIO Details:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) * GPIO-00 IR_WIDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) * GPIO-02 wake#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) * GPIO-03 VAUX Pres.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) * GPIO-07 PROG#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) * GPIO-08 SAT_RESN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) * GPIO-09 TER_RESN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) * GPIO-10 B2_SENSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) * GPIO-11 B1_SENSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) * GPIO-15 IR_LED_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) * GPIO-19 IR_NARROW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) * GPIO-20 Blauster1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) * ALTGPIO VAUX_SWITCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) * AUX_PLL_CLK : Blaster2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) /* Put the parts into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) case CX23885_BOARD_VIEWCAST_260E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) case CX23885_BOARD_VIEWCAST_460E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) /* For documentation purposes, it's worth noting that this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) * card does not have any GPIO's connected to subcomponents.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) * GPIO-08 TER1_RESN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) * GPIO-09 TER2_RESN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) /* Put the parts into reset and back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) int cx23885_ir_init(struct cx23885_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) .pin = CX23885_PIN_IR_RX_GPIO19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) .function = CX23885_PAD_IR_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) .value = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) .strength = CX25840_PIN_DRIVE_MEDIUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) .flags = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) .pin = CX23885_PIN_IR_TX_GPIO20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) .function = CX23885_PAD_IR_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) .value = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) .strength = CX25840_PIN_DRIVE_MEDIUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) .pin = CX23885_PIN_IR_RX_GPIO19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) .function = CX23885_PAD_IR_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) .value = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) .strength = CX25840_PIN_DRIVE_MEDIUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) struct v4l2_subdev_ir_parameters params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) case CX23885_BOARD_HAUPPAUGE_HVR1500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) case CX23885_BOARD_HAUPPAUGE_HVR1800:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) case CX23885_BOARD_HAUPPAUGE_HVR1200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) case CX23885_BOARD_HAUPPAUGE_HVR1400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) case CX23885_BOARD_HAUPPAUGE_HVR1275:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) case CX23885_BOARD_HAUPPAUGE_HVR1255:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) case CX23885_BOARD_HAUPPAUGE_HVR1210:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) /* FIXME: Implement me */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) case CX23885_BOARD_HAUPPAUGE_HVR1270:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) ret = cx23888_ir_probe(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) ir_rx_pin_cfg_count, ir_rx_pin_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) case CX23885_BOARD_HAUPPAUGE_HVR1850:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) case CX23885_BOARD_HAUPPAUGE_HVR1290:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) ret = cx23888_ir_probe(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) * For these boards we need to invert the Tx output via the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) * IR controller to have the LED off while idle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) params.enable = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) params.shutdown = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) params.invert_level = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) params.shutdown = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) case CX23885_BOARD_TEVII_S470:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) case CX23885_BOARD_MYGICA_X8507:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) case CX23885_BOARD_TBS_6980:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) case CX23885_BOARD_TBS_6981:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) case CX23885_BOARD_DVBSKY_T9580:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) case CX23885_BOARD_DVBSKY_T980C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) case CX23885_BOARD_DVBSKY_S950C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) case CX23885_BOARD_TT_CT2_4500_CI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) case CX23885_BOARD_DVBSKY_S950:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) case CX23885_BOARD_DVBSKY_S952:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) case CX23885_BOARD_DVBSKY_T982:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) if (!enable_885_ir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) if (dev->sd_ir == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) ir_rx_pin_cfg_count, ir_rx_pin_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) case CX23885_BOARD_HAUPPAUGE_HVR1250:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) if (!enable_885_ir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) if (dev->sd_ir == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) request_module("ir-kbd-i2c");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) void cx23885_ir_fini(struct cx23885_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) case CX23885_BOARD_HAUPPAUGE_HVR1270:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) case CX23885_BOARD_HAUPPAUGE_HVR1850:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) case CX23885_BOARD_HAUPPAUGE_HVR1290:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) cx23885_irq_remove(dev, PCI_MSK_IR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) cx23888_ir_remove(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) dev->sd_ir = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) case CX23885_BOARD_TEVII_S470:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) case CX23885_BOARD_HAUPPAUGE_HVR1250:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) case CX23885_BOARD_MYGICA_X8507:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) case CX23885_BOARD_TBS_6980:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) case CX23885_BOARD_TBS_6981:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) case CX23885_BOARD_DVBSKY_T9580:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) case CX23885_BOARD_DVBSKY_T980C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) case CX23885_BOARD_DVBSKY_S950C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) case CX23885_BOARD_TT_CT2_4500_CI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) case CX23885_BOARD_DVBSKY_S950:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) case CX23885_BOARD_DVBSKY_S952:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) case CX23885_BOARD_DVBSKY_T982:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) /* sd_ir is a duplicate pointer to the AV Core, just clear it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) dev->sd_ir = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) int data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) int tdo = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) struct cx23885_dev *dev = (struct cx23885_dev *)device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) /*TMS*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) data = ((cx_read(GP0_IO)) & (~0x00000002));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) data |= (tms ? 0x00020002 : 0x00020000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) cx_write(GP0_IO, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) /*TDI*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) data = ((cx_read(MC417_RWD)) & (~0x0000a000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) data |= (tdi ? 0x00008000 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) cx_write(MC417_RWD, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) if (read_tdo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) cx_write(MC417_RWD, data | 0x00002000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) /*TCK*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) cx_write(MC417_RWD, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) return tdo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) case CX23885_BOARD_HAUPPAUGE_HVR1270:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) case CX23885_BOARD_HAUPPAUGE_HVR1850:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) case CX23885_BOARD_HAUPPAUGE_HVR1290:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) if (dev->sd_ir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) cx23885_irq_add_enable(dev, PCI_MSK_IR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) case CX23885_BOARD_TEVII_S470:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) case CX23885_BOARD_HAUPPAUGE_HVR1250:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) case CX23885_BOARD_MYGICA_X8507:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) case CX23885_BOARD_TBS_6980:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) case CX23885_BOARD_TBS_6981:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) case CX23885_BOARD_DVBSKY_T9580:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) case CX23885_BOARD_DVBSKY_T980C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) case CX23885_BOARD_DVBSKY_S950C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) case CX23885_BOARD_TT_CT2_4500_CI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) case CX23885_BOARD_DVBSKY_S950:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) case CX23885_BOARD_DVBSKY_S952:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) case CX23885_BOARD_DVBSKY_T982:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) if (dev->sd_ir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) void cx23885_card_setup(struct cx23885_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) struct cx23885_tsport *ts1 = &dev->ts1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) struct cx23885_tsport *ts2 = &dev->ts2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) static u8 eeprom[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) if (dev->i2c_bus[0].i2c_rc == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) tveeprom_read(&dev->i2c_bus[0].i2c_client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) eeprom, sizeof(eeprom));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) case CX23885_BOARD_HAUPPAUGE_HVR1250:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) if (dev->i2c_bus[0].i2c_rc == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) if (eeprom[0x80] != 0x84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) hauppauge_eeprom(dev, eeprom+0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) hauppauge_eeprom(dev, eeprom+0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) case CX23885_BOARD_HAUPPAUGE_HVR1500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) case CX23885_BOARD_HAUPPAUGE_HVR1400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) if (dev->i2c_bus[0].i2c_rc == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) hauppauge_eeprom(dev, eeprom+0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) case CX23885_BOARD_HAUPPAUGE_HVR1800:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) case CX23885_BOARD_HAUPPAUGE_HVR1200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) case CX23885_BOARD_HAUPPAUGE_HVR1700:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) case CX23885_BOARD_HAUPPAUGE_HVR1270:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) case CX23885_BOARD_HAUPPAUGE_HVR1275:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) case CX23885_BOARD_HAUPPAUGE_HVR1255:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) case CX23885_BOARD_HAUPPAUGE_HVR1210:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) case CX23885_BOARD_HAUPPAUGE_HVR1850:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) case CX23885_BOARD_HAUPPAUGE_HVR1290:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) case CX23885_BOARD_HAUPPAUGE_HVR4400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) case CX23885_BOARD_HAUPPAUGE_STARBURST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) case CX23885_BOARD_HAUPPAUGE_HVR5525:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) case CX23885_BOARD_HAUPPAUGE_STARBURST2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) if (dev->i2c_bus[0].i2c_rc == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) hauppauge_eeprom(dev, eeprom+0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) case CX23885_BOARD_VIEWCAST_260E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) case CX23885_BOARD_VIEWCAST_460E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) tveeprom_read(&dev->i2c_bus[1].i2c_client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) eeprom, sizeof(eeprom));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) if (dev->i2c_bus[0].i2c_rc == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) viewcast_eeprom(dev, eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) case CX23885_BOARD_AVERMEDIA_HC81R:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) /* Defaults for VID B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) ts1->gen_ctrl_val = 0x4; /* Parallel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) /* Defaults for VID C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) ts2->gen_ctrl_val = 0x10e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) case CX23885_BOARD_HAUPPAUGE_HVR1850:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) case CX23885_BOARD_HAUPPAUGE_HVR1800:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) /* Defaults for VID B - Analog encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) ts1->gen_ctrl_val = 0x10e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) /* APB_TSVALERR_POL (active low)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) ts1->vld_misc_val = 0x2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) cx_write(0x130184, 0xc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) /* Defaults for VID C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) case CX23885_BOARD_TBS_6920:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) ts1->gen_ctrl_val = 0x4; /* Parallel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) case CX23885_BOARD_TEVII_S470:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) case CX23885_BOARD_TEVII_S471:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) case CX23885_BOARD_DVBWORLD_2005:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) case CX23885_BOARD_PROF_8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) case CX23885_BOARD_DVBSKY_T980C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) case CX23885_BOARD_DVBSKY_S950C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) case CX23885_BOARD_TT_CT2_4500_CI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) case CX23885_BOARD_DVBSKY_S950:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) ts1->gen_ctrl_val = 0x5; /* Parallel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) case CX23885_BOARD_TBS_6980:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) case CX23885_BOARD_TBS_6981:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) tbs_card_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) case CX23885_BOARD_MYGICA_X8506:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) case CX23885_BOARD_MAGICPRO_PROHDTVE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) case CX23885_BOARD_MYGICA_X8507:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) ts1->gen_ctrl_val = 0x5; /* Parallel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) case CX23885_BOARD_MYGICA_X8558PRO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) ts1->gen_ctrl_val = 0x5; /* Parallel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) case CX23885_BOARD_HAUPPAUGE_HVR4400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) case CX23885_BOARD_HAUPPAUGE_STARBURST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) case CX23885_BOARD_DVBSKY_T9580:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) case CX23885_BOARD_DVBSKY_T982:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) ts1->gen_ctrl_val = 0x5; /* Parallel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) ts2->gen_ctrl_val = 0x8; /* Serial bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) case CX23885_BOARD_DVBSKY_S952:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) ts1->gen_ctrl_val = 0x5; /* Parallel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) ts2->gen_ctrl_val = 0xe; /* Serial bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) case CX23885_BOARD_HAUPPAUGE_HVR5525:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) case CX23885_BOARD_HAUPPAUGE_STARBURST2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) ts1->gen_ctrl_val = 0x5; /* Parallel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) case CX23885_BOARD_HAUPPAUGE_HVR1250:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) case CX23885_BOARD_HAUPPAUGE_HVR1500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) case CX23885_BOARD_HAUPPAUGE_HVR1200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) case CX23885_BOARD_HAUPPAUGE_HVR1700:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) case CX23885_BOARD_HAUPPAUGE_HVR1400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) case CX23885_BOARD_HAUPPAUGE_HVR1270:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) case CX23885_BOARD_HAUPPAUGE_HVR1275:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) case CX23885_BOARD_HAUPPAUGE_HVR1255:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) case CX23885_BOARD_HAUPPAUGE_HVR1210:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) case CX23885_BOARD_HAUPPAUGE_HVR1290:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) /* Certain boards support analog, or require the avcore to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) * loaded, ensure this happens.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) case CX23885_BOARD_TEVII_S470:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) /* Currently only enabled for the integrated IR controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) if (!enable_885_ir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) case CX23885_BOARD_HAUPPAUGE_HVR1250:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) case CX23885_BOARD_HAUPPAUGE_HVR1800:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) case CX23885_BOARD_HAUPPAUGE_HVR1700:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) case CX23885_BOARD_HAUPPAUGE_HVR1255:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) case CX23885_BOARD_HAUPPAUGE_HVR1270:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) case CX23885_BOARD_HAUPPAUGE_HVR1850:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) case CX23885_BOARD_HAUPPAUGE_HVR5525:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) case CX23885_BOARD_MYGICA_X8506:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) case CX23885_BOARD_MAGICPRO_PROHDTVE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) case CX23885_BOARD_HAUPPAUGE_HVR1290:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) case CX23885_BOARD_HAUPPAUGE_HVR1500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) case CX23885_BOARD_MPX885:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) case CX23885_BOARD_MYGICA_X8507:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) case CX23885_BOARD_AVERMEDIA_HC81R:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) case CX23885_BOARD_TBS_6980:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) case CX23885_BOARD_TBS_6981:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) case CX23885_BOARD_DVBSKY_T9580:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) case CX23885_BOARD_DVBSKY_T980C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) case CX23885_BOARD_DVBSKY_S950C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) case CX23885_BOARD_TT_CT2_4500_CI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) case CX23885_BOARD_DVBSKY_S950:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) case CX23885_BOARD_DVBSKY_S952:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) case CX23885_BOARD_DVBSKY_T982:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) case CX23885_BOARD_VIEWCAST_260E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) case CX23885_BOARD_VIEWCAST_460E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) case CX23885_BOARD_AVERMEDIA_CE310B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) &dev->i2c_bus[2].i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) "cx25840", 0x88 >> 1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) if (dev->sd_cx25840) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) /* set host data for clk_freq configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) v4l2_set_subdev_hostdata(dev->sd_cx25840,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) &dev->clk_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) case CX23885_BOARD_VIEWCAST_260E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) v4l2_i2c_new_subdev(&dev->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) &dev->i2c_bus[0].i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) "cs3308", 0x82 >> 1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) case CX23885_BOARD_VIEWCAST_460E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) /* This cs3308 controls the audio from the breakout cable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) v4l2_i2c_new_subdev(&dev->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) &dev->i2c_bus[0].i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) "cs3308", 0x80 >> 1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) /* This cs3308 controls the audio from the onboard header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) v4l2_i2c_new_subdev(&dev->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) &dev->i2c_bus[0].i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) "cs3308", 0x82 >> 1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) /* AUX-PLL 27MHz CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) switch (dev->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) netup_initialize(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) const struct firmware *fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) const char *filename = "dvb-netup-altera-01.fw";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) char *action = "configure";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) static struct netup_card_info cinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) struct altera_config netup_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) .dev = dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) .action = action,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) .jtag_io = netup_jtag_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) netup_initialize(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) if (netup_card_rev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) cinfo.rev = netup_card_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) switch (cinfo.rev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) case 0x4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) filename = "dvb-netup-altera-04.fw";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) filename = "dvb-netup-altera-01.fw";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) pr_info("NetUP card rev=0x%x fw_filename=%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) cinfo.rev, filename);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) ret = request_firmware(&fw, filename, &dev->pci->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) pr_err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) filename);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) altera_init(&netup_config, fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) release_firmware(fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
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