^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for the Conexant CX23885/7/8 PCIe bridge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * AV device support routines - non-input, non-vl42_subdev routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2010 Andy Walls <awalls@md.metrocast.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "cx23885.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "cx23885-av.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "cx23885-video.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) void cx23885_av_work_handler(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct cx23885_dev *dev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) container_of(work, struct cx23885_dev, cx25840_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) bool handled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) v4l2_subdev_call(dev->sd_cx25840, core, interrupt_service_routine,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) PCI_MSK_AV_CORE, &handled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Getting here with the interrupt not handled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) then probbaly flatiron does have pending interrupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) if (!handled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* clear left and right adc channel interrupt request flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) cx23885_flatiron_write(dev, 0x1f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) cx23885_flatiron_read(dev, 0x1f) | 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) cx23885_flatiron_write(dev, 0x23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) cx23885_flatiron_read(dev, 0x23) | 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) cx23885_irq_enable(dev, PCI_MSK_AV_CORE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }