^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Support for CX23885 analog audio capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (c) 2008 Mijhail Moreyra <mijhail.moreyra@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Adapted from cx88-alsa.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * (c) 2009 Steven Toth <stoth@kernellabs.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "cx23885.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "cx23885-reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <sound/pcm_params.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <sound/control.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <sound/initval.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <sound/tlv.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define AUDIO_SRAM_CHANNEL SRAM_CH07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define dprintk(level, fmt, arg...) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) if (audio_debug + 1 > level) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) printk(KERN_DEBUG pr_fmt("%s: alsa: " fmt), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) chip->dev->name, ##arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) } while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Module global static vars
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static unsigned int disable_analog_audio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) module_param(disable_analog_audio, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MODULE_PARM_DESC(disable_analog_audio, "disable analog audio ALSA driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static unsigned int audio_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) module_param(audio_debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MODULE_PARM_DESC(audio_debug, "enable debug messages [analog audio]");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) Board specific functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* Constants taken from cx88-reg.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define AUD_INT_DN_RISCI1 (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define AUD_INT_UP_RISCI1 (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define AUD_INT_RDS_DN_RISCI1 (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define AUD_INT_DN_RISCI2 (1 << 4) /* yes, 3 is skipped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define AUD_INT_UP_RISCI2 (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define AUD_INT_RDS_DN_RISCI2 (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define AUD_INT_DN_SYNC (1 << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define AUD_INT_UP_SYNC (1 << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define AUD_INT_RDS_DN_SYNC (1 << 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define AUD_INT_OPC_ERR (1 << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define AUD_INT_BER_IRQ (1 << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define AUD_INT_MCHG_IRQ (1 << 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define GP_COUNT_CONTROL_RESET 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int cx23885_alsa_dma_init(struct cx23885_audio_dev *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned long nr_pages)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct cx23885_audio_buffer *buf = chip->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct page *pg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) buf->vaddr = vmalloc_32(nr_pages << PAGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (NULL == buf->vaddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) dprintk(1, "vmalloc_32(%lu pages) failed\n", nr_pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) dprintk(1, "vmalloc is at addr %p, size=%lu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) buf->vaddr, nr_pages << PAGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) memset(buf->vaddr, 0, nr_pages << PAGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) buf->nr_pages = nr_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) buf->sglist = vzalloc(array_size(sizeof(*buf->sglist), buf->nr_pages));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (NULL == buf->sglist)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) goto vzalloc_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) sg_init_table(buf->sglist, buf->nr_pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) for (i = 0; i < buf->nr_pages; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pg = vmalloc_to_page(buf->vaddr + i * PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (NULL == pg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) goto vmalloc_to_page_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) sg_set_page(&buf->sglist[i], pg, PAGE_SIZE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) vmalloc_to_page_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) vfree(buf->sglist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) buf->sglist = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) vzalloc_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) vfree(buf->vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) buf->vaddr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static int cx23885_alsa_dma_map(struct cx23885_audio_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct cx23885_audio_buffer *buf = dev->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) buf->sglen = dma_map_sg(&dev->pci->dev, buf->sglist,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) buf->nr_pages, DMA_FROM_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (0 == buf->sglen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) pr_warn("%s: cx23885_alsa_map_sg failed\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int cx23885_alsa_dma_unmap(struct cx23885_audio_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct cx23885_audio_buffer *buf = dev->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (!buf->sglen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) dma_unmap_sg(&dev->pci->dev, buf->sglist, buf->nr_pages, DMA_FROM_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) buf->sglen = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int cx23885_alsa_dma_free(struct cx23885_audio_buffer *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) vfree(buf->sglist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) buf->sglist = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) vfree(buf->vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) buf->vaddr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * BOARD Specific: Sets audio DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int cx23885_start_audio_dma(struct cx23885_audio_dev *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct cx23885_audio_buffer *buf = chip->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct cx23885_dev *dev = chip->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct sram_channel *audio_ch =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) &dev->sram_channels[AUDIO_SRAM_CHANNEL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) dprintk(1, "%s()\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* Make sure RISC/FIFO are off before changing FIFO/RISC settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) cx_clear(AUD_INT_DMA_CTL, 0x11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* setup fifo + format - out channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) cx23885_sram_channel_setup(chip->dev, audio_ch, buf->bpl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) buf->risc.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* sets bpl size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) cx_write(AUD_INT_A_LNGTH, buf->bpl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* This is required to get good audio (1 seems to be ok) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) cx_write(AUD_INT_A_MODE, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* reset counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) cx_write(AUD_INT_A_GPCNT_CTL, GP_COUNT_CONTROL_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) atomic_set(&chip->count, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) dprintk(1, "Start audio DMA, %d B/line, %d lines/FIFO, %d periods, %d byte buffer\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) buf->bpl, cx_read(audio_ch->cmds_start+12)>>1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) chip->num_periods, buf->bpl * chip->num_periods);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* Enables corresponding bits at AUD_INT_STAT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) cx_write(AUDIO_INT_INT_MSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) AUD_INT_DN_RISCI1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* Clean any pending interrupt bits already set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) cx_write(AUDIO_INT_INT_STAT, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* enable audio irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) cx_set(PCI_INT_MSK, chip->dev->pci_irqmask | PCI_MSK_AUD_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /* start dma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) cx_set(DEV_CNTRL2, (1<<5)); /* Enables Risc Processor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) cx_set(AUD_INT_DMA_CTL, 0x11); /* audio downstream FIFO and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) RISC enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (audio_debug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) cx23885_sram_channel_dump(chip->dev, audio_ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * BOARD Specific: Resets audio DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static int cx23885_stop_audio_dma(struct cx23885_audio_dev *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct cx23885_dev *dev = chip->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) dprintk(1, "Stopping audio DMA\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* stop dma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) cx_clear(AUD_INT_DMA_CTL, 0x11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* disable irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) cx_clear(PCI_INT_MSK, PCI_MSK_AUD_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) cx_clear(AUDIO_INT_INT_MSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) AUD_INT_DN_RISCI1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (audio_debug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) cx23885_sram_channel_dump(chip->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) &dev->sram_channels[AUDIO_SRAM_CHANNEL]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * BOARD Specific: Handles audio IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct cx23885_audio_dev *chip = dev->audio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (0 == (status & mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) cx_write(AUDIO_INT_INT_STAT, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* risc op code error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (status & AUD_INT_OPC_ERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) pr_warn("%s/1: Audio risc op code error\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) cx_clear(AUD_INT_DMA_CTL, 0x11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) cx23885_sram_channel_dump(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) &dev->sram_channels[AUDIO_SRAM_CHANNEL]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (status & AUD_INT_DN_SYNC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) dprintk(1, "Downstream sync error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) cx_write(AUD_INT_A_GPCNT_CTL, GP_COUNT_CONTROL_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /* risc1 downstream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (status & AUD_INT_DN_RISCI1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) atomic_set(&chip->count, cx_read(AUD_INT_A_GPCNT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) snd_pcm_period_elapsed(chip->substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* FIXME: Any other status should deserve a special handling? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static int dsp_buffer_free(struct cx23885_audio_dev *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) struct cx23885_riscmem *risc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) BUG_ON(!chip->dma_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) dprintk(2, "Freeing buffer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) cx23885_alsa_dma_unmap(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) cx23885_alsa_dma_free(chip->buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) risc = &chip->buf->risc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) pci_free_consistent(chip->pci, risc->size, risc->cpu, risc->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) kfree(chip->buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) chip->buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) chip->dma_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ALSA PCM Interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * Digital hardware definition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) #define DEFAULT_FIFO_SIZE 4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static const struct snd_pcm_hardware snd_cx23885_digital_hw = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .info = SNDRV_PCM_INFO_MMAP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) SNDRV_PCM_INFO_INTERLEAVED |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) SNDRV_PCM_INFO_BLOCK_TRANSFER |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) SNDRV_PCM_INFO_MMAP_VALID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .formats = SNDRV_PCM_FMTBIT_S16_LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .rates = SNDRV_PCM_RATE_48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .rate_min = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .rate_max = 48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .channels_min = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /* Analog audio output will be full of clicks and pops if there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) are not exactly four lines in the SRAM FIFO buffer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .period_bytes_min = DEFAULT_FIFO_SIZE/4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .period_bytes_max = DEFAULT_FIFO_SIZE/4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) .periods_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .periods_max = 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .buffer_bytes_max = (1024*1024),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * audio pcm capture open callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static int snd_cx23885_pcm_open(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) struct cx23885_audio_dev *chip = snd_pcm_substream_chip(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (!chip) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) pr_err("BUG: cx23885 can't find device struct. Can't proceed with open\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) err = snd_pcm_hw_constraint_pow2(runtime, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) SNDRV_PCM_HW_PARAM_PERIODS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) goto _error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) chip->substream = substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) runtime->hw = snd_cx23885_digital_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (chip->dev->sram_channels[AUDIO_SRAM_CHANNEL].fifo_size !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) DEFAULT_FIFO_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) unsigned int bpl = chip->dev->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) sram_channels[AUDIO_SRAM_CHANNEL].fifo_size / 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) bpl &= ~7; /* must be multiple of 8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) runtime->hw.period_bytes_min = bpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) runtime->hw.period_bytes_max = bpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) _error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) dprintk(1, "Error opening PCM!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * audio close callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static int snd_cx23885_close(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * hw_params callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int snd_cx23885_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct snd_pcm_hw_params *hw_params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct cx23885_audio_dev *chip = snd_pcm_substream_chip(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct cx23885_audio_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (substream->runtime->dma_area) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) dsp_buffer_free(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) substream->runtime->dma_area = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) chip->period_size = params_period_bytes(hw_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) chip->num_periods = params_periods(hw_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) chip->dma_size = chip->period_size * params_periods(hw_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) BUG_ON(!chip->dma_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) BUG_ON(chip->num_periods & (chip->num_periods-1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) buf = kzalloc(sizeof(*buf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) if (NULL == buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) buf->bpl = chip->period_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) chip->buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) ret = cx23885_alsa_dma_init(chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) (PAGE_ALIGN(chip->dma_size) >> PAGE_SHIFT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ret = cx23885_alsa_dma_map(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) ret = cx23885_risc_databuffer(chip->pci, &buf->risc, buf->sglist,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) chip->period_size, chip->num_periods, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) /* Loop back to start of program */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP|RISC_IRQ1|RISC_CNT_INC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) substream->runtime->dma_area = chip->buf->vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) substream->runtime->dma_bytes = chip->dma_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) substream->runtime->dma_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) chip->buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * hw free callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static int snd_cx23885_hw_free(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) struct cx23885_audio_dev *chip = snd_pcm_substream_chip(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) if (substream->runtime->dma_area) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) dsp_buffer_free(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) substream->runtime->dma_area = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) * prepare callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static int snd_cx23885_prepare(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * trigger callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static int snd_cx23885_card_trigger(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) struct cx23885_audio_dev *chip = snd_pcm_substream_chip(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /* Local interrupts are already disabled by ALSA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) spin_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) case SNDRV_PCM_TRIGGER_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) err = cx23885_start_audio_dma(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) case SNDRV_PCM_TRIGGER_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) err = cx23885_stop_audio_dma(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) spin_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) * pointer callback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static snd_pcm_uframes_t snd_cx23885_pointer(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct cx23885_audio_dev *chip = snd_pcm_substream_chip(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) u16 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) count = atomic_read(&chip->count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return runtime->period_size * (count & (runtime->periods-1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * page callback (needed for mmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) static struct page *snd_cx23885_page(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) unsigned long offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) void *pageptr = substream->runtime->dma_area + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) return vmalloc_to_page(pageptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) * operators
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) static const struct snd_pcm_ops snd_cx23885_pcm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .open = snd_cx23885_pcm_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .close = snd_cx23885_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .hw_params = snd_cx23885_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .hw_free = snd_cx23885_hw_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .prepare = snd_cx23885_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .trigger = snd_cx23885_card_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .pointer = snd_cx23885_pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .page = snd_cx23885_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * create a PCM device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) static int snd_cx23885_pcm(struct cx23885_audio_dev *chip, int device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) struct snd_pcm *pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) pcm->private_data = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) strscpy(pcm->name, name, sizeof(pcm->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cx23885_pcm_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) Basic Flow for Sound Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * Alsa Constructor - Component probe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) struct cx23885_audio_dev *cx23885_audio_register(struct cx23885_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) struct cx23885_audio_dev *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (disable_analog_audio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (dev->sram_channels[AUDIO_SRAM_CHANNEL].cmds_start == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) pr_warn("%s(): Missing SRAM channel configuration for analog TV Audio\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) err = snd_card_new(&dev->pci->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) THIS_MODULE, sizeof(struct cx23885_audio_dev), &card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) goto error_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) chip = (struct cx23885_audio_dev *) card->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) chip->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) chip->pci = dev->pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) chip->card = card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) spin_lock_init(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) err = snd_cx23885_pcm(chip, 0, "CX23885 Digital");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) strscpy(card->driver, "CX23885", sizeof(card->driver));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) sprintf(card->shortname, "Conexant CX23885");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) sprintf(card->longname, "%s at %s", card->shortname, dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) err = snd_card_register(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) dprintk(0, "registered ALSA audio device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) return chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) snd_card_free(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) error_msg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) pr_err("%s(): Failed to register analog audio adapter\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) * ALSA destructor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) void cx23885_audio_unregister(struct cx23885_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) struct cx23885_audio_dev *chip = dev->audio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) snd_card_free(chip->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags