^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2005-2006 Micronas USA Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/ioctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) MODULE_DESCRIPTION("TW9906 I2C subdev driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct tw9906 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct v4l2_subdev sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct v4l2_ctrl_handler hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) v4l2_std_id norm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static inline struct tw9906 *to_state(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) return container_of(sd, struct tw9906, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static const u8 initial_registers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 0x02, 0x40, /* input 0, composite */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 0x03, 0xa2, /* correct digital format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 0x05, 0x81, /* or 0x01 for PAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 0x07, 0x02, /* window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 0x08, 0x14, /* window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 0x09, 0xf0, /* window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 0x0a, 0x10, /* window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 0x0b, 0xd0, /* window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 0x0d, 0x00, /* scaling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 0x0e, 0x11, /* scaling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 0x0f, 0x00, /* scaling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 0x10, 0x00, /* brightness */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 0x11, 0x60, /* contrast */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 0x12, 0x11, /* sharpness */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 0x13, 0x7e, /* U gain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 0x14, 0x7e, /* V gain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 0x15, 0x00, /* hue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 0x19, 0x57, /* vbi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 0x1a, 0x0f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 0x1b, 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 0x29, 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 0x55, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 0x6b, 0x26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 0x6c, 0x36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 0x6d, 0xf0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 0x6e, 0x41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 0x6f, 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 0xad, 0x70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 0x00, 0x00, /* Terminator (reg 0x00 is read-only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static int write_reg(struct v4l2_subdev *sd, u8 reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return i2c_smbus_write_byte_data(client, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int write_regs(struct v4l2_subdev *sd, const u8 *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) for (i = 0; regs[i] != 0x00; i += 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (write_reg(sd, regs[i], regs[i + 1]) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static int tw9906_s_video_routing(struct v4l2_subdev *sd, u32 input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) u32 output, u32 config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) write_reg(sd, 0x02, 0x40 | (input << 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static int tw9906_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct tw9906 *dec = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) bool is_60hz = norm & V4L2_STD_525_60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static const u8 config_60hz[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 0x05, 0x81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 0x07, 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 0x08, 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 0x09, 0xf0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static const u8 config_50hz[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) 0x05, 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) 0x07, 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) 0x08, 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 0x09, 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) write_regs(sd, is_60hz ? config_60hz : config_50hz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) dec->norm = norm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int tw9906_s_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct tw9906 *dec = container_of(ctrl->handler, struct tw9906, hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct v4l2_subdev *sd = &dec->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) case V4L2_CID_BRIGHTNESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) write_reg(sd, 0x10, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) case V4L2_CID_CONTRAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) write_reg(sd, 0x11, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) case V4L2_CID_HUE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) write_reg(sd, 0x15, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static int tw9906_log_status(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct tw9906 *dec = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) bool is_60hz = dec->norm & V4L2_STD_525_60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) v4l2_info(sd, "Standard: %d Hz\n", is_60hz ? 60 : 50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) v4l2_ctrl_subdev_log_status(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* --------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static const struct v4l2_ctrl_ops tw9906_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .s_ctrl = tw9906_s_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const struct v4l2_subdev_core_ops tw9906_core_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .log_status = tw9906_log_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static const struct v4l2_subdev_video_ops tw9906_video_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .s_std = tw9906_s_std,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .s_routing = tw9906_s_video_routing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const struct v4l2_subdev_ops tw9906_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .core = &tw9906_core_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .video = &tw9906_video_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static int tw9906_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct tw9906 *dec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct v4l2_ctrl_handler *hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* Check if the adapter supports the needed features */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) v4l_info(client, "chip found @ 0x%02x (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) client->addr << 1, client->adapter->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) dec = devm_kzalloc(&client->dev, sizeof(*dec), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (dec == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) sd = &dec->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) v4l2_i2c_subdev_init(sd, client, &tw9906_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) hdl = &dec->hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) v4l2_ctrl_handler_init(hdl, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) v4l2_ctrl_new_std(hdl, &tw9906_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) v4l2_ctrl_new_std(hdl, &tw9906_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) V4L2_CID_CONTRAST, 0, 255, 1, 0x60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) v4l2_ctrl_new_std(hdl, &tw9906_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) V4L2_CID_HUE, -128, 127, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) sd->ctrl_handler = hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (hdl->error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) int err = hdl->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) v4l2_ctrl_handler_free(hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /* Initialize tw9906 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) dec->norm = V4L2_STD_NTSC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (write_regs(sd, initial_registers) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) v4l2_err(client, "error initializing TW9906\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static int tw9906_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) v4l2_device_unregister_subdev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) v4l2_ctrl_handler_free(&to_state(sd)->hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static const struct i2c_device_id tw9906_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) { "tw9906", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MODULE_DEVICE_TABLE(i2c, tw9906_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static struct i2c_driver tw9906_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .name = "tw9906",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .probe = tw9906_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .remove = tw9906_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .id_table = tw9906_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) module_i2c_driver(tw9906_driver);