^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * tlv320aic23b - driver version 0.0.1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2006 Scott Alfter <salfter@ssai.us>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on wm8775 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2004 Ulf Eklund <ivtv at eklund.to>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2005 Hans Verkuil <hverkuil@xs4all.nl>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/ioctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MODULE_DESCRIPTION("tlv320aic23b driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MODULE_AUTHOR("Scott Alfter, Ulf Eklund, Hans Verkuil");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct tlv320aic23b_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct v4l2_subdev sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct v4l2_ctrl_handler hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static inline struct tlv320aic23b_state *to_state(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) return container_of(sd, struct tlv320aic23b_state, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return &container_of(ctrl->handler, struct tlv320aic23b_state, hdl)->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int tlv320aic23b_write(struct v4l2_subdev *sd, int reg, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if ((reg < 0 || reg > 9) && (reg != 15)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) v4l2_err(sd, "Invalid register R%d\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) for (i = 0; i < 3; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (i2c_smbus_write_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) (reg << 1) | (val >> 8), val & 0xff) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) v4l2_err(sd, "I2C: cannot write %03x to register R%d\n", val, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static int tlv320aic23b_s_clock_freq(struct v4l2_subdev *sd, u32 freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) switch (freq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) case 32000: /* set sample rate to 32 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) tlv320aic23b_write(sd, 8, 0x018);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) case 44100: /* set sample rate to 44.1 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) tlv320aic23b_write(sd, 8, 0x022);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) case 48000: /* set sample rate to 48 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) tlv320aic23b_write(sd, 8, 0x000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static int tlv320aic23b_s_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct v4l2_subdev *sd = to_sd(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) case V4L2_CID_AUDIO_MUTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) tlv320aic23b_write(sd, 0, 0x180); /* mute both channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* set gain on both channels to +3.0 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (!ctrl->val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) tlv320aic23b_write(sd, 0, 0x119);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static int tlv320aic23b_log_status(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct tlv320aic23b_state *state = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) v4l2_ctrl_handler_log_status(&state->hdl, sd->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const struct v4l2_ctrl_ops tlv320aic23b_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .s_ctrl = tlv320aic23b_s_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static const struct v4l2_subdev_core_ops tlv320aic23b_core_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .log_status = tlv320aic23b_log_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static const struct v4l2_subdev_audio_ops tlv320aic23b_audio_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .s_clock_freq = tlv320aic23b_s_clock_freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const struct v4l2_subdev_ops tlv320aic23b_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .core = &tlv320aic23b_core_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .audio = &tlv320aic23b_audio_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* i2c implementation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * Generic i2c probe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int tlv320aic23b_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct tlv320aic23b_state *state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Check if the adapter supports the needed features */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) v4l_info(client, "chip found @ 0x%x (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) client->addr << 1, client->adapter->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (state == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) sd = &state->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) v4l2_i2c_subdev_init(sd, client, &tlv320aic23b_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* Initialize tlv320aic23b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* RESET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) tlv320aic23b_write(sd, 15, 0x000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* turn off DAC & mic input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) tlv320aic23b_write(sd, 6, 0x00A);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* left-justified, 24-bit, master mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) tlv320aic23b_write(sd, 7, 0x049);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* set gain on both channels to +3.0 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) tlv320aic23b_write(sd, 0, 0x119);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* set sample rate to 48 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) tlv320aic23b_write(sd, 8, 0x000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* activate digital interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) tlv320aic23b_write(sd, 9, 0x001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) v4l2_ctrl_handler_init(&state->hdl, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) v4l2_ctrl_new_std(&state->hdl, &tlv320aic23b_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) V4L2_CID_AUDIO_MUTE, 0, 1, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) sd->ctrl_handler = &state->hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (state->hdl.error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) int err = state->hdl.error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) v4l2_ctrl_handler_free(&state->hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) v4l2_ctrl_handler_setup(&state->hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static int tlv320aic23b_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct tlv320aic23b_state *state = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) v4l2_device_unregister_subdev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) v4l2_ctrl_handler_free(&state->hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static const struct i2c_device_id tlv320aic23b_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) { "tlv320aic23b", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) MODULE_DEVICE_TABLE(i2c, tlv320aic23b_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static struct i2c_driver tlv320aic23b_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .name = "tlv320aic23b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .probe = tlv320aic23b_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .remove = tlv320aic23b_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .id_table = tlv320aic23b_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) module_i2c_driver(tlv320aic23b_driver);