^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __INCLUDED_TEA6420__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __INCLUDED_TEA6420__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /* input pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define TEA6420_OUTPUT1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define TEA6420_OUTPUT2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define TEA6420_OUTPUT3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define TEA6420_OUTPUT4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* output pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define TEA6420_INPUT1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define TEA6420_INPUT2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define TEA6420_INPUT3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define TEA6420_INPUT4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define TEA6420_INPUT5 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define TEA6420_INPUT6 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* gain on the output pins, ORed with the output pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define TEA6420_GAIN0 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define TEA6420_GAIN2 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define TEA6420_GAIN4 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define TEA6420_GAIN6 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #endif