^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * saa7185 - Philips SAA7185B video encoder driver version 0.0.3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Slight changes for video timing and attachment output by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Wolfgang Scherr <scherr@net4you.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/ioctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MODULE_DESCRIPTION("Philips SAA7185 video encoder driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MODULE_AUTHOR("Dave Perks");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) module_param(debug, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MODULE_PARM_DESC(debug, "Debug level (0-1)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct saa7185 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct v4l2_subdev sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned char reg[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) v4l2_std_id norm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static inline struct saa7185 *to_saa7185(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return container_of(sd, struct saa7185, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static inline int saa7185_read(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return i2c_smbus_read_byte(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int saa7185_write(struct v4l2_subdev *sd, u8 reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct saa7185 *encoder = to_saa7185(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) v4l2_dbg(1, debug, sd, "%02x set to %02x\n", reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) encoder->reg[reg] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return i2c_smbus_write_byte_data(client, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int saa7185_write_block(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) const u8 *data, unsigned int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct saa7185 *encoder = to_saa7185(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) int ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* the adv7175 has an autoincrement function, use it if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * the adapter understands raw I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* do raw I2C, not smbus compatible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u8 block_data[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int block_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) while (len >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) block_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) block_data[block_len++] = reg = data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) block_data[block_len++] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) encoder->reg[reg++] = data[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) len -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) data += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) } while (len >= 2 && data[0] == reg && block_len < 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ret = i2c_master_send(client, block_data, block_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* do some slow I2C emulation kind of thing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) while (len >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) reg = *data++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ret = saa7185_write(sd, reg, *data++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) len -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static const unsigned char init_common[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 0x3a, 0x0f, /* CBENB=0, V656=0, VY2C=1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * YUV2C=1, MY2C=1, MUV2C=1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 0x42, 0x6b, /* OVLY0=107 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 0x43, 0x00, /* OVLU0=0 white */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 0x44, 0x00, /* OVLV0=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 0x45, 0x22, /* OVLY1=34 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 0x46, 0xac, /* OVLU1=172 yellow */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 0x47, 0x0e, /* OVLV1=14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 0x48, 0x03, /* OVLY2=3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 0x49, 0x1d, /* OVLU2=29 cyan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 0x4a, 0xac, /* OVLV2=172 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 0x4b, 0xf0, /* OVLY3=240 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 0x4c, 0xc8, /* OVLU3=200 green */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 0x4d, 0xb9, /* OVLV3=185 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 0x4e, 0xd4, /* OVLY4=212 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 0x4f, 0x38, /* OVLU4=56 magenta */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 0x50, 0x47, /* OVLV4=71 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 0x51, 0xc1, /* OVLY5=193 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 0x52, 0xe3, /* OVLU5=227 red */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 0x53, 0x54, /* OVLV5=84 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 0x54, 0xa3, /* OVLY6=163 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 0x55, 0x54, /* OVLU6=84 blue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 0x56, 0xf2, /* OVLV6=242 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 0x57, 0x90, /* OVLY7=144 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 0x58, 0x00, /* OVLU7=0 black */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 0x59, 0x00, /* OVLV7=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 0x5a, 0x00, /* CHPS=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 0x5b, 0x76, /* GAINU=118 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 0x5c, 0xa5, /* GAINV=165 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 0x5d, 0x3c, /* BLCKL=60 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 0x5e, 0x3a, /* BLNNL=58 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 0x5f, 0x3a, /* CCRS=0, BLNVB=58 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 0x60, 0x00, /* NULL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* 0x61 - 0x66 set according to norm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 0x67, 0x00, /* 0 : caption 1st byte odd field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 0x68, 0x00, /* 0 : caption 2nd byte odd field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 0x69, 0x00, /* 0 : caption 1st byte even field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 0x6a, 0x00, /* 0 : caption 2nd byte even field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 0x6b, 0x91, /* MODIN=2, PCREF=0, SCCLN=17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 0x6c, 0x20, /* SRCV1=0, TRCV2=1, ORCV1=0, PRCV1=0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * CBLF=0, ORCV2=0, PRCV2=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 0x6d, 0x00, /* SRCM1=0, CCEN=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 0x6e, 0x0e, /* HTRIG=0x005, approx. centered, at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * least for PAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 0x6f, 0x00, /* HTRIG upper bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 0x70, 0x20, /* PHRES=0, SBLN=1, VTRIG=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* The following should not be needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 0x71, 0x15, /* BMRQ=0x115 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 0x72, 0x90, /* EMRQ=0x690 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 0x73, 0x61, /* EMRQ=0x690, BMRQ=0x115 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 0x74, 0x00, /* NULL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 0x75, 0x00, /* NULL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 0x76, 0x00, /* NULL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 0x77, 0x15, /* BRCV=0x115 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 0x78, 0x90, /* ERCV=0x690 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 0x79, 0x61, /* ERCV=0x690, BRCV=0x115 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /* Field length controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 0x7a, 0x70, /* FLC=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* The following should not be needed if SBLN = 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 0x7b, 0x16, /* FAL=22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 0x7c, 0x35, /* LAL=244 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 0x7d, 0x20, /* LAL=244, FAL=22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const unsigned char init_pal[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 0x61, 0x1e, /* FISE=0, PAL=1, SCBW=1, RTCE=1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * YGS=1, INPI=0, DOWN=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 0x62, 0xc8, /* DECTYP=1, BSTA=72 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 0x63, 0xcb, /* FSC0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 0x64, 0x8a, /* FSC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 0x65, 0x09, /* FSC2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 0x66, 0x2a, /* FSC3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static const unsigned char init_ntsc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 0x61, 0x1d, /* FISE=1, PAL=0, SCBW=1, RTCE=1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * YGS=1, INPI=0, DOWN=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 0x62, 0xe6, /* DECTYP=1, BSTA=102 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 0x63, 0x1f, /* FSC0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 0x64, 0x7c, /* FSC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 0x65, 0xf0, /* FSC2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 0x66, 0x21, /* FSC3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int saa7185_init(struct v4l2_subdev *sd, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) struct saa7185 *encoder = to_saa7185(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) saa7185_write_block(sd, init_common, sizeof(init_common));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (encoder->norm & V4L2_STD_NTSC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) saa7185_write_block(sd, init_ntsc, sizeof(init_ntsc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) saa7185_write_block(sd, init_pal, sizeof(init_pal));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static int saa7185_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct saa7185 *encoder = to_saa7185(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (std & V4L2_STD_NTSC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) saa7185_write_block(sd, init_ntsc, sizeof(init_ntsc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) else if (std & V4L2_STD_PAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) saa7185_write_block(sd, init_pal, sizeof(init_pal));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) encoder->norm = std;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static int saa7185_s_routing(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) u32 input, u32 output, u32 config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct saa7185 *encoder = to_saa7185(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) /* RJ: input = 0: input is from SA7111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) input = 1: input is from ZR36060 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) switch (input) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /* turn off colorbar */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) saa7185_write(sd, 0x3a, 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /* Switch RTCE to 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) saa7185_write(sd, 0x61, (encoder->reg[0x61] & 0xf7) | 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) saa7185_write(sd, 0x6e, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* turn off colorbar */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) saa7185_write(sd, 0x3a, 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* Switch RTCE to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) saa7185_write(sd, 0x61, (encoder->reg[0x61] & 0xf7) | 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* SW: a slight sync problem... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) saa7185_write(sd, 0x6e, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* turn on colorbar */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) saa7185_write(sd, 0x3a, 0x8f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* Switch RTCE to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) saa7185_write(sd, 0x61, (encoder->reg[0x61] & 0xf7) | 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /* SW: a slight sync problem... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) saa7185_write(sd, 0x6e, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static const struct v4l2_subdev_core_ops saa7185_core_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .init = saa7185_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static const struct v4l2_subdev_video_ops saa7185_video_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .s_std_output = saa7185_s_std_output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .s_routing = saa7185_s_routing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static const struct v4l2_subdev_ops saa7185_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .core = &saa7185_core_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .video = &saa7185_video_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static int saa7185_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct saa7185 *encoder;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /* Check if the adapter supports the needed features */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) v4l_info(client, "chip found @ 0x%x (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) client->addr << 1, client->adapter->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) encoder = devm_kzalloc(&client->dev, sizeof(*encoder), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (encoder == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) encoder->norm = V4L2_STD_NTSC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) sd = &encoder->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) v4l2_i2c_subdev_init(sd, client, &saa7185_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) i = saa7185_write_block(sd, init_common, sizeof(init_common));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (i >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) i = saa7185_write_block(sd, init_ntsc, sizeof(init_ntsc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (i < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) v4l2_dbg(1, debug, sd, "init error %d\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) v4l2_dbg(1, debug, sd, "revision 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) saa7185_read(sd) >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static int saa7185_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) struct saa7185 *encoder = to_saa7185(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) v4l2_device_unregister_subdev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /* SW: output off is active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) saa7185_write(sd, 0x61, (encoder->reg[0x61]) | 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static const struct i2c_device_id saa7185_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) { "saa7185", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) MODULE_DEVICE_TABLE(i2c, saa7185_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static struct i2c_driver saa7185_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .name = "saa7185",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .probe = saa7185_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .remove = saa7185_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .id_table = saa7185_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) module_i2c_driver(saa7185_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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