Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)     saa6752hs - i2c-driver for the saa6752hs by Philips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)     Copyright (C) 2004 Andrew de Quincey
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)     AC-3 support:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)     Copyright (C) 2008 Hans Verkuil <hverkuil@xs4all.nl>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/crc32.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define MPEG_VIDEO_TARGET_BITRATE_MAX  27000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define MPEG_VIDEO_MAX_BITRATE_MAX     27000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define MPEG_TOTAL_TARGET_BITRATE_MAX  27000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define MPEG_PID_MAX ((1 << 14) - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) MODULE_DESCRIPTION("device driver for saa6752hs MPEG2 encoder");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) MODULE_AUTHOR("Andrew de Quincey");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) enum saa6752hs_videoformat {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	SAA6752HS_VF_D1 = 0,    /* standard D1 video format: 720x576 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	SAA6752HS_VF_2_3_D1 = 1,/* 2/3D1 video format: 480x576 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	SAA6752HS_VF_1_2_D1 = 2,/* 1/2D1 video format: 352x576 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	SAA6752HS_VF_SIF = 3,   /* SIF video format: 352x288 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	SAA6752HS_VF_UNKNOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) struct saa6752hs_mpeg_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	/* transport streams */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	__u16				ts_pid_pmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	__u16				ts_pid_audio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	__u16				ts_pid_video;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	__u16				ts_pid_pcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	/* audio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	enum v4l2_mpeg_audio_encoding    au_encoding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	enum v4l2_mpeg_audio_l2_bitrate  au_l2_bitrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	enum v4l2_mpeg_audio_ac3_bitrate au_ac3_bitrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	/* video */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	enum v4l2_mpeg_video_aspect	vi_aspect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	enum v4l2_mpeg_video_bitrate_mode vi_bitrate_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	__u32				vi_bitrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	__u32				vi_bitrate_peak;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static const struct v4l2_format v4l2_format_table[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	[SAA6752HS_VF_D1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		{ .fmt = { .pix = { .width = 720, .height = 576 }}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	[SAA6752HS_VF_2_3_D1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		{ .fmt = { .pix = { .width = 480, .height = 576 }}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	[SAA6752HS_VF_1_2_D1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		{ .fmt = { .pix = { .width = 352, .height = 576 }}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	[SAA6752HS_VF_SIF] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		{ .fmt = { .pix = { .width = 352, .height = 288 }}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	[SAA6752HS_VF_UNKNOWN] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		{ .fmt = { .pix = { .width = 0, .height = 0}}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) struct saa6752hs_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	struct v4l2_subdev            sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct v4l2_ctrl_handler      hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	struct { /* video bitrate mode control cluster */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		struct v4l2_ctrl *video_bitrate_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		struct v4l2_ctrl *video_bitrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		struct v4l2_ctrl *video_bitrate_peak;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	u32			      revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	int			      has_ac3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct saa6752hs_mpeg_params  params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	enum saa6752hs_videoformat    video_format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	v4l2_std_id                   standard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) enum saa6752hs_command {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	SAA6752HS_COMMAND_RESET = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	SAA6752HS_COMMAND_STOP = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	SAA6752HS_COMMAND_START = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	SAA6752HS_COMMAND_PAUSE = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	SAA6752HS_COMMAND_RECONFIGURE = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	SAA6752HS_COMMAND_SLEEP = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	SAA6752HS_COMMAND_RECONFIGURE_FORCE = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	SAA6752HS_COMMAND_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static inline struct saa6752hs_state *to_state(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	return container_of(sd, struct saa6752hs_state, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static const u8 PAT[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	0xc2, /* i2c register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	0x00, /* table number for encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	0x47, /* sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	0x40, 0x00, /* transport_error_indicator(0), payload_unit_start(1), transport_priority(0), pid(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	0x10, /* transport_scrambling_control(00), adaptation_field_control(01), continuity_counter(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	0x00, /* PSI pointer to start of table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	0x00, /* tid(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	0xb0, 0x0d, /* section_syntax_indicator(1), section_length(13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	0x00, 0x01, /* transport_stream_id(1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	0xc1, /* version_number(0), current_next_indicator(1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	0x00, 0x00, /* section_number(0), last_section_number(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	0x00, 0x01, /* program_number(1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	0xe0, 0x00, /* PMT PID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	0x00, 0x00, 0x00, 0x00 /* CRC32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static const u8 PMT[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	0xc2, /* i2c register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	0x01, /* table number for encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	0x47, /* sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	0x40, 0x00, /* transport_error_indicator(0), payload_unit_start(1), transport_priority(0), pid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	0x10, /* transport_scrambling_control(00), adaptation_field_control(01), continuity_counter(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	0x00, /* PSI pointer to start of table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	0x02, /* tid(2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	0xb0, 0x17, /* section_syntax_indicator(1), section_length(23) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	0x00, 0x01, /* program_number(1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	0xc1, /* version_number(0), current_next_indicator(1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	0x00, 0x00, /* section_number(0), last_section_number(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	0xe0, 0x00, /* PCR_PID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	0xf0, 0x00, /* program_info_length(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	0x02, 0xe0, 0x00, 0xf0, 0x00, /* video stream type(2), pid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	0x04, 0xe0, 0x00, 0xf0, 0x00, /* audio stream type(4), pid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	0x00, 0x00, 0x00, 0x00 /* CRC32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static const u8 PMT_AC3[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	0xc2, /* i2c register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	0x01, /* table number for encoder(1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	0x47, /* sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	0x40, /* transport_error_indicator(0), payload_unit_start(1), transport_priority(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	0x10, /* PMT PID (0x0010) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	0x10, /* transport_scrambling_control(00), adaptation_field_control(01), continuity_counter(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	0x00, /* PSI pointer to start of table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	0x02, /* TID (2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	0xb0, 0x1a, /* section_syntax_indicator(1), section_length(26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	0x00, 0x01, /* program_number(1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	0xc1, /* version_number(0), current_next_indicator(1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	0x00, 0x00, /* section_number(0), last_section_number(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	0xe1, 0x04, /* PCR_PID (0x0104) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	0xf0, 0x00, /* program_info_length(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	0x02, 0xe1, 0x00, 0xf0, 0x00, /* video stream type(2), pid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	0x06, 0xe1, 0x03, 0xf0, 0x03, /* audio stream type(6), pid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	0x6a, /* AC3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	0x01, /* Descriptor_length(1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	0x00, /* component_type_flag(0), bsid_flag(0), mainid_flag(0), asvc_flag(0), reserved flags(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	0xED, 0xDE, 0x2D, 0xF3 /* CRC32 BE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static const struct saa6752hs_mpeg_params param_defaults =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	.ts_pid_pmt      = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	.ts_pid_video    = 260,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	.ts_pid_audio    = 256,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	.ts_pid_pcr      = 259,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	.vi_aspect       = V4L2_MPEG_VIDEO_ASPECT_4x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	.vi_bitrate      = 4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	.vi_bitrate_peak = 6000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	.vi_bitrate_mode = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	.au_encoding     = V4L2_MPEG_AUDIO_ENCODING_LAYER_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	.au_l2_bitrate   = V4L2_MPEG_AUDIO_L2_BITRATE_256K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	.au_ac3_bitrate  = V4L2_MPEG_AUDIO_AC3_BITRATE_256K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static int saa6752hs_chip_command(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 				  enum saa6752hs_command command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	unsigned char buf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	unsigned long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	/* execute the command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	switch(command) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	case SAA6752HS_COMMAND_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		buf[0] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	case SAA6752HS_COMMAND_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		buf[0] = 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	case SAA6752HS_COMMAND_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		buf[0] = 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	case SAA6752HS_COMMAND_PAUSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		buf[0] = 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	case SAA6752HS_COMMAND_RECONFIGURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		buf[0] = 0x05;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	case SAA6752HS_COMMAND_SLEEP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		buf[0] = 0x06;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	case SAA6752HS_COMMAND_RECONFIGURE_FORCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		buf[0] = 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	/* set it and wait for it to be so */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	i2c_master_send(client, buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	timeout = jiffies + HZ * 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		/* get the current status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		buf[0] = 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		i2c_master_send(client, buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		i2c_master_recv(client, buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		if (!(buf[0] & 0x20))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		if (time_after(jiffies,timeout)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 			status = -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	/* delay a bit to let encoder settle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static inline void set_reg8(struct i2c_client *client, uint8_t reg, uint8_t val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	u8 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	buf[0] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	buf[1] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	i2c_master_send(client, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static inline void set_reg16(struct i2c_client *client, uint8_t reg, uint16_t val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	u8 buf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	buf[0] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	buf[1] = val >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	buf[2] = val & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	i2c_master_send(client, buf, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static int saa6752hs_set_bitrate(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 				 struct saa6752hs_state *h)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	struct saa6752hs_mpeg_params *params = &h->params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	int tot_bitrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	int is_384k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	/* set the bitrate mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	set_reg8(client, 0x71,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		params->vi_bitrate_mode != V4L2_MPEG_VIDEO_BITRATE_MODE_VBR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	/* set the video bitrate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	if (params->vi_bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		/* set the target bitrate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		set_reg16(client, 0x80, params->vi_bitrate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		/* set the max bitrate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		set_reg16(client, 0x81, params->vi_bitrate_peak);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		tot_bitrate = params->vi_bitrate_peak;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		/* set the target bitrate (no max bitrate for CBR) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		set_reg16(client, 0x81, params->vi_bitrate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		tot_bitrate = params->vi_bitrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	/* set the audio encoding */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	set_reg8(client, 0x93,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 			params->au_encoding == V4L2_MPEG_AUDIO_ENCODING_AC3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	/* set the audio bitrate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	if (params->au_encoding == V4L2_MPEG_AUDIO_ENCODING_AC3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		is_384k = V4L2_MPEG_AUDIO_AC3_BITRATE_384K == params->au_ac3_bitrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		is_384k = V4L2_MPEG_AUDIO_L2_BITRATE_384K == params->au_l2_bitrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	set_reg8(client, 0x94, is_384k);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	tot_bitrate += is_384k ? 384 : 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	/* Note: the total max bitrate is determined by adding the video and audio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	   bitrates together and also adding an extra 768kbit/s to stay on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	   safe side. If more control should be required, then an extra MPEG control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	   should be added. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	tot_bitrate += 768;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	if (tot_bitrate > MPEG_TOTAL_TARGET_BITRATE_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		tot_bitrate = MPEG_TOTAL_TARGET_BITRATE_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	/* set the total bitrate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	set_reg16(client, 0xb1, tot_bitrate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int saa6752hs_try_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	struct saa6752hs_state *h =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		container_of(ctrl->handler, struct saa6752hs_state, hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		/* peak bitrate shall be >= normal bitrate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		if (ctrl->val == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		    h->video_bitrate_peak->val < h->video_bitrate->val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 			h->video_bitrate_peak->val = h->video_bitrate->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static int saa6752hs_s_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	struct saa6752hs_state *h =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 		container_of(ctrl->handler, struct saa6752hs_state, hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	struct saa6752hs_mpeg_params *params = &h->params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	case V4L2_CID_MPEG_STREAM_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	case V4L2_CID_MPEG_STREAM_PID_PMT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		params->ts_pid_pmt = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	case V4L2_CID_MPEG_STREAM_PID_AUDIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		params->ts_pid_audio = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	case V4L2_CID_MPEG_STREAM_PID_VIDEO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		params->ts_pid_video = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	case V4L2_CID_MPEG_STREAM_PID_PCR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 		params->ts_pid_pcr = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	case V4L2_CID_MPEG_AUDIO_ENCODING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		params->au_encoding = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	case V4L2_CID_MPEG_AUDIO_L2_BITRATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 		params->au_l2_bitrate = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	case V4L2_CID_MPEG_AUDIO_AC3_BITRATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 		params->au_ac3_bitrate = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	case V4L2_CID_MPEG_VIDEO_ENCODING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	case V4L2_CID_MPEG_VIDEO_ASPECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 		params->vi_aspect = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 		params->vi_bitrate_mode = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		params->vi_bitrate = h->video_bitrate->val / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 		params->vi_bitrate_peak = h->video_bitrate_peak->val / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		v4l2_ctrl_activate(h->video_bitrate_peak,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 				ctrl->val == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static int saa6752hs_init(struct v4l2_subdev *sd, u32 leading_null_bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	unsigned char buf[9], buf2[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	struct saa6752hs_state *h = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	unsigned size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	u32 crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	unsigned char localPAT[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	unsigned char localPMT[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	/* Set video format - must be done first as it resets other settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	set_reg8(client, 0x41, h->video_format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	/* Set number of lines in input signal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	set_reg8(client, 0x40, (h->standard & V4L2_STD_525_60) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	/* set bitrate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	saa6752hs_set_bitrate(client, h);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	/* Set GOP structure {3, 13} */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	set_reg16(client, 0x72, 0x030d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	/* Set minimum Q-scale {4} */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	set_reg8(client, 0x82, 0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	/* Set maximum Q-scale {12} */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	set_reg8(client, 0x83, 0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	/* Set Output Protocol */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	set_reg8(client, 0xd0, 0x81);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	/* Set video output stream format {TS} */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	set_reg8(client, 0xb0, 0x05);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	/* Set leading null byte for TS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	set_reg16(client, 0xf6, leading_null_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	/* compute PAT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	memcpy(localPAT, PAT, sizeof(PAT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	localPAT[17] = 0xe0 | ((h->params.ts_pid_pmt >> 8) & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	localPAT[18] = h->params.ts_pid_pmt & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	crc = crc32_be(~0, &localPAT[7], sizeof(PAT) - 7 - 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	localPAT[sizeof(PAT) - 4] = (crc >> 24) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	localPAT[sizeof(PAT) - 3] = (crc >> 16) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	localPAT[sizeof(PAT) - 2] = (crc >> 8) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	localPAT[sizeof(PAT) - 1] = crc & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	/* compute PMT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	if (h->params.au_encoding == V4L2_MPEG_AUDIO_ENCODING_AC3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 		size = sizeof(PMT_AC3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 		memcpy(localPMT, PMT_AC3, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 		size = sizeof(PMT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 		memcpy(localPMT, PMT, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	localPMT[3] = 0x40 | ((h->params.ts_pid_pmt >> 8) & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	localPMT[4] = h->params.ts_pid_pmt & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	localPMT[15] = 0xE0 | ((h->params.ts_pid_pcr >> 8) & 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	localPMT[16] = h->params.ts_pid_pcr & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	localPMT[20] = 0xE0 | ((h->params.ts_pid_video >> 8) & 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	localPMT[21] = h->params.ts_pid_video & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	localPMT[25] = 0xE0 | ((h->params.ts_pid_audio >> 8) & 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	localPMT[26] = h->params.ts_pid_audio & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	crc = crc32_be(~0, &localPMT[7], size - 7 - 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	localPMT[size - 4] = (crc >> 24) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	localPMT[size - 3] = (crc >> 16) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	localPMT[size - 2] = (crc >> 8) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	localPMT[size - 1] = crc & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	/* Set Audio PID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	set_reg16(client, 0xc1, h->params.ts_pid_audio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	/* Set Video PID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	set_reg16(client, 0xc0, h->params.ts_pid_video);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	/* Set PCR PID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 	set_reg16(client, 0xc4, h->params.ts_pid_pcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	/* Send SI tables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	i2c_master_send(client, localPAT, sizeof(PAT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	i2c_master_send(client, localPMT, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 	/* mute then unmute audio. This removes buzzing artefacts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	set_reg8(client, 0xa4, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	set_reg8(client, 0xa4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	/* start it going */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	saa6752hs_chip_command(client, SAA6752HS_COMMAND_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 	/* readout current state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	buf[0] = 0xE1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	buf[1] = 0xA7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	buf[2] = 0xFE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	buf[3] = 0x82;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 	buf[4] = 0xB0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	i2c_master_send(client, buf, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	i2c_master_recv(client, buf2, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	/* change aspect ratio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	buf[0] = 0xE0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	buf[1] = 0xA7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	buf[2] = 0xFE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 	buf[3] = 0x82;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	buf[4] = 0xB0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	buf[5] = buf2[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	switch (h->params.vi_aspect) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	case V4L2_MPEG_VIDEO_ASPECT_16x9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 		buf[6] = buf2[1] | 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	case V4L2_MPEG_VIDEO_ASPECT_4x3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 		buf[6] = buf2[1] & 0xBF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	buf[7] = buf2[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 	buf[8] = buf2[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	i2c_master_send(client, buf, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static int saa6752hs_get_fmt(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 		struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 		struct v4l2_subdev_format *format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 	struct v4l2_mbus_framefmt *f = &format->format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	struct saa6752hs_state *h = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	if (format->pad)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	if (h->video_format == SAA6752HS_VF_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 		h->video_format = SAA6752HS_VF_D1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	f->width = v4l2_format_table[h->video_format].fmt.pix.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	f->height = v4l2_format_table[h->video_format].fmt.pix.height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	f->code = MEDIA_BUS_FMT_FIXED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	f->field = V4L2_FIELD_INTERLACED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 	f->colorspace = V4L2_COLORSPACE_SMPTE170M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) static int saa6752hs_set_fmt(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 		struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 		struct v4l2_subdev_format *format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 	struct v4l2_mbus_framefmt *f = &format->format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 	struct saa6752hs_state *h = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 	int dist_352, dist_480, dist_720;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 	if (format->pad)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 	f->code = MEDIA_BUS_FMT_FIXED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 	dist_352 = abs(f->width - 352);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	dist_480 = abs(f->width - 480);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 	dist_720 = abs(f->width - 720);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	if (dist_720 < dist_480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 		f->width = 720;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 		f->height = 576;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 	} else if (dist_480 < dist_352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 		f->width = 480;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 		f->height = 576;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 		f->width = 352;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 		if (abs(f->height - 576) < abs(f->height - 288))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 			f->height = 576;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 			f->height = 288;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 	f->field = V4L2_FIELD_INTERLACED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 	f->colorspace = V4L2_COLORSPACE_SMPTE170M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 	if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 		cfg->try_fmt = *f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 	  FIXME: translate and round width/height into EMPRESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 	  subsample type:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 	  type   |   PAL   |  NTSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 	  ---------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 	  SIF    | 352x288 | 352x240
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 	  1/2 D1 | 352x576 | 352x480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 	  2/3 D1 | 480x576 | 480x480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 	  D1     | 720x576 | 720x480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 	if (f->code != MEDIA_BUS_FMT_FIXED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 	if (f->width == 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) 		h->video_format = SAA6752HS_VF_D1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) 	else if (f->width == 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 		h->video_format = SAA6752HS_VF_2_3_D1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) 	else if (f->height == 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 		h->video_format = SAA6752HS_VF_1_2_D1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 		h->video_format = SAA6752HS_VF_SIF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static int saa6752hs_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 	struct saa6752hs_state *h = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 	h->standard = std;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) static const struct v4l2_ctrl_ops saa6752hs_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) 	.try_ctrl = saa6752hs_try_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) 	.s_ctrl = saa6752hs_s_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static const struct v4l2_subdev_core_ops saa6752hs_core_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 	.init = saa6752hs_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static const struct v4l2_subdev_video_ops saa6752hs_video_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) 	.s_std = saa6752hs_s_std,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static const struct v4l2_subdev_pad_ops saa6752hs_pad_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) 	.get_fmt = saa6752hs_get_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) 	.set_fmt = saa6752hs_set_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) static const struct v4l2_subdev_ops saa6752hs_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 	.core = &saa6752hs_core_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 	.video = &saa6752hs_video_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 	.pad = &saa6752hs_pad_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) static int saa6752hs_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 		const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) 	struct saa6752hs_state *h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 	struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 	struct v4l2_ctrl_handler *hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) 	u8 addr = 0x13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 	u8 data[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 	v4l_info(client, "chip found @ 0x%x (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 			client->addr << 1, client->adapter->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 	h = devm_kzalloc(&client->dev, sizeof(*h), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) 	if (h == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) 	sd = &h->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) 	v4l2_i2c_subdev_init(sd, client, &saa6752hs_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) 	i2c_master_send(client, &addr, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 	i2c_master_recv(client, data, sizeof(data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) 	h->revision = (data[8] << 8) | data[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) 	h->has_ac3 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) 	if (h->revision == 0x0206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) 		h->has_ac3 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) 		v4l_info(client, "supports AC-3\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 	h->params = param_defaults;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) 	hdl = &h->hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) 	v4l2_ctrl_handler_init(hdl, 14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) 	v4l2_ctrl_new_std_menu(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) 		V4L2_CID_MPEG_AUDIO_ENCODING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) 		h->has_ac3 ? V4L2_MPEG_AUDIO_ENCODING_AC3 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) 			V4L2_MPEG_AUDIO_ENCODING_LAYER_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) 		0x0d, V4L2_MPEG_AUDIO_ENCODING_LAYER_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) 	v4l2_ctrl_new_std_menu(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) 		V4L2_CID_MPEG_AUDIO_L2_BITRATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) 		V4L2_MPEG_AUDIO_L2_BITRATE_384K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) 		~((1 << V4L2_MPEG_AUDIO_L2_BITRATE_256K) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) 		  (1 << V4L2_MPEG_AUDIO_L2_BITRATE_384K)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) 		V4L2_MPEG_AUDIO_L2_BITRATE_256K);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) 	if (h->has_ac3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) 		v4l2_ctrl_new_std_menu(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 			V4L2_CID_MPEG_AUDIO_AC3_BITRATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) 			V4L2_MPEG_AUDIO_AC3_BITRATE_384K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) 			~((1 << V4L2_MPEG_AUDIO_AC3_BITRATE_256K) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) 			  (1 << V4L2_MPEG_AUDIO_AC3_BITRATE_384K)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 			V4L2_MPEG_AUDIO_AC3_BITRATE_256K);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) 	v4l2_ctrl_new_std_menu(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) 		V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) 		V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) 		~(1 << V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) 		V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) 	v4l2_ctrl_new_std_menu(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) 		V4L2_CID_MPEG_VIDEO_ENCODING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) 		V4L2_MPEG_VIDEO_ENCODING_MPEG_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) 		~(1 << V4L2_MPEG_VIDEO_ENCODING_MPEG_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) 		V4L2_MPEG_VIDEO_ENCODING_MPEG_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) 	v4l2_ctrl_new_std_menu(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) 		V4L2_CID_MPEG_VIDEO_ASPECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) 		V4L2_MPEG_VIDEO_ASPECT_16x9, 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) 		V4L2_MPEG_VIDEO_ASPECT_4x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) 	h->video_bitrate_peak = v4l2_ctrl_new_std(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) 		V4L2_CID_MPEG_VIDEO_BITRATE_PEAK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) 		1000000, 27000000, 1000, 8000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) 	v4l2_ctrl_new_std_menu(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) 		V4L2_CID_MPEG_STREAM_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) 		V4L2_MPEG_STREAM_TYPE_MPEG2_TS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 		~(1 << V4L2_MPEG_STREAM_TYPE_MPEG2_TS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) 		V4L2_MPEG_STREAM_TYPE_MPEG2_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) 	h->video_bitrate_mode = v4l2_ctrl_new_std_menu(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) 		V4L2_CID_MPEG_VIDEO_BITRATE_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) 		V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) 		V4L2_MPEG_VIDEO_BITRATE_MODE_VBR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) 	h->video_bitrate = v4l2_ctrl_new_std(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) 		V4L2_CID_MPEG_VIDEO_BITRATE, 1000000, 27000000, 1000, 6000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) 	v4l2_ctrl_new_std(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) 		V4L2_CID_MPEG_STREAM_PID_PMT, 0, (1 << 14) - 1, 1, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) 	v4l2_ctrl_new_std(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) 		V4L2_CID_MPEG_STREAM_PID_AUDIO, 0, (1 << 14) - 1, 1, 260);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) 	v4l2_ctrl_new_std(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) 		V4L2_CID_MPEG_STREAM_PID_VIDEO, 0, (1 << 14) - 1, 1, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) 	v4l2_ctrl_new_std(hdl, &saa6752hs_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) 		V4L2_CID_MPEG_STREAM_PID_PCR, 0, (1 << 14) - 1, 1, 259);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) 	sd->ctrl_handler = hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) 	if (hdl->error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) 		int err = hdl->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) 		v4l2_ctrl_handler_free(hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) 	v4l2_ctrl_cluster(3, &h->video_bitrate_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) 	v4l2_ctrl_handler_setup(hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) 	h->standard = 0; /* Assume 625 input lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) static int saa6752hs_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) 	v4l2_device_unregister_subdev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) 	v4l2_ctrl_handler_free(&to_state(sd)->hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) static const struct i2c_device_id saa6752hs_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) 	{ "saa6752hs", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) MODULE_DEVICE_TABLE(i2c, saa6752hs_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) static struct i2c_driver saa6752hs_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) 		.name	= "saa6752hs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) 	.probe		= saa6752hs_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) 	.remove		= saa6752hs_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) 	.id_table	= saa6752hs_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) module_i2c_driver(saa6752hs_driver);