^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Driver for SAA6588 RDS decoder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) (c) 2005 Hans J. Koch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <media/i2c/saa6588.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* insmod options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static unsigned int debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static unsigned int xtal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static unsigned int mmbs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static unsigned int plvl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static unsigned int bufblocks = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) module_param(debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MODULE_PARM_DESC(debug, "enable debug messages");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) module_param(xtal, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MODULE_PARM_DESC(xtal, "select oscillator frequency (0..3), default 0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) module_param(mmbs, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MODULE_PARM_DESC(mmbs, "enable MMBS mode: 0=off (default), 1=on");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) module_param(plvl, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MODULE_PARM_DESC(plvl, "select pause level (0..3), default 0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) module_param(bufblocks, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MODULE_PARM_DESC(bufblocks, "number of buffered blocks, default 100");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MODULE_DESCRIPTION("v4l2 driver module for SAA6588 RDS decoder");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MODULE_AUTHOR("Hans J. Koch <koch@hjk-az.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define UNSET (-1U)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define PREFIX "saa6588: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define dprintk if (debug) printk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct saa6588 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct v4l2_subdev sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct delayed_work work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned char *buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned int buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned int rd_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned int wr_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned int block_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned char last_blocknum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) wait_queue_head_t read_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int data_available_for_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u8 sync;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static inline struct saa6588 *to_saa6588(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return container_of(sd, struct saa6588, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * SAA6588 defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* Initialization and mode control byte (0w) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* bit 0+1 (DAC0/DAC1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define cModeStandard 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define cModeFastPI 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define cModeReducedRequest 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define cModeInvalid 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* bit 2 (RBDS) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define cProcessingModeRDS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define cProcessingModeRBDS 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* bit 3+4 (SYM0/SYM1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define cErrCorrectionNone 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define cErrCorrection2Bits 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define cErrCorrection5Bits 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define cErrCorrectionNoneRBDS 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* bit 5 (NWSY) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define cSyncNormal 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define cSyncRestart 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* bit 6 (TSQD) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define cSigQualityDetectOFF 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define cSigQualityDetectON 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* bit 7 (SQCM) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define cSigQualityTriggered 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define cSigQualityContinous 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* Pause level and flywheel control byte (1w) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* bits 0..5 (FEB0..FEB5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define cFlywheelMaxBlocksMask 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define cFlywheelDefault 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* bits 6+7 (PL0/PL1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define cPauseLevel_11mV 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define cPauseLevel_17mV 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define cPauseLevel_27mV 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define cPauseLevel_43mV 0xC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* Pause time/oscillator frequency/quality detector control byte (1w) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* bits 0..4 (SQS0..SQS4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define cQualityDetectSensMask 0x1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define cQualityDetectDefault 0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* bit 5 (SOSC) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define cSelectOscFreqOFF 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define cSelectOscFreqON 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* bit 6+7 (PTF0/PTF1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define cOscFreq_4332kHz 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define cOscFreq_8664kHz 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define cOscFreq_12996kHz 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define cOscFreq_17328kHz 0xC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static bool block_from_buf(struct saa6588 *s, unsigned char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (s->rd_index == s->wr_index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (debug > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dprintk(PREFIX "Read: buffer empty.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (debug > 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) dprintk(PREFIX "Read: ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) for (i = s->rd_index; i < s->rd_index + 3; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dprintk("0x%02x ", s->buffer[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) memcpy(buf, &s->buffer[s->rd_index], 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) s->rd_index += 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (s->rd_index >= s->buf_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) s->rd_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) s->block_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (debug > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) dprintk("%d blocks total.\n", s->block_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static void read_from_buf(struct saa6588 *s, struct saa6588_command *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) unsigned char __user *buf_ptr = a->buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) unsigned char buf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) unsigned int rd_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) a->result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (!a->buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) while (!a->nonblocking && !s->data_available_for_read) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) int ret = wait_event_interruptible(s->read_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) s->data_available_for_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (ret == -ERESTARTSYS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) a->result = -EINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) rd_blocks = a->block_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) spin_lock_irqsave(&s->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (rd_blocks > s->block_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) rd_blocks = s->block_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) spin_unlock_irqrestore(&s->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (!rd_blocks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) for (i = 0; i < rd_blocks; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) bool got_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) spin_lock_irqsave(&s->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) got_block = block_from_buf(s, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) spin_unlock_irqrestore(&s->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (!got_block)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (copy_to_user(buf_ptr, buf, 3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) a->result = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) buf_ptr += 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) a->result += 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) spin_lock_irqsave(&s->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) s->data_available_for_read = (s->block_count > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) spin_unlock_irqrestore(&s->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static void block_to_buf(struct saa6588 *s, unsigned char *blockbuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (debug > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) dprintk(PREFIX "New block: ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) for (i = 0; i < 3; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (debug > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) dprintk("0x%02x ", blockbuf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) s->buffer[s->wr_index] = blockbuf[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) s->wr_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (s->wr_index >= s->buf_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) s->wr_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (s->wr_index == s->rd_index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) s->rd_index += 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (s->rd_index >= s->buf_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) s->rd_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) s->block_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (debug > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) dprintk("%d blocks total.\n", s->block_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static void saa6588_i2c_poll(struct saa6588 *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) struct i2c_client *client = v4l2_get_subdevdata(&s->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) unsigned char tmpbuf[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) unsigned char blocknum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) unsigned char tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* Although we only need 3 bytes, we have to read at least 6.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) SAA6588 returns garbage otherwise. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (6 != i2c_master_recv(client, &tmpbuf[0], 6)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (debug > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) dprintk(PREFIX "read error!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) s->sync = tmpbuf[0] & 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (!s->sync)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) blocknum = tmpbuf[0] >> 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (blocknum == s->last_blocknum) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (debug > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) dprintk("Saw block %d again.\n", blocknum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) s->last_blocknum = blocknum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) Byte order according to v4l2 specification:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) Byte 0: Least Significant Byte of RDS Block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) Byte 1: Most Significant Byte of RDS Block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) Byte 2 Bit 7: Error bit. Indicates that an uncorrectable error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) occurred during reception of this block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) Bit 6: Corrected bit. Indicates that an error was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) corrected for this data block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) Bits 5-3: Same as bits 0-2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) Bits 2-0: Block number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) SAA6588 byte order is Status-MSB-LSB, so we have to swap the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) first and the last of the 3 bytes block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) swap(tmpbuf[2], tmpbuf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* Map 'Invalid block E' to 'Invalid Block' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (blocknum == 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) blocknum = V4L2_RDS_BLOCK_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* And if are not in mmbs mode, then 'Block E' is also mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) to 'Invalid Block'. As far as I can tell MMBS is discontinued,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) and if there is ever a need to support E blocks, then please
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) contact the linux-media mailinglist. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) else if (!mmbs && blocknum == 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) blocknum = V4L2_RDS_BLOCK_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) tmp = blocknum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) tmp |= blocknum << 3; /* Received offset == Offset Name (OK ?) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if ((tmpbuf[2] & 0x03) == 0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) tmp |= V4L2_RDS_BLOCK_ERROR; /* uncorrectable error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) else if ((tmpbuf[2] & 0x03) != 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) tmp |= V4L2_RDS_BLOCK_CORRECTED; /* corrected error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) tmpbuf[2] = tmp; /* Is this enough ? Should we also check other bits ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) spin_lock_irqsave(&s->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) block_to_buf(s, tmpbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) spin_unlock_irqrestore(&s->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) s->data_available_for_read = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) wake_up_interruptible(&s->read_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static void saa6588_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) struct saa6588 *s = container_of(work, struct saa6588, work.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) saa6588_i2c_poll(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) schedule_delayed_work(&s->work, msecs_to_jiffies(20));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static void saa6588_configure(struct saa6588 *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) struct i2c_client *client = v4l2_get_subdevdata(&s->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) unsigned char buf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) buf[0] = cSyncRestart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (mmbs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) buf[0] |= cProcessingModeRBDS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) buf[1] = cFlywheelDefault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) switch (plvl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) buf[1] |= cPauseLevel_11mV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) buf[1] |= cPauseLevel_17mV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) buf[1] |= cPauseLevel_27mV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) buf[1] |= cPauseLevel_43mV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) default: /* nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) buf[2] = cQualityDetectDefault | cSelectOscFreqON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) switch (xtal) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) buf[2] |= cOscFreq_4332kHz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) buf[2] |= cOscFreq_8664kHz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) buf[2] |= cOscFreq_12996kHz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) buf[2] |= cOscFreq_17328kHz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) default: /* nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) dprintk(PREFIX "writing: 0w=0x%02x 1w=0x%02x 2w=0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) buf[0], buf[1], buf[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) rc = i2c_master_send(client, buf, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (rc != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) printk(PREFIX "i2c i/o error: rc == %d (should be 3)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static long saa6588_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) struct saa6588 *s = to_saa6588(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct saa6588_command *a = arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) /* --- close() for /dev/radio --- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) case SAA6588_CMD_CLOSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) s->data_available_for_read = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) wake_up_interruptible(&s->read_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) s->data_available_for_read = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) a->result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* --- read() for /dev/radio --- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) case SAA6588_CMD_READ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) read_from_buf(s, a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /* --- poll() for /dev/radio --- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) case SAA6588_CMD_POLL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) a->poll_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (s->data_available_for_read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) a->poll_mask |= EPOLLIN | EPOLLRDNORM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) poll_wait(a->instance, &s->read_queue, a->event_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /* nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return -ENOIOCTLCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static int saa6588_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct saa6588 *s = to_saa6588(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) vt->capability |= V4L2_TUNER_CAP_RDS | V4L2_TUNER_CAP_RDS_BLOCK_IO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if (s->sync)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) vt->rxsubchans |= V4L2_TUNER_SUB_RDS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static int saa6588_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *vt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct saa6588 *s = to_saa6588(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) saa6588_configure(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) static const struct v4l2_subdev_core_ops saa6588_core_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .ioctl = saa6588_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static const struct v4l2_subdev_tuner_ops saa6588_tuner_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) .g_tuner = saa6588_g_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .s_tuner = saa6588_s_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) static const struct v4l2_subdev_ops saa6588_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .core = &saa6588_core_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .tuner = &saa6588_tuner_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static int saa6588_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) struct saa6588 *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) v4l_info(client, "saa6588 found @ 0x%x (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) client->addr << 1, client->adapter->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) s = devm_kzalloc(&client->dev, sizeof(*s), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (s == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) s->buf_size = bufblocks * 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) s->buffer = devm_kzalloc(&client->dev, s->buf_size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (s->buffer == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) sd = &s->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) v4l2_i2c_subdev_init(sd, client, &saa6588_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) spin_lock_init(&s->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) s->block_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) s->wr_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) s->rd_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) s->last_blocknum = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) init_waitqueue_head(&s->read_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) s->data_available_for_read = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) saa6588_configure(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* start polling via eventd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) INIT_DELAYED_WORK(&s->work, saa6588_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) schedule_delayed_work(&s->work, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static int saa6588_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) struct saa6588 *s = to_saa6588(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) v4l2_device_unregister_subdev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) cancel_delayed_work_sync(&s->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) /* ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static const struct i2c_device_id saa6588_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) { "saa6588", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) MODULE_DEVICE_TABLE(i2c, saa6588_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static struct i2c_driver saa6588_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .name = "saa6588",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) .probe = saa6588_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) .remove = saa6588_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .id_table = saa6588_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) module_i2c_driver(saa6588_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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