^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * A V4L2 driver for OmniVision OV5647 cameras.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Based on Samsung S5K6AAFX SXGA 1/6" 1.3M CMOS Image Sensor driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2011 Sylwester Nawrocki <s.nawrocki@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on Omnivision OV7670 Camera Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2006-7 Jonathan Corbet <corbet@lwn.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2016, Synopsys, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * This program is distributed .as is. WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/of_graph.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <media/v4l2-fwnode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <media/v4l2-image-sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <media/v4l2-mediabus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define SENSOR_NAME "ov5647"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define MIPI_CTRL00_CLOCK_LANE_GATE BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define MIPI_CTRL00_BUS_IDLE BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define MIPI_CTRL00_CLOCK_LANE_DISABLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define OV5647_SW_STANDBY 0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define OV5647_SW_RESET 0x0103
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define OV5647_REG_CHIPID_H 0x300A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define OV5647_REG_CHIPID_L 0x300B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define OV5640_REG_PAD_OUT 0x300D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define OV5647_REG_FRAME_OFF_NUMBER 0x4202
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define OV5647_REG_MIPI_CTRL00 0x4800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define OV5647_REG_MIPI_CTRL14 0x4814
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define REG_TERM 0xfffe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define VAL_TERM 0xfe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define REG_DLY 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define OV5647_ROW_START 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define OV5647_ROW_START_MIN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define OV5647_ROW_START_MAX 2004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define OV5647_ROW_START_DEF 54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define OV5647_COLUMN_START 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define OV5647_COLUMN_START_MIN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define OV5647_COLUMN_START_MAX 2750
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define OV5647_COLUMN_START_DEF 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define OV5647_WINDOW_HEIGHT 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define OV5647_WINDOW_HEIGHT_MIN 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define OV5647_WINDOW_HEIGHT_MAX 2006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define OV5647_WINDOW_HEIGHT_DEF 1944
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define OV5647_WINDOW_WIDTH 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define OV5647_WINDOW_WIDTH_MIN 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define OV5647_WINDOW_WIDTH_MAX 2752
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define OV5647_WINDOW_WIDTH_DEF 2592
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct regval_list {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u16 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct ov5647 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct v4l2_subdev sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct media_pad pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct v4l2_mbus_framefmt format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned int width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned int height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int power_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct clk *xclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static inline struct ov5647 *to_state(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return container_of(sd, struct ov5647, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static struct regval_list sensor_oe_disable_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {0x3000, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {0x3001, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {0x3002, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static struct regval_list sensor_oe_enable_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {0x3000, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {0x3001, 0xff},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {0x3002, 0xe4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static struct regval_list ov5647_640x480[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {0x0100, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {0x0103, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {0x3034, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {0x3035, 0x21},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {0x3036, 0x46},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {0x303c, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {0x3106, 0xf5},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {0x3821, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {0x3820, 0x41},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {0x3827, 0xec},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {0x370c, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {0x3612, 0x59},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {0x3618, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {0x5000, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {0x5001, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {0x5002, 0x41},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {0x5003, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {0x5a00, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {0x3000, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {0x3001, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {0x3002, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {0x3016, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {0x3017, 0xe0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {0x3018, 0x44},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {0x301c, 0xf8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {0x301d, 0xf0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {0x3a18, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {0x3a19, 0xf8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {0x3c01, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {0x3b07, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {0x380c, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {0x380d, 0x68},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {0x380e, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {0x380f, 0xd8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {0x3814, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {0x3815, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {0x3708, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {0x3709, 0x52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {0x3808, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {0x3809, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {0x380a, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {0x380b, 0xE0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {0x3801, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {0x3802, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {0x3803, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {0x3804, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {0x3805, 0x3f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {0x3806, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {0x3807, 0xa1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {0x3811, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {0x3813, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {0x3630, 0x2e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {0x3632, 0xe2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {0x3633, 0x23},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {0x3634, 0x44},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {0x3636, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {0x3620, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {0x3621, 0xe0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {0x3600, 0x37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {0x3704, 0xa0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {0x3703, 0x5a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {0x3715, 0x78},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {0x3717, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {0x3731, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {0x370b, 0x60},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {0x3705, 0x1a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {0x3f05, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {0x3f06, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {0x3f01, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {0x3a08, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {0x3a09, 0x27},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {0x3a0a, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {0x3a0b, 0xf6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {0x3a0d, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {0x3a0e, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {0x3a0f, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {0x3a10, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {0x3a1b, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {0x3a1e, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {0x3a11, 0x60},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {0x3a1f, 0x28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {0x4001, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {0x4004, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {0x4000, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {0x4837, 0x24},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {0x4050, 0x6e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {0x4051, 0x8f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {0x0100, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static int ov5647_write(struct v4l2_subdev *sd, u16 reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) unsigned char data[3] = { reg >> 8, reg & 0xff, val};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ret = i2c_master_send(client, data, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) dev_dbg(&client->dev, "%s: i2c write error, reg: %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) __func__, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static int ov5647_read(struct v4l2_subdev *sd, u16 reg, u8 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) unsigned char data_w[2] = { reg >> 8, reg & 0xff };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) ret = i2c_master_send(client, data_w, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) dev_dbg(&client->dev, "%s: i2c write error, reg: %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) __func__, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ret = i2c_master_recv(client, val, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) dev_dbg(&client->dev, "%s: i2c read error, reg: %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) __func__, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int ov5647_write_array(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct regval_list *regs, int array_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) for (i = 0; i < array_size; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ret = ov5647_write(sd, regs[i].addr, regs[i].data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static int ov5647_set_virtual_channel(struct v4l2_subdev *sd, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) u8 channel_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) ret = ov5647_read(sd, OV5647_REG_MIPI_CTRL14, &channel_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) channel_id &= ~(3 << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return ov5647_write(sd, OV5647_REG_MIPI_CTRL14, channel_id | (channel << 6));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static int ov5647_stream_on(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, MIPI_CTRL00_BUS_IDLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) ret = ov5647_write(sd, OV5647_REG_FRAME_OFF_NUMBER, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return ov5647_write(sd, OV5640_REG_PAD_OUT, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static int ov5647_stream_off(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, MIPI_CTRL00_CLOCK_LANE_GATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) | MIPI_CTRL00_BUS_IDLE | MIPI_CTRL00_CLOCK_LANE_DISABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ret = ov5647_write(sd, OV5647_REG_FRAME_OFF_NUMBER, 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return ov5647_write(sd, OV5640_REG_PAD_OUT, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static int set_sw_standby(struct v4l2_subdev *sd, bool standby)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) u8 rdval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ret = ov5647_read(sd, OV5647_SW_STANDBY, &rdval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (standby)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) rdval &= ~0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) rdval |= 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return ov5647_write(sd, OV5647_SW_STANDBY, rdval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static int __sensor_init(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) u8 resetval, rdval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ret = ov5647_read(sd, OV5647_SW_STANDBY, &rdval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) ret = ov5647_write_array(sd, ov5647_640x480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ARRAY_SIZE(ov5647_640x480));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) dev_err(&client->dev, "write sensor default regs error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) ret = ov5647_set_virtual_channel(sd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) ret = ov5647_read(sd, OV5647_SW_STANDBY, &resetval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (!(resetval & 0x01)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) dev_err(&client->dev, "Device was in SW standby");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ret = ov5647_write(sd, OV5647_SW_STANDBY, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * stream off to make the clock lane into LP-11 state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return ov5647_stream_off(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static int ov5647_sensor_power(struct v4l2_subdev *sd, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct ov5647 *ov5647 = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) mutex_lock(&ov5647->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (on && !ov5647->power_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) dev_dbg(&client->dev, "OV5647 power on\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) ret = clk_prepare_enable(ov5647->xclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) dev_err(&client->dev, "clk prepare enable failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) ret = ov5647_write_array(sd, sensor_oe_enable_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ARRAY_SIZE(sensor_oe_enable_regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) clk_disable_unprepare(ov5647->xclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) "write sensor_oe_enable_regs error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) ret = __sensor_init(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) clk_disable_unprepare(ov5647->xclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) "Camera not available, check Power\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) } else if (!on && ov5647->power_count == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) dev_dbg(&client->dev, "OV5647 power off\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ret = ov5647_write_array(sd, sensor_oe_disable_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) ARRAY_SIZE(sensor_oe_disable_regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) dev_dbg(&client->dev, "disable oe failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ret = set_sw_standby(sd, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) dev_dbg(&client->dev, "soft stby failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) clk_disable_unprepare(ov5647->xclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* Update the power count. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) ov5647->power_count += on ? 1 : -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) WARN_ON(ov5647->power_count < 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) mutex_unlock(&ov5647->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) #ifdef CONFIG_VIDEO_ADV_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static int ov5647_sensor_get_register(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct v4l2_dbg_register *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) ret = ov5647_read(sd, reg->reg & 0xff, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) reg->val = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) reg->size = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static int ov5647_sensor_set_register(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) const struct v4l2_dbg_register *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return ov5647_write(sd, reg->reg & 0xff, reg->val & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) * Subdev core operations registration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static const struct v4l2_subdev_core_ops ov5647_subdev_core_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .s_power = ov5647_sensor_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) #ifdef CONFIG_VIDEO_ADV_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .g_register = ov5647_sensor_get_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .s_register = ov5647_sensor_set_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static int ov5647_s_stream(struct v4l2_subdev *sd, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return ov5647_stream_on(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) return ov5647_stream_off(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static const struct v4l2_subdev_video_ops ov5647_subdev_video_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .s_stream = ov5647_s_stream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static int ov5647_enum_mbus_code(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) struct v4l2_subdev_mbus_code_enum *code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (code->index > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) code->code = MEDIA_BUS_FMT_SBGGR8_1X8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) static const struct v4l2_subdev_pad_ops ov5647_subdev_pad_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .enum_mbus_code = ov5647_enum_mbus_code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) static const struct v4l2_subdev_ops ov5647_subdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .core = &ov5647_subdev_core_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .video = &ov5647_subdev_video_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .pad = &ov5647_subdev_pad_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static int ov5647_detect(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) u8 read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) ret = ov5647_write(sd, OV5647_SW_RESET, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) ret = ov5647_read(sd, OV5647_REG_CHIPID_H, &read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (read != 0x56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) dev_err(&client->dev, "ID High expected 0x56 got %x", read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) ret = ov5647_read(sd, OV5647_REG_CHIPID_L, &read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (read != 0x47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) dev_err(&client->dev, "ID Low expected 0x47 got %x", read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return ov5647_write(sd, OV5647_SW_RESET, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static int ov5647_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) struct v4l2_mbus_framefmt *format =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) v4l2_subdev_get_try_format(sd, fh->pad, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) struct v4l2_rect *crop =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) v4l2_subdev_get_try_crop(sd, fh->pad, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) crop->left = OV5647_COLUMN_START_DEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) crop->top = OV5647_ROW_START_DEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) crop->width = OV5647_WINDOW_WIDTH_DEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) crop->height = OV5647_WINDOW_HEIGHT_DEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) format->code = MEDIA_BUS_FMT_SBGGR8_1X8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) format->width = OV5647_WINDOW_WIDTH_DEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) format->height = OV5647_WINDOW_HEIGHT_DEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) format->field = V4L2_FIELD_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) format->colorspace = V4L2_COLORSPACE_SRGB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) static const struct v4l2_subdev_internal_ops ov5647_subdev_internal_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .open = ov5647_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) static int ov5647_parse_dt(struct device_node *np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) struct device_node *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) ep = of_graph_get_next_endpoint(np, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) if (!ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &bus_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) of_node_put(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static int ov5647_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) struct ov5647 *sensor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) struct device_node *np = client->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) u32 xclk_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (!sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (IS_ENABLED(CONFIG_OF) && np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) ret = ov5647_parse_dt(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) dev_err(dev, "DT parsing error: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /* get system clock (xclk) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) sensor->xclk = devm_clk_get(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (IS_ERR(sensor->xclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) dev_err(dev, "could not get xclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) return PTR_ERR(sensor->xclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) xclk_freq = clk_get_rate(sensor->xclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (xclk_freq != 25000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) dev_err(dev, "Unsupported clock frequency: %u\n", xclk_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) mutex_init(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) sd = &sensor->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) v4l2_i2c_subdev_init(sd, client, &ov5647_subdev_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) sensor->sd.internal_ops = &ov5647_subdev_internal_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) ret = media_entity_pads_init(&sd->entity, 1, &sensor->pad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) goto mutex_remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) ret = ov5647_detect(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) ret = v4l2_async_register_subdev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) dev_dbg(dev, "OmniVision OV5647 camera driver probed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) media_entity_cleanup(&sd->entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) mutex_remove:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) mutex_destroy(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) static int ov5647_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) struct ov5647 *ov5647 = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) v4l2_async_unregister_subdev(&ov5647->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) media_entity_cleanup(&ov5647->sd.entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) v4l2_device_unregister_subdev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) mutex_destroy(&ov5647->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static const struct i2c_device_id ov5647_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) { "ov5647", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) MODULE_DEVICE_TABLE(i2c, ov5647_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) #if IS_ENABLED(CONFIG_OF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) static const struct of_device_id ov5647_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) { .compatible = "ovti,ov5647" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) MODULE_DEVICE_TABLE(of, ov5647_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) static struct i2c_driver ov5647_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) .of_match_table = of_match_ptr(ov5647_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) .name = SENSOR_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .probe_new = ov5647_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .remove = ov5647_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .id_table = ov5647_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) module_i2c_driver(ov5647_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) MODULE_DESCRIPTION("A low-level driver for OmniVision ov5647 sensors");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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