^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Omnivision OV2680 CMOS Image Sensor driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2018 Linaro Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on OV5640 Sensor Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2014-2017 Mentor Graphics Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <media/v4l2-subdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define OV2680_XVCLK_VALUE 24000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define OV2680_CHIP_ID 0x2680
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define OV2680_REG_STREAM_CTRL 0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define OV2680_REG_SOFT_RESET 0x0103
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define OV2680_REG_CHIP_ID_HIGH 0x300a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define OV2680_REG_CHIP_ID_LOW 0x300b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define OV2680_REG_R_MANUAL 0x3503
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define OV2680_REG_GAIN_PK 0x350a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define OV2680_REG_EXPOSURE_PK_HIGH 0x3500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define OV2680_REG_TIMING_HTS 0x380c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define OV2680_REG_TIMING_VTS 0x380e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define OV2680_REG_FORMAT1 0x3820
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define OV2680_REG_FORMAT2 0x3821
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define OV2680_REG_ISP_CTRL00 0x5080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define OV2680_FRAME_RATE 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define OV2680_REG_VALUE_8BIT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define OV2680_REG_VALUE_16BIT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define OV2680_REG_VALUE_24BIT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define OV2680_WIDTH_MAX 1600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define OV2680_HEIGHT_MAX 1200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) enum ov2680_mode_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) OV2680_MODE_QUXGA_800_600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) OV2680_MODE_720P_1280_720,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) OV2680_MODE_UXGA_1600_1200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) OV2680_MODE_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct reg_value {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u16 reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static const char * const ov2680_supply_name[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) "DOVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) "DVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) "AVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define OV2680_NUM_SUPPLIES ARRAY_SIZE(ov2680_supply_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct ov2680_mode_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) enum ov2680_mode_id id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u32 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) u32 height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) const struct reg_value *reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) u32 reg_data_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct ov2680_ctrls {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct v4l2_ctrl_handler handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct v4l2_ctrl *auto_exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct v4l2_ctrl *exposure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct v4l2_ctrl *auto_gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct v4l2_ctrl *gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct v4l2_ctrl *hflip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct v4l2_ctrl *vflip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct v4l2_ctrl *test_pattern;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct ov2680_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct i2c_client *i2c_client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct v4l2_subdev sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct media_pad pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct clk *xvclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u32 xvclk_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct regulator_bulk_data supplies[OV2680_NUM_SUPPLIES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct gpio_desc *reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct mutex lock; /* protect members */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) bool mode_pending_changes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) bool is_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) bool is_streaming;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct ov2680_ctrls ctrls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct v4l2_mbus_framefmt fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct v4l2_fract frame_interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) const struct ov2680_mode_info *current_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static const char * const test_pattern_menu[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) "Disabled",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) "Color Bars",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) "Random Data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) "Square",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) "Black Image",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static const int ov2680_hv_flip_bayer_order[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) MEDIA_BUS_FMT_SBGGR10_1X10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) MEDIA_BUS_FMT_SGRBG10_1X10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) MEDIA_BUS_FMT_SGBRG10_1X10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MEDIA_BUS_FMT_SRGGB10_1X10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static const struct reg_value ov2680_setting_30fps_QUXGA_800_600[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {0x3086, 0x01}, {0x370a, 0x23}, {0x3808, 0x03}, {0x3809, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {0x380a, 0x02}, {0x380b, 0x58}, {0x380c, 0x06}, {0x380d, 0xac},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {0x380e, 0x02}, {0x380f, 0x84}, {0x3811, 0x04}, {0x3813, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {0x3814, 0x31}, {0x3815, 0x31}, {0x3820, 0xc0}, {0x4008, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {0x4009, 0x03}, {0x4837, 0x1e}, {0x3501, 0x4e}, {0x3502, 0xe0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static const struct reg_value ov2680_setting_30fps_720P_1280_720[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {0x3086, 0x00}, {0x3808, 0x05}, {0x3809, 0x00}, {0x380a, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {0x380b, 0xd0}, {0x380c, 0x06}, {0x380d, 0xa8}, {0x380e, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {0x380f, 0x0e}, {0x3811, 0x08}, {0x3813, 0x06}, {0x3814, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {0x3815, 0x11}, {0x3820, 0xc0}, {0x4008, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const struct reg_value ov2680_setting_30fps_UXGA_1600_1200[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {0x3086, 0x00}, {0x3501, 0x4e}, {0x3502, 0xe0}, {0x3808, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {0x3809, 0x40}, {0x380a, 0x04}, {0x380b, 0xb0}, {0x380c, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {0x380d, 0xa8}, {0x380e, 0x05}, {0x380f, 0x0e}, {0x3811, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {0x3813, 0x00}, {0x3814, 0x11}, {0x3815, 0x11}, {0x3820, 0xc0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {0x4008, 0x00}, {0x4837, 0x18}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const struct ov2680_mode_info ov2680_mode_init_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) "mode_quxga_800_600", OV2680_MODE_QUXGA_800_600, 800, 600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ov2680_setting_30fps_QUXGA_800_600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) ARRAY_SIZE(ov2680_setting_30fps_QUXGA_800_600),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static const struct ov2680_mode_info ov2680_mode_data[OV2680_MODE_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {"mode_quxga_800_600", OV2680_MODE_QUXGA_800_600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 800, 600, ov2680_setting_30fps_QUXGA_800_600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) ARRAY_SIZE(ov2680_setting_30fps_QUXGA_800_600)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {"mode_720p_1280_720", OV2680_MODE_720P_1280_720,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 1280, 720, ov2680_setting_30fps_720P_1280_720,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ARRAY_SIZE(ov2680_setting_30fps_720P_1280_720)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {"mode_uxga_1600_1200", OV2680_MODE_UXGA_1600_1200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 1600, 1200, ov2680_setting_30fps_UXGA_1600_1200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ARRAY_SIZE(ov2680_setting_30fps_UXGA_1600_1200)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static struct ov2680_dev *to_ov2680_dev(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return container_of(sd, struct ov2680_dev, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static struct device *ov2680_to_dev(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return &sensor->i2c_client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return &container_of(ctrl->handler, struct ov2680_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ctrls.handler)->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int __ov2680_write_reg(struct ov2680_dev *sensor, u16 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) unsigned int len, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct i2c_client *client = sensor->i2c_client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) u8 buf[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (len > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) put_unaligned_be16(reg, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ret = i2c_master_send(client, buf, len + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (ret != len + 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) dev_err(&client->dev, "write error: reg=0x%4x: %d\n", reg, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define ov2680_write_reg(s, r, v) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) __ov2680_write_reg(s, r, OV2680_REG_VALUE_8BIT, v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define ov2680_write_reg16(s, r, v) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) __ov2680_write_reg(s, r, OV2680_REG_VALUE_16BIT, v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define ov2680_write_reg24(s, r, v) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) __ov2680_write_reg(s, r, OV2680_REG_VALUE_24BIT, v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static int __ov2680_read_reg(struct ov2680_dev *sensor, u16 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) unsigned int len, u32 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct i2c_client *client = sensor->i2c_client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) struct i2c_msg msgs[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) u8 addr_buf[2] = { reg >> 8, reg & 0xff };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) u8 data_buf[4] = { 0, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (len > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) msgs[0].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) msgs[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) msgs[0].len = ARRAY_SIZE(addr_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) msgs[0].buf = addr_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) msgs[1].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) msgs[1].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) msgs[1].len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) msgs[1].buf = &data_buf[4 - len];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (ret != ARRAY_SIZE(msgs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) dev_err(&client->dev, "read error: reg=0x%4x: %d\n", reg, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) *val = get_unaligned_be32(data_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define ov2680_read_reg(s, r, v) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) __ov2680_read_reg(s, r, OV2680_REG_VALUE_8BIT, v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define ov2680_read_reg16(s, r, v) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) __ov2680_read_reg(s, r, OV2680_REG_VALUE_16BIT, v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define ov2680_read_reg24(s, r, v) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) __ov2680_read_reg(s, r, OV2680_REG_VALUE_24BIT, v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static int ov2680_mod_reg(struct ov2680_dev *sensor, u16 reg, u8 mask, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) u32 readval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ret = ov2680_read_reg(sensor, reg, &readval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) readval &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) val &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) val |= readval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return ov2680_write_reg(sensor, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static int ov2680_load_regs(struct ov2680_dev *sensor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) const struct ov2680_mode_info *mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) const struct reg_value *regs = mode->reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) u16 reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) reg_addr = regs->reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) val = regs->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ret = ov2680_write_reg(sensor, reg_addr, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static void ov2680_power_up(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (!sensor->reset_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) gpiod_set_value(sensor->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) usleep_range(5000, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static void ov2680_power_down(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (!sensor->reset_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) gpiod_set_value(sensor->reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) usleep_range(5000, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static int ov2680_bayer_order(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) u32 format1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) u32 format2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) u32 hv_flip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ret = ov2680_read_reg(sensor, OV2680_REG_FORMAT1, &format1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ret = ov2680_read_reg(sensor, OV2680_REG_FORMAT2, &format2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) hv_flip = (format2 & BIT(2) << 1) | (format1 & BIT(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) sensor->fmt.code = ov2680_hv_flip_bayer_order[hv_flip];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static int ov2680_vflip_enable(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) ret = ov2680_mod_reg(sensor, OV2680_REG_FORMAT1, BIT(2), BIT(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return ov2680_bayer_order(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static int ov2680_vflip_disable(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) ret = ov2680_mod_reg(sensor, OV2680_REG_FORMAT1, BIT(2), BIT(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return ov2680_bayer_order(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static int ov2680_hflip_enable(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) ret = ov2680_mod_reg(sensor, OV2680_REG_FORMAT2, BIT(2), BIT(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) return ov2680_bayer_order(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static int ov2680_hflip_disable(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ret = ov2680_mod_reg(sensor, OV2680_REG_FORMAT2, BIT(2), BIT(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return ov2680_bayer_order(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static int ov2680_test_pattern_set(struct ov2680_dev *sensor, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (!value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return ov2680_mod_reg(sensor, OV2680_REG_ISP_CTRL00, BIT(7), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) ret = ov2680_mod_reg(sensor, OV2680_REG_ISP_CTRL00, 0x03, value - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) ret = ov2680_mod_reg(sensor, OV2680_REG_ISP_CTRL00, BIT(7), BIT(7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static int ov2680_gain_set(struct ov2680_dev *sensor, bool auto_gain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct ov2680_ctrls *ctrls = &sensor->ctrls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) u32 gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) ret = ov2680_mod_reg(sensor, OV2680_REG_R_MANUAL, BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) auto_gain ? 0 : BIT(1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (auto_gain || !ctrls->gain->is_new)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) gain = ctrls->gain->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) ret = ov2680_write_reg16(sensor, OV2680_REG_GAIN_PK, gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static int ov2680_gain_get(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) u32 gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) ret = ov2680_read_reg16(sensor, OV2680_REG_GAIN_PK, &gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static int ov2680_exposure_set(struct ov2680_dev *sensor, bool auto_exp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct ov2680_ctrls *ctrls = &sensor->ctrls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) u32 exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) ret = ov2680_mod_reg(sensor, OV2680_REG_R_MANUAL, BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) auto_exp ? 0 : BIT(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (auto_exp || !ctrls->exposure->is_new)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) exp = (u32)ctrls->exposure->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) exp <<= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) return ov2680_write_reg24(sensor, OV2680_REG_EXPOSURE_PK_HIGH, exp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) static int ov2680_exposure_get(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) u32 exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) ret = ov2680_read_reg24(sensor, OV2680_REG_EXPOSURE_PK_HIGH, &exp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return exp >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static int ov2680_stream_enable(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) return ov2680_write_reg(sensor, OV2680_REG_STREAM_CTRL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static int ov2680_stream_disable(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return ov2680_write_reg(sensor, OV2680_REG_STREAM_CTRL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static int ov2680_mode_set(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) struct ov2680_ctrls *ctrls = &sensor->ctrls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) ret = ov2680_gain_set(sensor, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) ret = ov2680_exposure_set(sensor, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) ret = ov2680_load_regs(sensor, sensor->current_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (ctrls->auto_gain->val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) ret = ov2680_gain_set(sensor, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) if (ctrls->auto_exp->val == V4L2_EXPOSURE_AUTO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ret = ov2680_exposure_set(sensor, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) sensor->mode_pending_changes = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static int ov2680_mode_restore(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) ret = ov2680_load_regs(sensor, &ov2680_mode_init_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return ov2680_mode_set(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static int ov2680_power_off(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (!sensor->is_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) clk_disable_unprepare(sensor->xvclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) ov2680_power_down(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) regulator_bulk_disable(OV2680_NUM_SUPPLIES, sensor->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) sensor->is_enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) static int ov2680_power_on(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) struct device *dev = ov2680_to_dev(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) if (sensor->is_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) ret = regulator_bulk_enable(OV2680_NUM_SUPPLIES, sensor->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) dev_err(dev, "failed to enable regulators: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (!sensor->reset_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) ret = ov2680_write_reg(sensor, OV2680_REG_SOFT_RESET, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) dev_err(dev, "sensor soft reset failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) ov2680_power_down(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) ov2680_power_up(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) ret = clk_prepare_enable(sensor->xvclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) sensor->is_enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /* Set clock lane into LP-11 state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) ov2680_stream_enable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) ov2680_stream_disable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static int ov2680_s_power(struct v4l2_subdev *sd, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) mutex_lock(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ret = ov2680_power_on(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) ret = ov2680_power_off(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) mutex_unlock(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (on && ret == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) ret = ov2680_mode_restore(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static int ov2680_s_g_frame_interval(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) struct v4l2_subdev_frame_interval *fi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) mutex_lock(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) fi->interval = sensor->frame_interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) mutex_unlock(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static int ov2680_s_stream(struct v4l2_subdev *sd, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) mutex_lock(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (sensor->is_streaming == !!enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) if (enable && sensor->mode_pending_changes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) ret = ov2680_mode_set(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) ret = ov2680_stream_enable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) ret = ov2680_stream_disable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) sensor->is_streaming = !!enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) mutex_unlock(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static int ov2680_enum_mbus_code(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) struct v4l2_subdev_mbus_code_enum *code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) if (code->pad != 0 || code->index != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) code->code = sensor->fmt.code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static int ov2680_get_fmt(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) struct v4l2_subdev_format *format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) struct v4l2_mbus_framefmt *fmt = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (format->pad != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) mutex_lock(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg, format->pad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) fmt = &sensor->fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) if (fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) format->format = *fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) mutex_unlock(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) static int ov2680_set_fmt(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) struct v4l2_subdev_format *format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) struct v4l2_mbus_framefmt *fmt = &format->format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) struct v4l2_mbus_framefmt *try_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) const struct ov2680_mode_info *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (format->pad != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) mutex_lock(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) if (sensor->is_streaming) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) mode = v4l2_find_nearest_size(ov2680_mode_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) ARRAY_SIZE(ov2680_mode_data), width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) height, fmt->width, fmt->height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) if (!mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) try_fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) format->format = *try_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) fmt->width = mode->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) fmt->height = mode->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) fmt->code = sensor->fmt.code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) fmt->colorspace = sensor->fmt.colorspace;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) sensor->current_mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) sensor->fmt = format->format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) sensor->mode_pending_changes = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) mutex_unlock(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) static int ov2680_init_cfg(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) struct v4l2_subdev_pad_config *cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) struct v4l2_subdev_format fmt = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) .which = cfg ? V4L2_SUBDEV_FORMAT_TRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) : V4L2_SUBDEV_FORMAT_ACTIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) .format = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) .width = 800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) .height = 600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) return ov2680_set_fmt(sd, cfg, &fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) static int ov2680_enum_frame_size(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) struct v4l2_subdev_frame_size_enum *fse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) int index = fse->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) if (index >= OV2680_MODE_MAX || index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) fse->min_width = ov2680_mode_data[index].width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) fse->min_height = ov2680_mode_data[index].height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) fse->max_width = ov2680_mode_data[index].width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) fse->max_height = ov2680_mode_data[index].height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) static int ov2680_enum_frame_interval(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) struct v4l2_subdev_frame_interval_enum *fie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) struct v4l2_fract tpf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) if (fie->index >= OV2680_MODE_MAX || fie->width > OV2680_WIDTH_MAX ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) fie->height > OV2680_HEIGHT_MAX ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) fie->which > V4L2_SUBDEV_FORMAT_ACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) tpf.denominator = OV2680_FRAME_RATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) tpf.numerator = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) fie->interval = tpf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) static int ov2680_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) struct ov2680_ctrls *ctrls = &sensor->ctrls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) if (!sensor->is_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) case V4L2_CID_GAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) val = ov2680_gain_get(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) ctrls->gain->val = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) case V4L2_CID_EXPOSURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) val = ov2680_exposure_get(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) ctrls->exposure->val = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) static int ov2680_s_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) struct ov2680_ctrls *ctrls = &sensor->ctrls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) if (!sensor->is_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) case V4L2_CID_AUTOGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) return ov2680_gain_set(sensor, !!ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) case V4L2_CID_GAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) return ov2680_gain_set(sensor, !!ctrls->auto_gain->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) case V4L2_CID_EXPOSURE_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) return ov2680_exposure_set(sensor, !!ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) case V4L2_CID_EXPOSURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) return ov2680_exposure_set(sensor, !!ctrls->auto_exp->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) case V4L2_CID_VFLIP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) if (sensor->is_streaming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) if (ctrl->val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) return ov2680_vflip_enable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) return ov2680_vflip_disable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) case V4L2_CID_HFLIP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) if (sensor->is_streaming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) if (ctrl->val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) return ov2680_hflip_enable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) return ov2680_hflip_disable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) case V4L2_CID_TEST_PATTERN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) return ov2680_test_pattern_set(sensor, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) static const struct v4l2_ctrl_ops ov2680_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) .g_volatile_ctrl = ov2680_g_volatile_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) .s_ctrl = ov2680_s_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) static const struct v4l2_subdev_core_ops ov2680_core_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) .s_power = ov2680_s_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) static const struct v4l2_subdev_video_ops ov2680_video_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) .g_frame_interval = ov2680_s_g_frame_interval,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) .s_frame_interval = ov2680_s_g_frame_interval,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) .s_stream = ov2680_s_stream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) static const struct v4l2_subdev_pad_ops ov2680_pad_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) .init_cfg = ov2680_init_cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) .enum_mbus_code = ov2680_enum_mbus_code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) .get_fmt = ov2680_get_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) .set_fmt = ov2680_set_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) .enum_frame_size = ov2680_enum_frame_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) .enum_frame_interval = ov2680_enum_frame_interval,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) static const struct v4l2_subdev_ops ov2680_subdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) .core = &ov2680_core_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) .video = &ov2680_video_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) .pad = &ov2680_pad_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) static int ov2680_mode_init(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) const struct ov2680_mode_info *init_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) /* set initial mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) sensor->fmt.code = MEDIA_BUS_FMT_SBGGR10_1X10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) sensor->fmt.width = 800;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) sensor->fmt.height = 600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) sensor->fmt.field = V4L2_FIELD_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) sensor->fmt.colorspace = V4L2_COLORSPACE_SRGB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) sensor->frame_interval.denominator = OV2680_FRAME_RATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) sensor->frame_interval.numerator = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) init_mode = &ov2680_mode_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) sensor->current_mode = init_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) sensor->mode_pending_changes = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) static int ov2680_v4l2_register(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) const struct v4l2_ctrl_ops *ops = &ov2680_ctrl_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) struct ov2680_ctrls *ctrls = &sensor->ctrls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) struct v4l2_ctrl_handler *hdl = &ctrls->handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) v4l2_i2c_subdev_init(&sensor->sd, sensor->i2c_client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) &ov2680_subdev_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) sensor->sd.flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) v4l2_ctrl_handler_init(hdl, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) hdl->lock = &sensor->lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, 0, 1, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, 0, 1, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) ctrls->test_pattern = v4l2_ctrl_new_std_menu_items(hdl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) &ov2680_ctrl_ops, V4L2_CID_TEST_PATTERN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) ARRAY_SIZE(test_pattern_menu) - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) 0, 0, test_pattern_menu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) V4L2_CID_EXPOSURE_AUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) V4L2_EXPOSURE_MANUAL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) V4L2_EXPOSURE_AUTO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) 0, 32767, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) 0, 1, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, 0, 2047, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) if (hdl->error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) ret = hdl->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) goto cleanup_entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) sensor->sd.ctrl_handler = hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) ret = v4l2_async_register_subdev(&sensor->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) goto cleanup_entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) cleanup_entity:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) media_entity_cleanup(&sensor->sd.entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) v4l2_ctrl_handler_free(hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) static int ov2680_get_regulators(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) for (i = 0; i < OV2680_NUM_SUPPLIES; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) sensor->supplies[i].supply = ov2680_supply_name[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) return devm_regulator_bulk_get(&sensor->i2c_client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) OV2680_NUM_SUPPLIES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) sensor->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) static int ov2680_check_id(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) struct device *dev = ov2680_to_dev(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) u32 chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) ov2680_power_on(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) ret = ov2680_read_reg16(sensor, OV2680_REG_CHIP_ID_HIGH, &chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) dev_err(dev, "failed to read chip id high\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) if (chip_id != OV2680_CHIP_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) dev_err(dev, "chip id: 0x%04x does not match expected 0x%04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) chip_id, OV2680_CHIP_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) static int ov2680_parse_dt(struct ov2680_dev *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) struct device *dev = ov2680_to_dev(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) ret = PTR_ERR_OR_ZERO(sensor->reset_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) dev_dbg(dev, "error while getting reset gpio: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) sensor->xvclk = devm_clk_get(dev, "xvclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) if (IS_ERR(sensor->xvclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) dev_err(dev, "xvclk clock missing or invalid\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) return PTR_ERR(sensor->xvclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) sensor->xvclk_freq = clk_get_rate(sensor->xvclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) if (sensor->xvclk_freq != OV2680_XVCLK_VALUE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) dev_err(dev, "wrong xvclk frequency %d HZ, expected: %d Hz\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) sensor->xvclk_freq, OV2680_XVCLK_VALUE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) static int ov2680_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) struct ov2680_dev *sensor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) if (!sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) sensor->i2c_client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) ret = ov2680_parse_dt(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) ret = ov2680_mode_init(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) ret = ov2680_get_regulators(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) dev_err(dev, "failed to get regulators\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) mutex_init(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) ret = ov2680_check_id(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) goto lock_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) ret = ov2680_v4l2_register(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) goto lock_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) dev_info(dev, "ov2680 init correctly\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) lock_destroy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) dev_err(dev, "ov2680 init fail: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) mutex_destroy(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) static int ov2680_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) v4l2_async_unregister_subdev(&sensor->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) mutex_destroy(&sensor->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) media_entity_cleanup(&sensor->sd.entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) v4l2_ctrl_handler_free(&sensor->ctrls.handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) static int __maybe_unused ov2680_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) if (sensor->is_streaming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) ov2680_stream_disable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) static int __maybe_unused ov2680_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) struct ov2680_dev *sensor = to_ov2680_dev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) if (sensor->is_streaming) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) ret = ov2680_stream_enable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) goto stream_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) stream_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) ov2680_stream_disable(sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) sensor->is_streaming = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) static const struct dev_pm_ops ov2680_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) SET_SYSTEM_SLEEP_PM_OPS(ov2680_suspend, ov2680_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) static const struct of_device_id ov2680_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) { .compatible = "ovti,ov2680" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) MODULE_DEVICE_TABLE(of, ov2680_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) static struct i2c_driver ov2680_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) .name = "ov2680",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) .pm = &ov2680_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) .of_match_table = of_match_ptr(ov2680_dt_ids),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) .probe_new = ov2680_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) .remove = ov2680_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) module_i2c_driver(ov2680_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) MODULE_AUTHOR("Rui Miguel Silva <rui.silva@linaro.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) MODULE_DESCRIPTION("OV2680 CMOS Image Sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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