Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * drivers/media/i2c/lm3646.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * General device driver for TI lm3646, Dual FLASH LED Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2014 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Contact: Daniel Jeong <gshark.jeong@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *			Ldd-Mlp <ldd-mlp@list.ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <media/i2c/lm3646.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /* registers definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define REG_ENABLE		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define REG_TORCH_BR	0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define REG_FLASH_BR	0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define REG_FLASH_TOUT	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define REG_FLAG		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define REG_STROBE_SRC	0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define REG_LED1_FLASH_BR 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define REG_LED1_TORCH_BR 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define MASK_ENABLE		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define MASK_TORCH_BR	0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define MASK_FLASH_BR	0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define MASK_FLASH_TOUT	0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define MASK_FLAG		0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define MASK_STROBE_SRC	0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) /* Fault Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define FAULT_TIMEOUT	(1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define FAULT_SHORT_CIRCUIT	(1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define FAULT_UVLO		(1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define FAULT_IVFM		(1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define FAULT_OCP		(1<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define FAULT_OVERTEMP	(1<<5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define FAULT_NTC_TRIP	(1<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define FAULT_OVP		(1<<7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) enum led_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	MODE_SHDN = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	MODE_TORCH = 0x2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	MODE_FLASH = 0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * struct lm3646_flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  * @pdata: platform data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  * @regmap: reg. map for i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * @lock: muxtex for serial access.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * @led_mode: V4L2 LED mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  * @ctrls_led: V4L2 controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * @subdev_led: V4L2 subdev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  * @mode_reg : mode register value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) struct lm3646_flash {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct lm3646_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct v4l2_ctrl_handler ctrls_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	struct v4l2_subdev subdev_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	u8 mode_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define to_lm3646_flash(_ctrl)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	container_of(_ctrl->handler, struct lm3646_flash, ctrls_led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) /* enable mode control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int lm3646_mode_ctrl(struct lm3646_flash *flash,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			    enum v4l2_flash_led_mode led_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	switch (led_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	case V4L2_FLASH_LED_MODE_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		return regmap_write(flash->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 				    REG_ENABLE, flash->mode_reg | MODE_SHDN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	case V4L2_FLASH_LED_MODE_TORCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		return regmap_write(flash->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 				    REG_ENABLE, flash->mode_reg | MODE_TORCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	case V4L2_FLASH_LED_MODE_FLASH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		return regmap_write(flash->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 				    REG_ENABLE, flash->mode_reg | MODE_FLASH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) /* V4L2 controls  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static int lm3646_get_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	struct lm3646_flash *flash = to_lm3646_flash(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	unsigned int reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	if (ctrl->id != V4L2_CID_FLASH_FAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	rval = regmap_read(flash->regmap, REG_FLAG, &reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	if (rval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	ctrl->val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	if (reg_val & FAULT_TIMEOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		ctrl->val |= V4L2_FLASH_FAULT_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	if (reg_val & FAULT_SHORT_CIRCUIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		ctrl->val |= V4L2_FLASH_FAULT_SHORT_CIRCUIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (reg_val & FAULT_UVLO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		ctrl->val |= V4L2_FLASH_FAULT_UNDER_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	if (reg_val & FAULT_IVFM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		ctrl->val |= V4L2_FLASH_FAULT_INPUT_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	if (reg_val & FAULT_OCP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		ctrl->val |= V4L2_FLASH_FAULT_OVER_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	if (reg_val & FAULT_OVERTEMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		ctrl->val |= V4L2_FLASH_FAULT_OVER_TEMPERATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	if (reg_val & FAULT_NTC_TRIP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		ctrl->val |= V4L2_FLASH_FAULT_LED_OVER_TEMPERATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	if (reg_val & FAULT_OVP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		ctrl->val |= V4L2_FLASH_FAULT_OVER_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int lm3646_set_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	struct lm3646_flash *flash = to_lm3646_flash(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	unsigned int reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	case V4L2_CID_FLASH_LED_MODE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		if (ctrl->val != V4L2_FLASH_LED_MODE_FLASH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			return lm3646_mode_ctrl(flash, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		/* switch to SHDN mode before flash strobe on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		return lm3646_mode_ctrl(flash, V4L2_FLASH_LED_MODE_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	case V4L2_CID_FLASH_STROBE_SOURCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		return regmap_update_bits(flash->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 					  REG_STROBE_SRC, MASK_STROBE_SRC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 					  (ctrl->val) << 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	case V4L2_CID_FLASH_STROBE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		/* read and check current mode of chip to start flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		rval = regmap_read(flash->regmap, REG_ENABLE, &reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		if (rval < 0 || ((reg_val & MASK_ENABLE) != MODE_SHDN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		/* flash on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		return lm3646_mode_ctrl(flash, V4L2_FLASH_LED_MODE_FLASH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	case V4L2_CID_FLASH_STROBE_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		 * flash mode will be turned automatically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		 * from FLASH mode to SHDN mode after flash duration timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		 * read and check current mode of chip to stop flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		rval = regmap_read(flash->regmap, REG_ENABLE, &reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		if (rval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		if ((reg_val & MASK_ENABLE) == MODE_FLASH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			return lm3646_mode_ctrl(flash,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 						V4L2_FLASH_LED_MODE_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	case V4L2_CID_FLASH_TIMEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		return regmap_update_bits(flash->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 					  REG_FLASH_TOUT, MASK_FLASH_TOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 					  LM3646_FLASH_TOUT_ms_TO_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 					  (ctrl->val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	case V4L2_CID_FLASH_INTENSITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return regmap_update_bits(flash->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 					  REG_FLASH_BR, MASK_FLASH_BR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 					  LM3646_TOTAL_FLASH_BRT_uA_TO_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 					  (ctrl->val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	case V4L2_CID_FLASH_TORCH_INTENSITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		return regmap_update_bits(flash->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 					  REG_TORCH_BR, MASK_TORCH_BR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 					  LM3646_TOTAL_TORCH_BRT_uA_TO_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 					  (ctrl->val) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static const struct v4l2_ctrl_ops lm3646_led_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	.g_volatile_ctrl = lm3646_get_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	.s_ctrl = lm3646_set_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static int lm3646_init_controls(struct lm3646_flash *flash)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	struct v4l2_ctrl *fault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	struct v4l2_ctrl_handler *hdl = &flash->ctrls_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	const struct v4l2_ctrl_ops *ops = &lm3646_led_ctrl_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	v4l2_ctrl_handler_init(hdl, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	/* flash mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	v4l2_ctrl_new_std_menu(hdl, ops, V4L2_CID_FLASH_LED_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			       V4L2_FLASH_LED_MODE_TORCH, ~0x7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 			       V4L2_FLASH_LED_MODE_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	/* flash source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	v4l2_ctrl_new_std_menu(hdl, ops, V4L2_CID_FLASH_STROBE_SOURCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			       0x1, ~0x3, V4L2_FLASH_STROBE_SOURCE_SOFTWARE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	/* flash strobe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FLASH_STROBE, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	/* flash strobe stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FLASH_STROBE_STOP, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	/* flash strobe timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FLASH_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			  LM3646_FLASH_TOUT_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 			  LM3646_FLASH_TOUT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			  LM3646_FLASH_TOUT_STEP, flash->pdata->flash_timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	/* max flash current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FLASH_INTENSITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 			  LM3646_TOTAL_FLASH_BRT_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 			  LM3646_TOTAL_FLASH_BRT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			  LM3646_TOTAL_FLASH_BRT_STEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			  LM3646_TOTAL_FLASH_BRT_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	/* max torch current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FLASH_TORCH_INTENSITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			  LM3646_TOTAL_TORCH_BRT_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			  LM3646_TOTAL_TORCH_BRT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			  LM3646_TOTAL_TORCH_BRT_STEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			  LM3646_TOTAL_TORCH_BRT_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	/* fault */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	fault = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FLASH_FAULT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 				  V4L2_FLASH_FAULT_OVER_VOLTAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 				  | V4L2_FLASH_FAULT_OVER_TEMPERATURE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 				  | V4L2_FLASH_FAULT_SHORT_CIRCUIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 				  | V4L2_FLASH_FAULT_TIMEOUT, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	if (fault != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		fault->flags |= V4L2_CTRL_FLAG_VOLATILE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	if (hdl->error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		return hdl->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	flash->subdev_led.ctrl_handler = hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* initialize device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static const struct v4l2_subdev_ops lm3646_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	.core = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static const struct regmap_config lm3646_regmap = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	.max_register = 0xFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static int lm3646_subdev_init(struct lm3646_flash *flash)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	struct i2c_client *client = to_i2c_client(flash->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	v4l2_i2c_subdev_init(&flash->subdev_led, client, &lm3646_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	flash->subdev_led.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	strscpy(flash->subdev_led.name, LM3646_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		sizeof(flash->subdev_led.name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	rval = lm3646_init_controls(flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	if (rval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	rval = media_entity_pads_init(&flash->subdev_led.entity, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	if (rval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	flash->subdev_led.entity.function = MEDIA_ENT_F_FLASH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	v4l2_ctrl_handler_free(&flash->ctrls_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static int lm3646_init_device(struct lm3646_flash *flash)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	unsigned int reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	/* read the value of mode register to reduce redundant i2c accesses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	rval = regmap_read(flash->regmap, REG_ENABLE, &reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	if (rval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	flash->mode_reg = reg_val & 0xfc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	/* output disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	rval = lm3646_mode_ctrl(flash, V4L2_FLASH_LED_MODE_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	if (rval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	 * LED1 flash current setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	 * LED2 flash current = Total(Max) flash current - LED1 flash current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	rval = regmap_update_bits(flash->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 				  REG_LED1_FLASH_BR, 0x7F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 				  LM3646_LED1_FLASH_BRT_uA_TO_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 				  (flash->pdata->led1_flash_brt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	if (rval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	 * LED1 torch current setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	 * LED2 torch current = Total(Max) torch current - LED1 torch current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	rval = regmap_update_bits(flash->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 				  REG_LED1_TORCH_BR, 0x7F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 				  LM3646_LED1_TORCH_BRT_uA_TO_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 				  (flash->pdata->led1_torch_brt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	if (rval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	/* Reset flag register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	return regmap_read(flash->regmap, REG_FLAG, &reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static int lm3646_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 			const struct i2c_device_id *devid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	struct lm3646_flash *flash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	struct lm3646_platform_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	flash = devm_kzalloc(&client->dev, sizeof(*flash), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	if (flash == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	flash->regmap = devm_regmap_init_i2c(client, &lm3646_regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	if (IS_ERR(flash->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		return PTR_ERR(flash->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	/* check device tree if there is no platform data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	if (pdata == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		pdata = devm_kzalloc(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 				     sizeof(struct lm3646_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 				     GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		if (pdata == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 			return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		/* use default data in case of no platform data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 		pdata->flash_timeout = LM3646_FLASH_TOUT_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		pdata->led1_torch_brt = LM3646_LED1_TORCH_BRT_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		pdata->led1_flash_brt = LM3646_LED1_FLASH_BRT_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	flash->pdata = pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	flash->dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	rval = lm3646_subdev_init(flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	if (rval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	rval = lm3646_init_device(flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	if (rval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	i2c_set_clientdata(client, flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) static int lm3646_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	struct lm3646_flash *flash = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	v4l2_device_unregister_subdev(&flash->subdev_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	v4l2_ctrl_handler_free(&flash->ctrls_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	media_entity_cleanup(&flash->subdev_led.entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static const struct i2c_device_id lm3646_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	{LM3646_NAME, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) MODULE_DEVICE_TABLE(i2c, lm3646_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static struct i2c_driver lm3646_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		   .name = LM3646_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 		   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	.probe = lm3646_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	.remove = lm3646_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	.id_table = lm3646_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) module_i2c_driver(lm3646_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) MODULE_AUTHOR("Daniel Jeong <gshark.jeong@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) MODULE_AUTHOR("Ldd Mlp <ldd-mlp@list.ti.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) MODULE_DESCRIPTION("Texas Instruments LM3646 Dual Flash LED driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) MODULE_LICENSE("GPL");