^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * imx378 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * V0.0X01.0X01 add imx378 driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * V0.0X01.0X02 add imx378 support mirror and flip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * V0.0X01.0X03 add quick stream on/off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/version.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/rk-camera-module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <media/media-entity.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <media/v4l2-async.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <media/v4l2-subdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <media/v4l2-fwnode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/pinctrl/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/of_graph.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/rk-preisp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #ifndef V4L2_CID_DIGITAL_GAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define IMX378_LINK_FREQ_848 848000000// 1696Mbps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define IMX378_LANES 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define PIXEL_RATE_WITH_848M_10BIT (IMX378_LINK_FREQ_848 * 2 / 10 * 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define PIXEL_RATE_WITH_848M_12BIT (IMX378_LINK_FREQ_848 * 2 / 12 * 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define IMX378_XVCLK_FREQ 24000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define CHIP_ID 0x0378
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define IMX378_REG_CHIP_ID_H 0x0016
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define IMX378_REG_CHIP_ID_L 0x0017
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define IMX378_REG_CTRL_MODE 0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define IMX378_MODE_SW_STANDBY 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define IMX378_MODE_STREAMING 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define IMX378_REG_EXPOSURE_H 0x0202
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define IMX378_REG_EXPOSURE_L 0x0203
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define IMX378_EXPOSURE_MIN 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define IMX378_EXPOSURE_STEP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define IMX378_VTS_MAX 0x7fff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define IMX378_REG_GAIN_H 0x0204
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define IMX378_REG_GAIN_L 0x0205
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define IMX378_GAIN_MIN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define IMX378_GAIN_MAX 0x13AB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define IMX378_GAIN_STEP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define IMX378_GAIN_DEFAULT 0x0080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define IMX378_REG_DGAIN 0x3ff9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define IMX378_DGAIN_MODE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define IMX378_REG_DGAINGR_H 0x020e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define IMX378_REG_DGAINGR_L 0x020f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define IMX378_REG_DGAINR_H 0x0210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define IMX378_REG_DGAINR_L 0x0211
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define IMX378_REG_DGAINB_H 0x0212
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define IMX378_REG_DGAINB_L 0x0213
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define IMX378_REG_DGAINGB_H 0x0214
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define IMX378_REG_DGAINGB_L 0x0215
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define IMX378_REG_GAIN_GLOBAL_H 0x3ffc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define IMX378_REG_GAIN_GLOBAL_L 0x3ffd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) //#define IMX378_REG_TEST_PATTERN_H 0x0600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define IMX378_REG_TEST_PATTERN 0x0601
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define IMX378_TEST_PATTERN_ENABLE 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define IMX378_TEST_PATTERN_DISABLE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define IMX378_REG_VTS_H 0x0340
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define IMX378_REG_VTS_L 0x0341
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define IMX378_FLIP_MIRROR_REG 0x0101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define IMX378_MIRROR_BIT_MASK BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define IMX378_FLIP_BIT_MASK BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define IMX378_FETCH_EXP_H(VAL) (((VAL) >> 8) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define IMX378_FETCH_EXP_L(VAL) ((VAL) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define IMX378_FETCH_AGAIN_H(VAL) (((VAL) >> 8) & 0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define IMX378_FETCH_AGAIN_L(VAL) ((VAL) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define IMX378_FETCH_DGAIN_H(VAL) (((VAL) >> 8) & 0x0F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define IMX378_FETCH_DGAIN_L(VAL) ((VAL) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define IMX378_FETCH_RHS1_H(VAL) (((VAL) >> 16) & 0x0F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define IMX378_FETCH_RHS1_M(VAL) (((VAL) >> 8) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define IMX378_FETCH_RHS1_L(VAL) ((VAL) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define REG_DELAY 0xFFFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define REG_NULL 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define IMX378_REG_VALUE_08BIT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define IMX378_REG_VALUE_16BIT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define IMX378_REG_VALUE_24BIT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define OF_CAMERA_HDR_MODE "rockchip,camera-hdr-mode"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define IMX378_NAME "imx378"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static const char * const imx378_supply_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) "avdd", /* Analog power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) "dovdd", /* Digital I/O power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) "dvdd", /* Digital core power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define IMX378_NUM_SUPPLIES ARRAY_SIZE(imx378_supply_names)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct regval {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) u16 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct imx378_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) u32 bus_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) u32 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) u32 height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct v4l2_fract max_fps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) u32 hts_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u32 vts_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) u32 exp_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) const struct regval *reg_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) u32 hdr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) u32 vc[PAD_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct imx378 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct clk *xvclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct gpio_desc *reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct gpio_desc *pwdn_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct regulator_bulk_data supplies[IMX378_NUM_SUPPLIES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct pinctrl *pinctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct pinctrl_state *pins_default;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct pinctrl_state *pins_sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct v4l2_subdev subdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct media_pad pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct v4l2_ctrl_handler ctrl_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct v4l2_ctrl *exposure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct v4l2_ctrl *anal_gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct v4l2_ctrl *digi_gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct v4l2_ctrl *hblank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct v4l2_ctrl *vblank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct v4l2_ctrl *h_flip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct v4l2_ctrl *v_flip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct v4l2_ctrl *test_pattern;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct v4l2_ctrl *pixel_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct v4l2_ctrl *link_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct mutex mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) bool streaming;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) bool power_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) const struct imx378_mode *cur_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) u32 cfg_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) u32 cur_pixel_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) u32 cur_link_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) u32 module_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) const char *module_facing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) const char *module_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) const char *len_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) u32 cur_vts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) bool has_init_exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct preisp_hdrae_exp_s init_hdrae_exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) u8 flip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define to_imx378(sd) container_of(sd, struct imx378, subdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) *IMX378LQR All-pixel scan CSI-2_4lane 24Mhz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) *AD:10bit Output:10bit 1696Mbps Master Mode 30fps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) *Tool ver : Ver4.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static const struct regval imx378_linear_10_4056x3040_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {0x0101, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {0x0136, 0x18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {0x0137, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {0xE000, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {0x4AE9, 0x18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {0x4AEA, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {0xF61C, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {0xF61E, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {0x4AE9, 0x21},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {0x4AEA, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {0x38A8, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {0x38A9, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {0x38AA, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {0x38AB, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {0x55D4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {0x55D5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {0x55D6, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {0x55D7, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {0x55E8, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {0x55E9, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {0x55EA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {0x55EB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {0x574C, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {0x574D, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {0x574E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {0x574F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {0x5754, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {0x5755, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {0x5756, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {0x5757, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {0x5973, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {0x5974, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {0x5D13, 0xC3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {0x5D14, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {0x5D15, 0xA3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {0x5D16, 0x1D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {0x5D17, 0x65},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {0x5D18, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {0x5D1A, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {0x5D1B, 0xA9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {0x5D1C, 0x45},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {0x5D1D, 0x3A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {0x5D1E, 0xAB},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {0x5D1F, 0x15},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {0x5D21, 0x0E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {0x5D22, 0x52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {0x5D23, 0xAA},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {0x5D24, 0x7D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {0x5D25, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {0x5D26, 0xA8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {0x5D37, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {0x5D38, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {0x5D77, 0x7F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {0x7B75, 0x0E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {0x7B76, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {0x7B77, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {0x7B78, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {0x7B79, 0x47},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {0x7B7C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {0x7B7D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {0x8D1F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {0x8D27, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {0x9004, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {0x9200, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {0x9201, 0x6C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {0x9202, 0x71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {0x9203, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {0x9204, 0x71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {0x9205, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {0x9371, 0x6A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {0x9373, 0x6A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {0x9375, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {0x991A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {0x996B, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {0x996C, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {0x996D, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {0x9A4C, 0x0D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {0x9A4D, 0x0D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {0xA001, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {0xA003, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {0xA005, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {0xA006, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {0xA007, 0xC0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {0xA009, 0xC0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {0x3D8A, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {0x4421, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {0x7B3B, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {0x7B4C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {0x9905, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {0x9907, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {0x9909, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {0x990B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {0x9944, 0x3C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {0x9947, 0x3C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {0x994A, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {0x994B, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {0x994C, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {0x994D, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {0x994E, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {0x994F, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {0x9950, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {0x9951, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {0x9952, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {0x9953, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {0x9954, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {0x9955, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {0x9A13, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {0x9A14, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {0x9A19, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {0x9A1C, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {0x9A1D, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {0x9A26, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {0x9A27, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {0x9A2C, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {0x9A2D, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {0x9A2F, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {0x9A30, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {0x9A41, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {0x9A46, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {0x9A47, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {0x9C17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {0x9C1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {0x9C29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {0x9C3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {0x9C41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {0x9C47, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {0x9C4D, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {0x9C6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {0x9C71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {0x9C73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {0x9C75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {0x9C7D, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {0x9C83, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {0x9C94, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {0x9C95, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {0x9C96, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {0x9C97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {0x9C98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {0x9C99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {0x9C9A, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {0x9C9B, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {0x9C9C, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {0x9CA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {0x9CA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {0x9CA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {0x9CA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {0x9CA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {0x9CA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {0x9CA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {0x9CA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {0x9CA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {0x9CA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {0x9CAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {0x9CAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {0x9CAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {0x9CAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {0x9CAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {0x9CBD, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {0x9CBF, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {0x9CC1, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {0x9CC3, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {0x9CC5, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {0x9CC7, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) {0x9CC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {0x9CCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) {0x9CCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {0x9D17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {0x9D1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {0x9D29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) {0x9D3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {0x9D41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {0x9D47, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {0x9D4D, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {0x9D6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {0x9D71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {0x9D73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {0x9D75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) {0x9D7D, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {0x9D83, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {0x9D94, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {0x9D95, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {0x9D96, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {0x9D97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) {0x9D98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {0x9D99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {0x9D9A, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {0x9D9B, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) {0x9D9C, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) {0x9D9D, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) {0x9D9E, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {0x9D9F, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) {0x9DA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) {0x9DA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {0x9DA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) {0x9DA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {0x9DA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {0x9DA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {0x9DA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {0x9DA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {0x9DA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {0x9DA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {0x9DAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {0x9DAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {0x9DAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {0x9DAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {0x9DAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {0x9DC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) {0x9DCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {0x9DCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) {0x9E17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {0x9E1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {0x9E29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) {0x9E3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {0x9E41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {0x9E47, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {0x9E4D, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) {0x9E6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {0x9E71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {0x9E73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {0x9E75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) {0x9E94, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) {0x9E95, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) {0x9E96, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {0x9E97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {0x9E98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {0x9E99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {0x9EA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {0x9EA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {0x9EA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) {0x9EA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {0x9EA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {0x9EA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {0x9EA6, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {0x9EA7, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) {0x9EA8, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) {0x9EA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) {0x9EAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {0x9EAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) {0x9EAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {0x9EAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {0x9EAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {0x9EC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {0x9ECB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {0x9ECD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {0x9F17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {0x9F1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) {0x9F29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) {0x9F3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) {0x9F41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {0x9F47, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {0x9F4D, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {0x9F6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) {0x9F71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) {0x9F73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) {0x9F75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) {0x9F94, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {0x9F95, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {0x9F96, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) {0x9F97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {0x9F98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) {0x9F99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {0x9F9A, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {0x9F9B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {0x9F9C, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) {0x9F9D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) {0x9F9E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {0x9F9F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {0x9FA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {0x9FA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) {0x9FA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) {0x9FA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {0x9FA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) {0x9FA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) {0x9FA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {0x9FA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {0x9FA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {0x9FA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {0x9FAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {0x9FAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) {0x9FAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) {0x9FAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {0x9FAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {0x9FC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {0x9FCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) {0x9FCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) {0xA14B, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {0xA151, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {0xA153, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) {0xA155, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) {0xA157, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) {0xA1AD, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {0xA1B3, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {0xA1B5, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) {0xA1B9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) {0xA24B, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {0xA257, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) {0xA2AD, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {0xA2B9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) {0xB21F, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) {0xB35C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {0xB35E, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {0x0112, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) {0x0113, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {0x0114, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {0x0342, 0x16},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) {0x0343, 0xA8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) {0x0340, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) {0x0341, 0x3C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) {0x0344, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {0x0345, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) {0x0346, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) {0x0347, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) {0x0348, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {0x0349, 0xD7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) {0x034A, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) {0x034B, 0xDF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) {0x0220, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) {0x0221, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) {0x0381, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) {0x0383, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {0x0385, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) {0x0387, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) {0x0900, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) {0x0901, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) {0x0902, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) {0x3140, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {0x3C00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) {0x3C01, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) {0x3C02, 0xDC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) {0x3F0D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {0x5748, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) {0x5749, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) {0x574A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) {0x574B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) {0x7B53, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) {0x9369, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) {0x936B, 0x55},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {0x936D, 0x28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) {0x9304, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) {0x9305, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) {0x9E9A, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) {0x9E9B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) {0x9E9C, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) {0x9E9D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) {0x9E9E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {0x9E9F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) {0xA2A9, 0x60},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) {0xA2B7, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) {0x0401, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {0x0404, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) {0x0405, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) {0x0408, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {0x0409, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) {0x040A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) {0x040B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) {0x040C, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) {0x040D, 0xD8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {0x040E, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {0x040F, 0xE0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) {0x034C, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {0x034D, 0xD8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) {0x034E, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) {0x034F, 0xE0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) {0x0301, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) {0x0303, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) {0x0305, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) {0x0306, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) {0x0307, 0xD4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {0x0309, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) {0x030B, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {0x030D, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) {0x030E, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) {0x030F, 0x5E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) {0x0310, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {0x0820, 0x1A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) {0x0821, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) {0x0822, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) {0x0823, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {0x3E20, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) {0x3E37, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) {0x3F50, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {0x3F56, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) {0x3F57, 0xA0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {REG_NULL, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static const struct regval imx378_linear_10_3840x2160_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) {0x0101, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) {0x0136, 0x18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {0x0137, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) {0xE000, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) {0x4AE9, 0x18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) {0x4AEA, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {0xF61C, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) {0xF61E, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {0x4AE9, 0x21},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {0x4AEA, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) {0x38A8, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) {0x38A9, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) {0x38AA, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {0x38AB, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) {0x55D4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) {0x55D5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) {0x55D6, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) {0x55D7, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) {0x55E8, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) {0x55E9, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) {0x55EA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {0x55EB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) {0x574C, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) {0x574D, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) {0x574E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {0x574F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) {0x5754, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) {0x5755, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) {0x5756, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) {0x5757, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) {0x5973, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) {0x5974, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) {0x5D13, 0xC3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {0x5D14, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {0x5D15, 0xA3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) {0x5D16, 0x1D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) {0x5D17, 0x65},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) {0x5D18, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) {0x5D1A, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) {0x5D1B, 0xA9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) {0x5D1C, 0x45},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) {0x5D1D, 0x3A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) {0x5D1E, 0xAB},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) {0x5D1F, 0x15},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) {0x5D21, 0x0E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) {0x5D22, 0x52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) {0x5D23, 0xAA},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) {0x5D24, 0x7D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) {0x5D25, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) {0x5D26, 0xA8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) {0x5D37, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) {0x5D38, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {0x5D77, 0x7F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) {0x7B75, 0x0E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {0x7B76, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {0x7B77, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) {0x7B78, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {0x7B79, 0x47},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) {0x7B7C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) {0x7B7D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) {0x8D1F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) {0x8D27, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {0x9004, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) {0x9200, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) {0x9201, 0x6C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {0x9202, 0x71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {0x9203, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) {0x9204, 0x71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) {0x9205, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) {0x9371, 0x6A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) {0x9373, 0x6A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) {0x9375, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) {0x991A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) {0x996B, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) {0x996C, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) {0x996D, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {0x9A4C, 0x0D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) {0x9A4D, 0x0D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) {0xA001, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) {0xA003, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {0xA005, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) {0xA006, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) {0xA007, 0xC0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) {0xA009, 0xC0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) {0x3D8A, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) {0x4421, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) {0x7B3B, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) {0x7B4C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {0x9905, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) {0x9907, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) {0x9909, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) {0x990B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) {0x9944, 0x3C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) {0x9947, 0x3C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) {0x994A, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {0x994B, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) {0x994C, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) {0x994D, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) {0x994E, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) {0x994F, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) {0x9950, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) {0x9951, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) {0x9952, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) {0x9953, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) {0x9954, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {0x9955, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) {0x9A13, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) {0x9A14, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {0x9A19, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) {0x9A1C, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) {0x9A1D, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) {0x9A26, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) {0x9A27, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) {0x9A2C, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) {0x9A2D, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) {0x9A2F, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) {0x9A30, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) {0x9A41, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {0x9A46, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) {0x9A47, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) {0x9C17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {0x9C1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) {0x9C29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) {0x9C3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) {0x9C41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) {0x9C47, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) {0x9C4D, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) {0x9C6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) {0x9C71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) {0x9C73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) {0x9C75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) {0x9C7D, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) {0x9C83, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) {0x9C94, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) {0x9C95, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) {0x9C96, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) {0x9C97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) {0x9C98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) {0x9C99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) {0x9C9A, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) {0x9C9B, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) {0x9C9C, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) {0x9CA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) {0x9CA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) {0x9CA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) {0x9CA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) {0x9CA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) {0x9CA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) {0x9CA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) {0x9CA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) {0x9CA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) {0x9CA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) {0x9CAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) {0x9CAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) {0x9CAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) {0x9CAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) {0x9CAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) {0x9CBD, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) {0x9CBF, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) {0x9CC1, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) {0x9CC3, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) {0x9CC5, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) {0x9CC7, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) {0x9CC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) {0x9CCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) {0x9CCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) {0x9D17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) {0x9D1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) {0x9D29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) {0x9D3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) {0x9D41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) {0x9D47, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) {0x9D4D, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) {0x9D6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) {0x9D71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) {0x9D73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {0x9D75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) {0x9D7D, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) {0x9D83, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) {0x9D94, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) {0x9D95, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) {0x9D96, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) {0x9D97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) {0x9D98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) {0x9D99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) {0x9D9A, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) {0x9D9B, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) {0x9D9C, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) {0x9D9D, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) {0x9D9E, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) {0x9D9F, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) {0x9DA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) {0x9DA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) {0x9DA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) {0x9DA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) {0x9DA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) {0x9DA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) {0x9DA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) {0x9DA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) {0x9DA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) {0x9DA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) {0x9DAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) {0x9DAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) {0x9DAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) {0x9DAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) {0x9DAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) {0x9DC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) {0x9DCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) {0x9DCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) {0x9E17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) {0x9E1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) {0x9E29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) {0x9E3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) {0x9E41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) {0x9E47, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) {0x9E4D, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) {0x9E6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) {0x9E71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) {0x9E73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) {0x9E75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) {0x9E94, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) {0x9E95, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) {0x9E96, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) {0x9E97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) {0x9E98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) {0x9E99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) {0x9EA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) {0x9EA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) {0x9EA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) {0x9EA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) {0x9EA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) {0x9EA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) {0x9EA6, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) {0x9EA7, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) {0x9EA8, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) {0x9EA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) {0x9EAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) {0x9EAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) {0x9EAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) {0x9EAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) {0x9EAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) {0x9EC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) {0x9ECB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) {0x9ECD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) {0x9F17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) {0x9F1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) {0x9F29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) {0x9F3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) {0x9F41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) {0x9F47, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) {0x9F4D, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) {0x9F6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) {0x9F71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) {0x9F73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) {0x9F75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) {0x9F94, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) {0x9F95, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) {0x9F96, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) {0x9F97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) {0x9F98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) {0x9F99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) {0x9F9A, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) {0x9F9B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {0x9F9C, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) {0x9F9D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) {0x9F9E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) {0x9F9F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) {0x9FA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) {0x9FA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) {0x9FA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) {0x9FA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) {0x9FA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) {0x9FA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) {0x9FA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) {0x9FA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) {0x9FA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) {0x9FA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) {0x9FAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) {0x9FAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) {0x9FAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) {0x9FAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) {0x9FAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) {0x9FC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) {0x9FCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) {0x9FCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) {0xA14B, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) {0xA151, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) {0xA153, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) {0xA155, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) {0xA157, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) {0xA1AD, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) {0xA1B3, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) {0xA1B5, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) {0xA1B9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) {0xA24B, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) {0xA257, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) {0xA2AD, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) {0xA2B9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) {0xB21F, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) {0xB35C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) {0xB35E, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) {0x0112, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) {0x0113, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) {0x0114, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) {0x0342, 0x16},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) {0x0343, 0xA8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) {0x0340, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) {0x0341, 0x3C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) {0x0344, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) {0x0345, 0x6C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) {0x0346, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) {0x0347, 0xB8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) {0x0348, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) {0x0349, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) {0x034A, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) {0x034B, 0x27},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) {0x0220, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) {0x0221, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) {0x0381, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) {0x0383, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) {0x0385, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) {0x0387, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) {0x0900, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) {0x0901, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) {0x0902, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) {0x3140, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) {0x3C00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) {0x3C01, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) {0x3C02, 0xDC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) {0x3F0D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) {0x5748, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) {0x5749, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) {0x574A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) {0x574B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) {0x7B53, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) {0x9369, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) {0x936B, 0x55},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) {0x936D, 0x28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) {0x9304, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) {0x9305, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) {0x9E9A, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) {0x9E9B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) {0x9E9C, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) {0x9E9D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) {0x9E9E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) {0x9E9F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) {0xA2A9, 0x60},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) {0xA2B7, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) {0x0401, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) {0x0404, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) {0x0405, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) {0x0408, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) {0x0409, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) {0x040A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) {0x040B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) {0x040C, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) {0x040D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) {0x040E, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) {0x040F, 0x70},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) {0x034C, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) {0x034D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) {0x034E, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) {0x034F, 0x70},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) {0x0301, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) {0x0303, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) {0x0305, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) {0x0306, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) {0x0307, 0xD4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) {0x0309, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) {0x030B, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) {0x030D, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) {0x030E, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) {0x030F, 0x5E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) {0x0310, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) {0x0820, 0x1A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) {0x0821, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) {0x0822, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) {0x0823, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) {0x3E20, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) {0x3E37, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) {0x3F50, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) {0x3F56, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) {0x3F57, 0xA0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) {REG_NULL, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) *IMX378LQR All-pixel scan CSI-2_4lane 24Mhz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) *AD:12bit Output:12bit 1696Mbps Master Mode 30fps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) *Tool ver : Ver4.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) static const struct regval imx378_linear_12_4056x3040_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) {0x0101, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) {0x0136, 0x18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) {0x0137, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) {0xE000, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) {0x4AE9, 0x18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) {0x4AEA, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) {0xF61C, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) {0xF61E, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) {0x4AE9, 0x21},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) {0x4AEA, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) {0x38A8, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) {0x38A9, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) {0x38AA, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) {0x38AB, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) {0x55D4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) {0x55D5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) {0x55D6, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) {0x55D7, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) {0x55E8, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) {0x55E9, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) {0x55EA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) {0x55EB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) {0x574C, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) {0x574D, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) {0x574E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) {0x574F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) {0x5754, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) {0x5755, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) {0x5756, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) {0x5757, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) {0x5973, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) {0x5974, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) {0x5D13, 0xC3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) {0x5D14, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) {0x5D15, 0xA3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) {0x5D16, 0x1D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) {0x5D17, 0x65},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) {0x5D18, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) {0x5D1A, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) {0x5D1B, 0xA9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) {0x5D1C, 0x45},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) {0x5D1D, 0x3A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) {0x5D1E, 0xAB},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) {0x5D1F, 0x15},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) {0x5D21, 0x0E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) {0x5D22, 0x52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) {0x5D23, 0xAA},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) {0x5D24, 0x7D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) {0x5D25, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) {0x5D26, 0xA8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) {0x5D37, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) {0x5D38, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) {0x5D77, 0x7F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) {0x7B75, 0x0E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) {0x7B76, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) {0x7B77, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) {0x7B78, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) {0x7B79, 0x47},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) {0x7B7C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) {0x7B7D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) {0x8D1F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) {0x8D27, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) {0x9004, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) {0x9200, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) {0x9201, 0x6C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) {0x9202, 0x71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) {0x9203, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) {0x9204, 0x71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) {0x9205, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) {0x9371, 0x6A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) {0x9373, 0x6A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) {0x9375, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) {0x991A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) {0x996B, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) {0x996C, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) {0x996D, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) {0x9A4C, 0x0D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) {0x9A4D, 0x0D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) {0xA001, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) {0xA003, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) {0xA005, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) {0xA006, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) {0xA007, 0xC0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) {0xA009, 0xC0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) {0x3D8A, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) {0x4421, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) {0x7B3B, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) {0x7B4C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) {0x9905, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) {0x9907, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) {0x9909, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) {0x990B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) {0x9944, 0x3C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) {0x9947, 0x3C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) {0x994A, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) {0x994B, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) {0x994C, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) {0x994D, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) {0x994E, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) {0x994F, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) {0x9950, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) {0x9951, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) {0x9952, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) {0x9953, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) {0x9954, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) {0x9955, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) {0x9A13, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) {0x9A14, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) {0x9A19, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) {0x9A1C, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) {0x9A1D, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) {0x9A26, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) {0x9A27, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) {0x9A2C, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) {0x9A2D, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) {0x9A2F, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) {0x9A30, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) {0x9A41, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) {0x9A46, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) {0x9A47, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) {0x9C17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) {0x9C1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) {0x9C29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) {0x9C3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) {0x9C41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) {0x9C47, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) {0x9C4D, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) {0x9C6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) {0x9C71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) {0x9C73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) {0x9C75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) {0x9C7D, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) {0x9C83, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) {0x9C94, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) {0x9C95, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) {0x9C96, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) {0x9C97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) {0x9C98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) {0x9C99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) {0x9C9A, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) {0x9C9B, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) {0x9C9C, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) {0x9CA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) {0x9CA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) {0x9CA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) {0x9CA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) {0x9CA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) {0x9CA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) {0x9CA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) {0x9CA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) {0x9CA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) {0x9CA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) {0x9CAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) {0x9CAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) {0x9CAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) {0x9CAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) {0x9CAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) {0x9CBD, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) {0x9CBF, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) {0x9CC1, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) {0x9CC3, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) {0x9CC5, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) {0x9CC7, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) {0x9CC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) {0x9CCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) {0x9CCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) {0x9D17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) {0x9D1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) {0x9D29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) {0x9D3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) {0x9D41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) {0x9D47, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) {0x9D4D, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) {0x9D6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) {0x9D71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) {0x9D73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) {0x9D75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) {0x9D7D, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) {0x9D83, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) {0x9D94, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) {0x9D95, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) {0x9D96, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) {0x9D97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) {0x9D98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) {0x9D99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) {0x9D9A, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) {0x9D9B, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) {0x9D9C, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) {0x9D9D, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) {0x9D9E, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) {0x9D9F, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) {0x9DA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) {0x9DA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) {0x9DA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) {0x9DA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) {0x9DA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) {0x9DA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) {0x9DA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) {0x9DA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) {0x9DA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) {0x9DA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) {0x9DAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) {0x9DAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) {0x9DAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) {0x9DAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) {0x9DAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) {0x9DC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) {0x9DCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) {0x9DCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) {0x9E17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) {0x9E1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) {0x9E29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) {0x9E3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) {0x9E41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) {0x9E47, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) {0x9E4D, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) {0x9E6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) {0x9E71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) {0x9E73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) {0x9E75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) {0x9E94, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) {0x9E95, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) {0x9E96, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) {0x9E97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) {0x9E98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) {0x9E99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) {0x9EA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) {0x9EA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) {0x9EA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) {0x9EA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) {0x9EA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) {0x9EA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) {0x9EA6, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) {0x9EA7, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) {0x9EA8, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) {0x9EA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) {0x9EAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) {0x9EAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) {0x9EAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) {0x9EAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) {0x9EAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) {0x9EC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) {0x9ECB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) {0x9ECD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) {0x9F17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) {0x9F1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) {0x9F29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) {0x9F3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) {0x9F41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) {0x9F47, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) {0x9F4D, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) {0x9F6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) {0x9F71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) {0x9F73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) {0x9F75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) {0x9F94, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) {0x9F95, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) {0x9F96, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) {0x9F97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) {0x9F98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) {0x9F99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) {0x9F9A, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) {0x9F9B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) {0x9F9C, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) {0x9F9D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) {0x9F9E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) {0x9F9F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) {0x9FA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) {0x9FA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) {0x9FA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) {0x9FA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) {0x9FA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) {0x9FA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) {0x9FA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) {0x9FA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) {0x9FA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) {0x9FA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) {0x9FAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) {0x9FAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) {0x9FAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) {0x9FAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) {0x9FAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) {0x9FC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) {0x9FCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) {0x9FCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) {0xA14B, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) {0xA151, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) {0xA153, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) {0xA155, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) {0xA157, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) {0xA1AD, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) {0xA1B3, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) {0xA1B5, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) {0xA1B9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) {0xA24B, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) {0xA257, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) {0xA2AD, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) {0xA2B9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) {0xB21F, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) {0xB35C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) {0xB35E, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) {0x0112, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) {0x0113, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) {0x0114, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) {0x0342, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) {0x0343, 0xD8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) {0x0340, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) {0x0341, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) {0x0344, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) {0x0345, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) {0x0346, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) {0x0347, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) {0x0348, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) {0x0349, 0xD7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) {0x034A, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) {0x034B, 0xDF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) {0x0220, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) {0x0221, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) {0x0381, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) {0x0383, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) {0x0385, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) {0x0387, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) {0x0900, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) {0x0901, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) {0x0902, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) {0x3140, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) {0x3C00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) {0x3C01, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) {0x3C02, 0xA2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) {0x3F0D, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) {0x5748, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) {0x5749, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) {0x574A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) {0x574B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) {0x7B53, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) {0x9369, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) {0x936B, 0x55},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) {0x936D, 0x28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) {0x9304, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) {0x9305, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) {0x9E9A, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) {0x9E9B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) {0x9E9C, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) {0x9E9D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) {0x9E9E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) {0x9E9F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) {0xA2A9, 0x60},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) {0xA2B7, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) {0x0401, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) {0x0404, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) {0x0405, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) {0x0408, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) {0x0409, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) {0x040A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) {0x040B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) {0x040C, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) {0x040D, 0xD8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) {0x040E, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) {0x040F, 0xE0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) {0x034C, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) {0x034D, 0xD8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) {0x034E, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) {0x034F, 0xE0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) {0x0301, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) {0x0303, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) {0x0305, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) {0x0306, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) {0x0307, 0xAF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) {0x0309, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) {0x030B, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) {0x030D, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) {0x030E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) {0x030F, 0xD4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) {0x0310, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) {0x0820, 0x1A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) {0x0821, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) {0x0822, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) {0x0823, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) {0x3E20, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) {0x3E37, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) {0x3F50, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) {0x3F56, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) {0x3F57, 0xB8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) {REG_NULL, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) static const struct regval imx378_linear_12_2028x1520_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) {0x0101, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) {0x0136, 0x18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) {0x0137, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) {0xE000, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) {0x4AE9, 0x18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) {0x4AEA, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) {0xF61C, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) {0xF61E, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) {0x4AE9, 0x21},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) {0x4AEA, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) {0x38A8, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) {0x38A9, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) {0x38AA, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) {0x38AB, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) {0x55D4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) {0x55D5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) {0x55D6, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) {0x55D7, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) {0x55E8, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) {0x55E9, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) {0x55EA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) {0x55EB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) {0x574C, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) {0x574D, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) {0x574E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) {0x574F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) {0x5754, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) {0x5755, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) {0x5756, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) {0x5757, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) {0x5973, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) {0x5974, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) {0x5D13, 0xC3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) {0x5D14, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) {0x5D15, 0xA3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) {0x5D16, 0x1D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) {0x5D17, 0x65},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) {0x5D18, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) {0x5D1A, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) {0x5D1B, 0xA9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) {0x5D1C, 0x45},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) {0x5D1D, 0x3A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) {0x5D1E, 0xAB},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) {0x5D1F, 0x15},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) {0x5D21, 0x0E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) {0x5D22, 0x52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) {0x5D23, 0xAA},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) {0x5D24, 0x7D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) {0x5D25, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) {0x5D26, 0xA8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) {0x5D37, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) {0x5D38, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) {0x5D77, 0x7F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) {0x7B75, 0x0E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) {0x7B76, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) {0x7B77, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) {0x7B78, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) {0x7B79, 0x47},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) {0x7B7C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) {0x7B7D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) {0x8D1F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) {0x8D27, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) {0x9004, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) {0x9200, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) {0x9201, 0x6C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) {0x9202, 0x71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) {0x9203, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) {0x9204, 0x71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) {0x9205, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) {0x9371, 0x6A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) {0x9373, 0x6A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) {0x9375, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) {0x991A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) {0x996B, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) {0x996C, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) {0x996D, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) {0x9A4C, 0x0D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) {0x9A4D, 0x0D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) {0xA001, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) {0xA003, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) {0xA005, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) {0xA006, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) {0xA007, 0xC0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) {0xA009, 0xC0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) {0x3D8A, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) {0x4421, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) {0x7B3B, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) {0x7B4C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) {0x9905, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) {0x9907, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) {0x9909, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) {0x990B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) {0x9944, 0x3C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) {0x9947, 0x3C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) {0x994A, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) {0x994B, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) {0x994C, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) {0x994D, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) {0x994E, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) {0x994F, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) {0x9950, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) {0x9951, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) {0x9952, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) {0x9953, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) {0x9954, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) {0x9955, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) {0x9A13, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) {0x9A14, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) {0x9A19, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) {0x9A1C, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) {0x9A1D, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) {0x9A26, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) {0x9A27, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) {0x9A2C, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) {0x9A2D, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) {0x9A2F, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) {0x9A30, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) {0x9A41, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) {0x9A46, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) {0x9A47, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) {0x9C17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) {0x9C1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) {0x9C29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) {0x9C3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) {0x9C41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) {0x9C47, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) {0x9C4D, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) {0x9C6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) {0x9C71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) {0x9C73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) {0x9C75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) {0x9C7D, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) {0x9C83, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) {0x9C94, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) {0x9C95, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) {0x9C96, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) {0x9C97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) {0x9C98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) {0x9C99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) {0x9C9A, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) {0x9C9B, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) {0x9C9C, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) {0x9CA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) {0x9CA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) {0x9CA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) {0x9CA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) {0x9CA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) {0x9CA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) {0x9CA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) {0x9CA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) {0x9CA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) {0x9CA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) {0x9CAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) {0x9CAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) {0x9CAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) {0x9CAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) {0x9CAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) {0x9CBD, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) {0x9CBF, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) {0x9CC1, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) {0x9CC3, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) {0x9CC5, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) {0x9CC7, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) {0x9CC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) {0x9CCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) {0x9CCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) {0x9D17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) {0x9D1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) {0x9D29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) {0x9D3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) {0x9D41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) {0x9D47, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) {0x9D4D, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) {0x9D6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) {0x9D71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) {0x9D73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) {0x9D75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) {0x9D7D, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) {0x9D83, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) {0x9D94, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) {0x9D95, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) {0x9D96, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) {0x9D97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) {0x9D98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) {0x9D99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) {0x9D9A, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) {0x9D9B, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) {0x9D9C, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) {0x9D9D, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) {0x9D9E, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) {0x9D9F, 0x1F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) {0x9DA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) {0x9DA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) {0x9DA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) {0x9DA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) {0x9DA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) {0x9DA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) {0x9DA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) {0x9DA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) {0x9DA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) {0x9DA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) {0x9DAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) {0x9DAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) {0x9DAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) {0x9DAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) {0x9DAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) {0x9DC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) {0x9DCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) {0x9DCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) {0x9E17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) {0x9E1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) {0x9E29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) {0x9E3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) {0x9E41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) {0x9E47, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) {0x9E4D, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) {0x9E6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) {0x9E71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) {0x9E73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) {0x9E75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) {0x9E94, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) {0x9E95, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) {0x9E96, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) {0x9E97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) {0x9E98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) {0x9E99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) {0x9EA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) {0x9EA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) {0x9EA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) {0x9EA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) {0x9EA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) {0x9EA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) {0x9EA6, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) {0x9EA7, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) {0x9EA8, 0x3F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) {0x9EA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) {0x9EAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) {0x9EAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) {0x9EAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) {0x9EAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) {0x9EAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) {0x9EC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) {0x9ECB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) {0x9ECD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) {0x9F17, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) {0x9F1D, 0x31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) {0x9F29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) {0x9F3B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) {0x9F41, 0x6B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) {0x9F47, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) {0x9F4D, 0x5A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) {0x9F6B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) {0x9F71, 0xC8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) {0x9F73, 0x32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) {0x9F75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) {0x9F94, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) {0x9F95, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) {0x9F96, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) {0x9F97, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) {0x9F98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) {0x9F99, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) {0x9F9A, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) {0x9F9B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) {0x9F9C, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) {0x9F9D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) {0x9F9E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) {0x9F9F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) {0x9FA0, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) {0x9FA1, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) {0x9FA2, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) {0x9FA3, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) {0x9FA4, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) {0x9FA5, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) {0x9FA6, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) {0x9FA7, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) {0x9FA8, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) {0x9FA9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) {0x9FAA, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) {0x9FAB, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) {0x9FAC, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) {0x9FAD, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) {0x9FAE, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) {0x9FC9, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) {0x9FCB, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) {0x9FCD, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) {0xA14B, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) {0xA151, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) {0xA153, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) {0xA155, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) {0xA157, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) {0xA1AD, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) {0xA1B3, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) {0xA1B5, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) {0xA1B9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) {0xA24B, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) {0xA257, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) {0xA2AD, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) {0xA2B9, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) {0xB21F, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) {0xB35C, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) {0xB35E, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) {0x0112, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) {0x0113, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) {0x0114, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) {0x0342, 0x1B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) {0x0343, 0xD8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) {0x0340, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) {0x0341, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) {0x0344, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) {0x0345, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) {0x0346, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) {0x0347, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) {0x0348, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) {0x0349, 0xD7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) {0x034A, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) {0x034B, 0xDF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) {0x0220, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) {0x0221, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) {0x0381, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) {0x0383, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) {0x0385, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) {0x0387, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) {0x0900, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) {0x0901, 0x22},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) {0x0902, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) {0x3140, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) {0x3C00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) {0x3C01, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) {0x3C02, 0x9C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) {0x3F0D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) {0x5748, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) {0x5749, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) {0x574A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) {0x574B, 0xA4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) {0x7B53, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) {0x9369, 0x73},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) {0x936B, 0x64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) {0x936D, 0x5F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) {0x9304, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) {0x9305, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) {0x9E9A, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) {0x9E9B, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) {0x9E9C, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) {0x9E9D, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) {0x9E9E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) {0x9E9F, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) {0xA2A9, 0x27},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) {0xA2B7, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) {0x0401, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) {0x0404, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) {0x0405, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) {0x0408, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) {0x0409, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) {0x040A, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) {0x040B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) {0x040C, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) {0x040D, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) {0x040E, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) {0x040F, 0xF0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) {0x034C, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) {0x034D, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) {0x034E, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) {0x034F, 0xF0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) {0x0301, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) {0x0303, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) {0x0305, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) {0x0306, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) {0x0307, 0xAF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) {0x0309, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) {0x030B, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) {0x030D, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) {0x030E, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) {0x030F, 0xD4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) {0x0310, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) {0x0820, 0x1A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) {0x0821, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) {0x0822, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) {0x0823, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) {0x3E20, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) {0x3E37, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) {0x3F50, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) {0x3F56, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) {0x3F57, 0xCC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) {REG_NULL, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) static const struct imx378_mode supported_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) .width = 3840,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) .height = 2160,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) .max_fps = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) .numerator = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) .denominator = 300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) .exp_def = 0x0600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) .hts_def = 0x16A8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) .vts_def = 0x0F3C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) .bus_fmt = MEDIA_BUS_FMT_SRGGB10_1X10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) .reg_list = imx378_linear_10_3840x2160_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) .hdr_mode = NO_HDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) .width = 4056,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) .height = 3040,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) .max_fps = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) .numerator = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) .denominator = 300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) .exp_def = 0x0600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) .hts_def = 0x16A8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) .vts_def = 0x0F3C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) .bus_fmt = MEDIA_BUS_FMT_SRGGB10_1X10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) .reg_list = imx378_linear_10_4056x3040_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) .hdr_mode = NO_HDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) .width = 2028,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) .height = 1520,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) .max_fps = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) .numerator = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) .denominator = 300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) .exp_def = 0x0C80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) .hts_def = 0x1BD8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) .vts_def = 0x0F57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) .bus_fmt = MEDIA_BUS_FMT_SRGGB12_1X12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) .reg_list = imx378_linear_12_2028x1520_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) .hdr_mode = NO_HDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) .width = 4056,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) .height = 3040,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) .max_fps = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) .numerator = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) .denominator = 300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) .exp_def = 0x0600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) .hts_def = 0x1BD8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) .vts_def = 0x0F57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) .bus_fmt = MEDIA_BUS_FMT_SRGGB12_1X12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) .reg_list = imx378_linear_12_4056x3040_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) .hdr_mode = NO_HDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) static const s64 link_freq_menu_items[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) IMX378_LINK_FREQ_848,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) static const char * const imx378_test_pattern_menu[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) "Disabled",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) "Vertical Color Bar Type 1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) "Vertical Color Bar Type 2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) "Vertical Color Bar Type 3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) "Vertical Color Bar Type 4"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) /* Write registers up to 4 at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) static int imx378_write_reg(struct i2c_client *client, u16 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) int len, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) u32 buf_i, val_i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) u8 buf[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) u8 *val_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) __be32 val_be;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) if (len > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) buf[0] = reg >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) buf[1] = reg & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) val_be = cpu_to_be32(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) val_p = (u8 *)&val_be;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) buf_i = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) val_i = 4 - len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) while (val_i < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) buf[buf_i++] = val_p[val_i++];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) if (i2c_master_send(client, buf, len + 2) != len + 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) static int imx378_write_array(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) const struct regval *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) if (unlikely(regs[i].addr == REG_DELAY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) usleep_range(regs[i].val, regs[i].val * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) ret = imx378_write_reg(client, regs[i].addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) regs[i].val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) /* Read registers up to 4 at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) static int imx378_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) u32 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) struct i2c_msg msgs[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) u8 *data_be_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) __be32 data_be = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) __be16 reg_addr_be = cpu_to_be16(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) if (len > 4 || !len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) data_be_p = (u8 *)&data_be;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) /* Write register address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) msgs[0].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) msgs[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) msgs[0].len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) msgs[0].buf = (u8 *)®_addr_be;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) /* Read data from register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) msgs[1].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) msgs[1].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) msgs[1].len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) msgs[1].buf = &data_be_p[4 - len];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) if (ret == ARRAY_SIZE(msgs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) if (ret != ARRAY_SIZE(msgs) && i == 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) *val = be32_to_cpu(data_be);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) static int imx378_get_reso_dist(const struct imx378_mode *mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) struct v4l2_mbus_framefmt *framefmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) return abs(mode->width - framefmt->width) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) abs(mode->height - framefmt->height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) static const struct imx378_mode *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) imx378_find_best_fit(struct imx378 *imx378, struct v4l2_subdev_format *fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) struct v4l2_mbus_framefmt *framefmt = &fmt->format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) int dist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) int cur_best_fit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) int cur_best_fit_dist = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) for (i = 0; i < imx378->cfg_num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) dist = imx378_get_reso_dist(&supported_modes[i], framefmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) cur_best_fit_dist = dist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) cur_best_fit = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) return &supported_modes[cur_best_fit];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) static int imx378_set_fmt(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) struct v4l2_subdev_format *fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) const struct imx378_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) s64 h_blank, vblank_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) mutex_lock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) mode = imx378_find_best_fit(imx378, fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) fmt->format.code = mode->bus_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) fmt->format.width = mode->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) fmt->format.height = mode->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) fmt->format.field = V4L2_FIELD_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) mutex_unlock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) return -ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) imx378->cur_mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) h_blank = mode->hts_def - mode->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) __v4l2_ctrl_modify_range(imx378->hblank, h_blank,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) h_blank, 1, h_blank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) vblank_def = mode->vts_def - mode->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) __v4l2_ctrl_modify_range(imx378->vblank, vblank_def,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) IMX378_VTS_MAX - mode->height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) 1, vblank_def);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) if (imx378->cur_mode->bus_fmt == MEDIA_BUS_FMT_SRGGB10_1X10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) imx378->cur_link_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) imx378->cur_pixel_rate = PIXEL_RATE_WITH_848M_10BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) } else if (imx378->cur_mode->bus_fmt ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) MEDIA_BUS_FMT_SRGGB12_1X12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) imx378->cur_link_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) imx378->cur_pixel_rate = PIXEL_RATE_WITH_848M_12BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) __v4l2_ctrl_s_ctrl_int64(imx378->pixel_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) imx378->cur_pixel_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) __v4l2_ctrl_s_ctrl(imx378->link_freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) imx378->cur_link_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) mutex_unlock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) static int imx378_get_fmt(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) struct v4l2_subdev_format *fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) const struct imx378_mode *mode = imx378->cur_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) mutex_lock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) mutex_unlock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) return -ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) fmt->format.width = mode->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) fmt->format.height = mode->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) if (imx378->flip & IMX378_MIRROR_BIT_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) if (imx378->flip & IMX378_FLIP_BIT_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) } else if (imx378->flip & IMX378_FLIP_BIT_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) fmt->format.code = MEDIA_BUS_FMT_SGBRG10_1X10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) fmt->format.code = mode->bus_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) fmt->format.field = V4L2_FIELD_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) /* format info: width/height/data type/virctual channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) if (fmt->pad < PAD_MAX && mode->hdr_mode != NO_HDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) fmt->reserved[0] = mode->vc[fmt->pad];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) fmt->reserved[0] = mode->vc[PAD0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) mutex_unlock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) static int imx378_enum_mbus_code(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) struct v4l2_subdev_mbus_code_enum *code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) if (code->index != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) code->code = imx378->cur_mode->bus_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) static int imx378_enum_frame_sizes(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) struct v4l2_subdev_frame_size_enum *fse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) if (fse->index >= imx378->cfg_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) if (fse->code != supported_modes[0].bus_fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) fse->min_width = supported_modes[fse->index].width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) fse->max_width = supported_modes[fse->index].width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) fse->max_height = supported_modes[fse->index].height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) fse->min_height = supported_modes[fse->index].height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) static int imx378_enable_test_pattern(struct imx378 *imx378, u32 pattern)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) if (pattern)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) val = (pattern - 1) | IMX378_TEST_PATTERN_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) val = IMX378_TEST_PATTERN_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) return imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) IMX378_REG_TEST_PATTERN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) static int imx378_g_frame_interval(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) struct v4l2_subdev_frame_interval *fi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) const struct imx378_mode *mode = imx378->cur_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) mutex_lock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) fi->interval = mode->max_fps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) mutex_unlock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) static int imx378_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) struct v4l2_mbus_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) const struct imx378_mode *mode = imx378->cur_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) if (mode->hdr_mode == NO_HDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) val = 1 << (IMX378_LANES - 1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) V4L2_MBUS_CSI2_CHANNEL_0 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) if (mode->hdr_mode == HDR_X2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) val = 1 << (IMX378_LANES - 1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) V4L2_MBUS_CSI2_CHANNEL_0 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) V4L2_MBUS_CSI2_CONTINUOUS_CLOCK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) V4L2_MBUS_CSI2_CHANNEL_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) config->type = V4L2_MBUS_CSI2_DPHY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) config->flags = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) static void imx378_get_module_inf(struct imx378 *imx378,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) struct rkmodule_inf *inf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) memset(inf, 0, sizeof(*inf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) strlcpy(inf->base.sensor, IMX378_NAME, sizeof(inf->base.sensor));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) strlcpy(inf->base.module, imx378->module_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) sizeof(inf->base.module));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) strlcpy(inf->base.lens, imx378->len_name, sizeof(inf->base.lens));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) static long imx378_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) struct rkmodule_hdr_cfg *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) long ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) u32 i, h, w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) u32 stream = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) case PREISP_CMD_SET_HDRAE_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) case RKMODULE_GET_MODULE_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) imx378_get_module_inf(imx378, (struct rkmodule_inf *)arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) case RKMODULE_GET_HDR_CFG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) hdr = (struct rkmodule_hdr_cfg *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) hdr->esp.mode = HDR_NORMAL_VC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) hdr->hdr_mode = imx378->cur_mode->hdr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) case RKMODULE_SET_HDR_CFG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) hdr = (struct rkmodule_hdr_cfg *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) w = imx378->cur_mode->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) h = imx378->cur_mode->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) for (i = 0; i < imx378->cfg_num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) if (w == supported_modes[i].width &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) h == supported_modes[i].height &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) supported_modes[i].hdr_mode == hdr->hdr_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) imx378->cur_mode = &supported_modes[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) if (i == imx378->cfg_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) dev_err(&imx378->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) "not find hdr mode:%d %dx%d config\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) hdr->hdr_mode, w, h);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) w = imx378->cur_mode->hts_def -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) imx378->cur_mode->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) h = imx378->cur_mode->vts_def -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) imx378->cur_mode->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) __v4l2_ctrl_modify_range(imx378->hblank, w, w, 1, w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) __v4l2_ctrl_modify_range(imx378->vblank, h,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) IMX378_VTS_MAX -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) imx378->cur_mode->height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) 1, h);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) if (imx378->cur_mode->bus_fmt ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) MEDIA_BUS_FMT_SRGGB10_1X10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) imx378->cur_link_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) imx378->cur_pixel_rate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) PIXEL_RATE_WITH_848M_10BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) } else if (imx378->cur_mode->bus_fmt ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) MEDIA_BUS_FMT_SRGGB12_1X12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) imx378->cur_link_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) imx378->cur_pixel_rate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) PIXEL_RATE_WITH_848M_12BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) __v4l2_ctrl_s_ctrl_int64(imx378->pixel_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) imx378->cur_pixel_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) __v4l2_ctrl_s_ctrl(imx378->link_freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) imx378->cur_link_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) case RKMODULE_SET_QUICK_STREAM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) stream = *((u32 *)arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) if (stream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) ret = imx378_write_reg(imx378->client, IMX378_REG_CTRL_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) IMX378_REG_VALUE_08BIT, IMX378_MODE_STREAMING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) ret = imx378_write_reg(imx378->client, IMX378_REG_CTRL_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) IMX378_REG_VALUE_08BIT, IMX378_MODE_SW_STANDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) ret = -ENOIOCTLCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) static long imx378_compat_ioctl32(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) void __user *up = compat_ptr(arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) struct rkmodule_inf *inf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) struct rkmodule_awb_cfg *cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) struct rkmodule_hdr_cfg *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) struct preisp_hdrae_exp_s *hdrae;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) long ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) u32 stream = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) case RKMODULE_GET_MODULE_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) inf = kzalloc(sizeof(*inf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) if (!inf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) ret = imx378_ioctl(sd, cmd, inf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) ret = copy_to_user(up, inf, sizeof(*inf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) kfree(inf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) case RKMODULE_AWB_CFG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) if (!cfg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) ret = copy_from_user(cfg, up, sizeof(*cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) ret = imx378_ioctl(sd, cmd, cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) kfree(cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) case RKMODULE_GET_HDR_CFG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) if (!hdr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) ret = imx378_ioctl(sd, cmd, hdr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) ret = copy_to_user(up, hdr, sizeof(*hdr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) kfree(hdr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) case RKMODULE_SET_HDR_CFG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) if (!hdr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) ret = copy_from_user(hdr, up, sizeof(*hdr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) ret = imx378_ioctl(sd, cmd, hdr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) kfree(hdr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) case PREISP_CMD_SET_HDRAE_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) hdrae = kzalloc(sizeof(*hdrae), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) if (!hdrae) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) ret = copy_from_user(hdrae, up, sizeof(*hdrae));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) ret = imx378_ioctl(sd, cmd, hdrae);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) kfree(hdrae);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) case RKMODULE_SET_QUICK_STREAM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) ret = copy_from_user(&stream, up, sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) ret = imx378_ioctl(sd, cmd, &stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) ret = -ENOIOCTLCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) static int imx378_set_flip(struct imx378 *imx378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) ret = imx378_read_reg(imx378->client, IMX378_FLIP_MIRROR_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) IMX378_REG_VALUE_08BIT, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) if (imx378->flip & IMX378_MIRROR_BIT_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) val |= IMX378_MIRROR_BIT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) val &= ~IMX378_MIRROR_BIT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) if (imx378->flip & IMX378_FLIP_BIT_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) val |= IMX378_FLIP_BIT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) val &= ~IMX378_FLIP_BIT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) ret |= imx378_write_reg(imx378->client, IMX378_FLIP_MIRROR_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) IMX378_REG_VALUE_08BIT, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) static int __imx378_start_stream(struct imx378 *imx378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) ret = imx378_write_array(imx378->client, imx378->cur_mode->reg_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) imx378->cur_vts = imx378->cur_mode->vts_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) /* In case these controls are set before streaming */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) ret = __v4l2_ctrl_handler_setup(&imx378->ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) if (imx378->has_init_exp && imx378->cur_mode->hdr_mode != NO_HDR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) ret = imx378_ioctl(&imx378->subdev, PREISP_CMD_SET_HDRAE_EXP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) &imx378->init_hdrae_exp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) dev_err(&imx378->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) "init exp fail in hdr mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) imx378_set_flip(imx378);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) return imx378_write_reg(imx378->client, IMX378_REG_CTRL_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) IMX378_REG_VALUE_08BIT, IMX378_MODE_STREAMING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) static int __imx378_stop_stream(struct imx378 *imx378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) return imx378_write_reg(imx378->client, IMX378_REG_CTRL_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) IMX378_REG_VALUE_08BIT, IMX378_MODE_SW_STANDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) static int imx378_s_stream(struct v4l2_subdev *sd, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) struct i2c_client *client = imx378->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) mutex_lock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) on = !!on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) if (on == imx378->streaming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) goto unlock_and_return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) ret = pm_runtime_get_sync(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) pm_runtime_put_noidle(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) goto unlock_and_return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) ret = __imx378_start_stream(imx378);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) v4l2_err(sd, "start stream failed while write regs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) pm_runtime_put(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) goto unlock_and_return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) __imx378_stop_stream(imx378);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) pm_runtime_put(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) imx378->streaming = on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) unlock_and_return:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) mutex_unlock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) static int imx378_s_power(struct v4l2_subdev *sd, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) struct i2c_client *client = imx378->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) mutex_lock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) /* If the power state is not modified - no work to do. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) if (imx378->power_on == !!on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) goto unlock_and_return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) ret = pm_runtime_get_sync(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) pm_runtime_put_noidle(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) goto unlock_and_return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) imx378->power_on = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) pm_runtime_put(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) imx378->power_on = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) unlock_and_return:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) mutex_unlock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) /* Calculate the delay in us by clock rate and clock cycles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) static inline u32 imx378_cal_delay(u32 cycles)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) return DIV_ROUND_UP(cycles, IMX378_XVCLK_FREQ / 1000 / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) static int __imx378_power_on(struct imx378 *imx378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) u32 delay_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) struct device *dev = &imx378->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) ret = clk_set_rate(imx378->xvclk, IMX378_XVCLK_FREQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) if (clk_get_rate(imx378->xvclk) != IMX378_XVCLK_FREQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) dev_warn(dev, "xvclk mismatched, modes are based on 37.125MHz\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) ret = clk_prepare_enable(imx378->xvclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) dev_err(dev, "Failed to enable xvclk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) if (!IS_ERR(imx378->reset_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) gpiod_set_value_cansleep(imx378->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) ret = regulator_bulk_enable(IMX378_NUM_SUPPLIES, imx378->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) dev_err(dev, "Failed to enable regulators\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) goto disable_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) if (!IS_ERR(imx378->reset_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) gpiod_set_value_cansleep(imx378->reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) usleep_range(500, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) if (!IS_ERR(imx378->pwdn_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) gpiod_set_value_cansleep(imx378->pwdn_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) /* 8192 cycles prior to first SCCB transaction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) delay_us = imx378_cal_delay(8192);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) usleep_range(delay_us, delay_us * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) disable_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) clk_disable_unprepare(imx378->xvclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) static void __imx378_power_off(struct imx378 *imx378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) if (!IS_ERR(imx378->pwdn_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) gpiod_set_value_cansleep(imx378->pwdn_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) clk_disable_unprepare(imx378->xvclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) if (!IS_ERR(imx378->reset_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) gpiod_set_value_cansleep(imx378->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) regulator_bulk_disable(IMX378_NUM_SUPPLIES, imx378->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) static int imx378_runtime_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) return __imx378_power_on(imx378);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) static int imx378_runtime_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) __imx378_power_off(imx378);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) static int imx378_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) struct v4l2_mbus_framefmt *try_fmt =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) v4l2_subdev_get_try_format(sd, fh->pad, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) const struct imx378_mode *def_mode = &supported_modes[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) mutex_lock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) /* Initialize try_fmt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) try_fmt->width = def_mode->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) try_fmt->height = def_mode->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) try_fmt->code = def_mode->bus_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) try_fmt->field = V4L2_FIELD_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) mutex_unlock(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) /* No crop or compose */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) static int imx378_enum_frame_interval(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) struct v4l2_subdev_pad_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) struct v4l2_subdev_frame_interval_enum *fie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) if (fie->index >= imx378->cfg_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) fie->code = supported_modes[fie->index].bus_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) fie->width = supported_modes[fie->index].width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) fie->height = supported_modes[fie->index].height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) fie->interval = supported_modes[fie->index].max_fps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) fie->reserved[0] = supported_modes[fie->index].hdr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) static const struct dev_pm_ops imx378_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) SET_RUNTIME_PM_OPS(imx378_runtime_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) imx378_runtime_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) static const struct v4l2_subdev_internal_ops imx378_internal_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) .open = imx378_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) static const struct v4l2_subdev_core_ops imx378_core_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) .s_power = imx378_s_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) .ioctl = imx378_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) .compat_ioctl32 = imx378_compat_ioctl32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) static const struct v4l2_subdev_video_ops imx378_video_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) .s_stream = imx378_s_stream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) .g_frame_interval = imx378_g_frame_interval,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) static const struct v4l2_subdev_pad_ops imx378_pad_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) .enum_mbus_code = imx378_enum_mbus_code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) .enum_frame_size = imx378_enum_frame_sizes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) .enum_frame_interval = imx378_enum_frame_interval,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) .get_fmt = imx378_get_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) .set_fmt = imx378_set_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) .get_mbus_config = imx378_g_mbus_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) static const struct v4l2_subdev_ops imx378_subdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) .core = &imx378_core_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) .video = &imx378_video_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) .pad = &imx378_pad_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) static int imx378_set_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) struct imx378 *imx378 = container_of(ctrl->handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) struct imx378, ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) struct i2c_client *client = imx378->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) s64 max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) u32 again = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) u32 dgain = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) /* Propagate change of current control to all related controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) case V4L2_CID_VBLANK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) /* Update max exposure while meeting expected vblanking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) max = imx378->cur_mode->height + ctrl->val - 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) __v4l2_ctrl_modify_range(imx378->exposure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) imx378->exposure->minimum, max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) imx378->exposure->step,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) imx378->exposure->default_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) if (!pm_runtime_get_if_in_use(&client->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) case V4L2_CID_EXPOSURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) /* 4 least significant bits of expsoure are fractional part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) ret = imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) IMX378_REG_EXPOSURE_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) IMX378_FETCH_EXP_H(ctrl->val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) IMX378_REG_EXPOSURE_L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) IMX378_FETCH_EXP_L(ctrl->val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) case V4L2_CID_ANALOGUE_GAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) again = ctrl->val > 978 ? 978 : ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) dgain = ctrl->val > 978 ? ctrl->val - 978 : 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) ret = imx378_write_reg(imx378->client, IMX378_REG_GAIN_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) IMX378_FETCH_AGAIN_H(again));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) ret |= imx378_write_reg(imx378->client, IMX378_REG_GAIN_L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) IMX378_FETCH_AGAIN_L(again));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) ret |= imx378_write_reg(imx378->client, IMX378_REG_DGAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) IMX378_DGAIN_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) if (IMX378_DGAIN_MODE && dgain > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) IMX378_REG_DGAINGR_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) IMX378_FETCH_DGAIN_H(dgain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) IMX378_REG_DGAINGR_L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) IMX378_FETCH_DGAIN_L(dgain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) } else if (dgain > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) IMX378_REG_DGAINR_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) IMX378_FETCH_DGAIN_H(dgain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) IMX378_REG_DGAINR_L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) IMX378_FETCH_DGAIN_L(dgain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) IMX378_REG_DGAINB_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) IMX378_FETCH_DGAIN_H(dgain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) IMX378_REG_DGAINB_L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) IMX378_FETCH_DGAIN_L(dgain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) IMX378_REG_DGAINGB_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) IMX378_FETCH_DGAIN_H(dgain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) IMX378_REG_DGAINGB_L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) IMX378_FETCH_DGAIN_L(dgain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) IMX378_REG_GAIN_GLOBAL_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) IMX378_FETCH_DGAIN_H(dgain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) IMX378_REG_GAIN_GLOBAL_L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) IMX378_FETCH_DGAIN_L(dgain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) case V4L2_CID_VBLANK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) ret = imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) IMX378_REG_VTS_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) (ctrl->val + imx378->cur_mode->height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) ret |= imx378_write_reg(imx378->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) IMX378_REG_VTS_L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) IMX378_REG_VALUE_08BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) (ctrl->val + imx378->cur_mode->height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) imx378->cur_vts = ctrl->val + imx378->cur_mode->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) case V4L2_CID_HFLIP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) if (ctrl->val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) imx378->flip |= IMX378_MIRROR_BIT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) imx378->flip &= ~IMX378_MIRROR_BIT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) case V4L2_CID_VFLIP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) if (ctrl->val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) imx378->flip |= IMX378_FLIP_BIT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) imx378->flip &= ~IMX378_FLIP_BIT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) case V4L2_CID_TEST_PATTERN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) ret = imx378_enable_test_pattern(imx378, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) __func__, ctrl->id, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) pm_runtime_put(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) static const struct v4l2_ctrl_ops imx378_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) .s_ctrl = imx378_set_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) static int imx378_initialize_controls(struct imx378 *imx378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) const struct imx378_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) struct v4l2_ctrl_handler *handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) s64 exposure_max, vblank_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) u32 h_blank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) handler = &imx378->ctrl_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) mode = imx378->cur_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) ret = v4l2_ctrl_handler_init(handler, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) handler->lock = &imx378->mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) imx378->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) V4L2_CID_LINK_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) 0, 0, link_freq_menu_items);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) if (imx378->cur_mode->bus_fmt == MEDIA_BUS_FMT_SRGGB10_1X10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) imx378->cur_link_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) imx378->cur_pixel_rate = PIXEL_RATE_WITH_848M_10BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) } else if (imx378->cur_mode->bus_fmt == MEDIA_BUS_FMT_SRGGB12_1X12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) imx378->cur_link_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) imx378->cur_pixel_rate = PIXEL_RATE_WITH_848M_12BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) imx378->pixel_rate = v4l2_ctrl_new_std(handler, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) V4L2_CID_PIXEL_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) 0, PIXEL_RATE_WITH_848M_10BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) 1, imx378->cur_pixel_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) v4l2_ctrl_s_ctrl(imx378->link_freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) imx378->cur_link_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) h_blank = mode->hts_def - mode->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) imx378->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) h_blank, h_blank, 1, h_blank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) if (imx378->hblank)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) imx378->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) vblank_def = mode->vts_def - mode->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) imx378->vblank = v4l2_ctrl_new_std(handler, &imx378_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) V4L2_CID_VBLANK, vblank_def,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) IMX378_VTS_MAX - mode->height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) 1, vblank_def);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) imx378->cur_vts = mode->vts_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) exposure_max = mode->vts_def - 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) imx378->exposure = v4l2_ctrl_new_std(handler, &imx378_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) V4L2_CID_EXPOSURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) IMX378_EXPOSURE_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) exposure_max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) IMX378_EXPOSURE_STEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) mode->exp_def);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) imx378->anal_gain = v4l2_ctrl_new_std(handler, &imx378_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) V4L2_CID_ANALOGUE_GAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) IMX378_GAIN_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) IMX378_GAIN_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) IMX378_GAIN_STEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) IMX378_GAIN_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) imx378->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) &imx378_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) V4L2_CID_TEST_PATTERN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) ARRAY_SIZE(imx378_test_pattern_menu) - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) 0, 0, imx378_test_pattern_menu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) imx378->h_flip = v4l2_ctrl_new_std(handler, &imx378_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) V4L2_CID_HFLIP, 0, 1, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) imx378->v_flip = v4l2_ctrl_new_std(handler, &imx378_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) V4L2_CID_VFLIP, 0, 1, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) imx378->flip = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) if (handler->error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) ret = handler->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) dev_err(&imx378->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) "Failed to init controls( %d )\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) goto err_free_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) imx378->subdev.ctrl_handler = handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) imx378->has_init_exp = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) err_free_handler:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) v4l2_ctrl_handler_free(handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) static int imx378_check_sensor_id(struct imx378 *imx378,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) struct device *dev = &imx378->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) u16 id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) u32 reg_H = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) u32 reg_L = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) ret = imx378_read_reg(client, IMX378_REG_CHIP_ID_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) IMX378_REG_VALUE_08BIT, ®_H);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) ret |= imx378_read_reg(client, IMX378_REG_CHIP_ID_L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) IMX378_REG_VALUE_08BIT, ®_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) id = ((reg_H << 8) & 0xff00) | (reg_L & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) if (!(reg_H == (CHIP_ID >> 8) || reg_L == (CHIP_ID & 0xff))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) dev_info(dev, "detected imx378 %04x sensor\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) static int imx378_configure_regulators(struct imx378 *imx378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) for (i = 0; i < IMX378_NUM_SUPPLIES; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) imx378->supplies[i].supply = imx378_supply_names[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) return devm_regulator_bulk_get(&imx378->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) IMX378_NUM_SUPPLIES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) imx378->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) static int imx378_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) struct device_node *node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) struct imx378 *imx378;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) char facing[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) u32 i, hdr_mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) dev_info(dev, "driver version: %02x.%02x.%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) DRIVER_VERSION >> 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) (DRIVER_VERSION & 0xff00) >> 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) DRIVER_VERSION & 0x00ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) imx378 = devm_kzalloc(dev, sizeof(*imx378), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) if (!imx378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) &imx378->module_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) &imx378->module_facing);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) &imx378->module_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) &imx378->len_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) dev_err(dev, "could not get module information!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) ret = of_property_read_u32(node, OF_CAMERA_HDR_MODE, &hdr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) hdr_mode = NO_HDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) dev_warn(dev, " Get hdr mode failed! no hdr default\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) imx378->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) imx378->cfg_num = ARRAY_SIZE(supported_modes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) for (i = 0; i < imx378->cfg_num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) if (hdr_mode == supported_modes[i].hdr_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) imx378->cur_mode = &supported_modes[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) if (i == imx378->cfg_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) imx378->cur_mode = &supported_modes[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) imx378->xvclk = devm_clk_get(dev, "xvclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) if (IS_ERR(imx378->xvclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) dev_err(dev, "Failed to get xvclk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) imx378->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) if (IS_ERR(imx378->reset_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) dev_warn(dev, "Failed to get reset-gpios\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) imx378->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) if (IS_ERR(imx378->pwdn_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) dev_warn(dev, "Failed to get pwdn-gpios\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) ret = imx378_configure_regulators(imx378);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) dev_err(dev, "Failed to get power regulators\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) mutex_init(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) sd = &imx378->subdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) v4l2_i2c_subdev_init(sd, client, &imx378_subdev_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) ret = imx378_initialize_controls(imx378);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) goto err_destroy_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) ret = __imx378_power_on(imx378);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) goto err_free_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) ret = imx378_check_sensor_id(imx378, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) goto err_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) sd->internal_ops = &imx378_internal_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) #if defined(CONFIG_MEDIA_CONTROLLER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) imx378->pad.flags = MEDIA_PAD_FL_SOURCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) ret = media_entity_pads_init(&sd->entity, 1, &imx378->pad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) goto err_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) memset(facing, 0, sizeof(facing));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) if (strcmp(imx378->module_facing, "back") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) facing[0] = 'b';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) facing[0] = 'f';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) imx378->module_index, facing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) IMX378_NAME, dev_name(sd->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950) ret = v4l2_async_register_subdev_sensor_common(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) dev_err(dev, "v4l2 async register subdev failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) goto err_clean_entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) pm_runtime_set_active(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) pm_runtime_idle(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) err_clean_entity:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) #if defined(CONFIG_MEDIA_CONTROLLER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) media_entity_cleanup(&sd->entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) err_power_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) __imx378_power_off(imx378);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) err_free_handler:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) v4l2_ctrl_handler_free(&imx378->ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) err_destroy_mutex:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) mutex_destroy(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) static int imx378_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979) struct imx378 *imx378 = to_imx378(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) v4l2_async_unregister_subdev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) #if defined(CONFIG_MEDIA_CONTROLLER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) media_entity_cleanup(&sd->entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) v4l2_ctrl_handler_free(&imx378->ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) mutex_destroy(&imx378->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) pm_runtime_disable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) if (!pm_runtime_status_suspended(&client->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) __imx378_power_off(imx378);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991) pm_runtime_set_suspended(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) #if IS_ENABLED(CONFIG_OF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) static const struct of_device_id imx378_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) { .compatible = "sony,imx378" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) MODULE_DEVICE_TABLE(of, imx378_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) static const struct i2c_device_id imx378_match_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) { "sony,imx378", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) static struct i2c_driver imx378_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) .name = IMX378_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) .pm = &imx378_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) .of_match_table = of_match_ptr(imx378_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) .probe = &imx378_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) .remove = &imx378_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) .id_table = imx378_match_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) static int __init sensor_mod_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) return i2c_add_driver(&imx378_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) static void __exit sensor_mod_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) i2c_del_driver(&imx378_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) device_initcall_sync(sensor_mod_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) module_exit(sensor_mod_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) MODULE_DESCRIPTION("Sony imx378 sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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