Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2022 Rockchip Electronics Co. Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Author: Jianwei Fan <jianwei.fan@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * V0.0X01.0X00 first version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * V0.0X01.0X01 add device attr hdmirxsel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * V0.0X01.0X02 add device attr hdmiautoswitch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) // #define DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/miscdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/cdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/i2c-dev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/notifier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/printk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/kobject.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/version.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define DRIVER_VERSION		KERNEL_VERSION(0, 0x01, 0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define DRIVER_NAME		"EP9461E"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /*control reg*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define RX_SIGNAL_DETECT	0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define GENERAL_CONTROL		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define RX_SEL_CONTROL		0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define EDID_ENABLE		0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define ENTER_CODE		0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) /*control mask*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define MASK_RX0_SIGNAL		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define MASK_AUTO_SWITCH	0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define MASK_CEC_SWITCH		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define MASK_POWER		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define MASK_RX_SEL		0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) struct ep9461e_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct		device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct		miscdevice miscdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct		i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct		mutex confctl_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	struct		timer_list timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	struct		delayed_work work_i2c_poll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	bool		auto_switch_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	bool		power_up_chip_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	bool		cec_switch_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	bool		nosignal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	u32		hdmi_rx_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	int		err_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static struct ep9461e_dev *g_ep9461e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static struct ep9461e_dev *ep9461e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) static void ep9461e_rx_select(struct ep9461e_dev *ep9461e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static void ep9461e_rx_manual_select(struct ep9461e_dev *ep9461e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static void i2c_wr(struct ep9461e_dev *ep9461e, u16 reg, u8 *val, u32 n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct i2c_msg msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct i2c_client *client = ep9461e->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	u8 data[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	data[0] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	memcpy(&data[1], val, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	msg.addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	msg.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	msg.buf = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	msg.len = n + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	err = i2c_transfer(client->adapter, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	if (err != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		dev_err(ep9461e->dev, "writing register 0x%x from 0x%x failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 			reg, client->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		switch (n) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 			dev_dbg(ep9461e->dev, "I2C write 0x%02x = 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				reg, data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			dev_dbg(ep9461e->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 				"I2C write 0x%02x = 0x%02x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 				reg, data[2], data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 			dev_dbg(ep9461e->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 				"I2C write 0x%02x = 0x%02x%02x%02x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				reg, data[4], data[3], data[2], data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			dev_dbg(ep9461e->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				"I2C write %d bytes from address 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 				n, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static void i2c_rd(struct ep9461e_dev *ep9461e, u16 reg, u8 *val, u32 n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	struct i2c_msg msg[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	struct i2c_client *client = ep9461e->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	u8 buf[1] = { reg };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	/*msg[0] addr to read*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	msg[0].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	msg[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	msg[0].buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	msg[0].len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	/*msg[1] read data*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	msg[1].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	msg[1].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	msg[1].buf = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	msg[1].len = n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	err = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	if (err != ARRAY_SIZE(msg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		dev_err(ep9461e->dev, "reading register 0x%x from 0x%x failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			reg, client->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static void i2c_rd8(struct ep9461e_dev *ep9461e, u16 reg, u8 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	i2c_rd(ep9461e, reg, val, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static void i2c_wr8(struct ep9461e_dev *ep9461e, u16 reg, u8 buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	i2c_wr(ep9461e, reg, &buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static void i2c_wr8_and_or(struct ep9461e_dev *ep9461e, u16 reg, u32 mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			   u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	u8 val_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	i2c_rd8(ep9461e, reg, &val_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	i2c_wr8(ep9461e, reg, (val_p & mask) | val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static long ep9461e_ioctl(struct file *file, uint32_t cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static ssize_t ep9461e_write(struct file *file, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			     size_t size, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static ssize_t ep9461e_read(struct file *file, char __user *buf, size_t size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			    loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static ssize_t hdmirxsel_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 				      struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	struct ep9461e_dev *ep9461e = g_ep9461e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	dev_info(ep9461e->dev, "%s: hdmi rx select state: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			__func__, ep9461e->hdmi_rx_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	return sprintf(buf, "%d\n", ep9461e->hdmi_rx_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static ssize_t hdmirxsel_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 				       struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 				       const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	struct ep9461e_dev *ep9461e = g_ep9461e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	u32 hdmirxstate = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	ret = kstrtouint(buf, 10, &hdmirxstate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		dev_dbg(ep9461e->dev, "state: %d\n", hdmirxstate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		ep9461e->hdmi_rx_sel = hdmirxstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		if (ep9461e->auto_switch_en | ep9461e->cec_switch_en)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 			ep9461e->auto_switch_en = ep9461e->cec_switch_en = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		ep9461e_rx_select(ep9461e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		dev_err(ep9461e->dev, "write hdmi_rx_sel failed!!!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static ssize_t hdmiautoswitch_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 				      struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	struct ep9461e_dev *ep9461e = g_ep9461e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	dev_info(ep9461e->dev, "hdmi rx select auto_switch state: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 				ep9461e->auto_switch_en);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	return sprintf(buf, "%d\n", ep9461e->auto_switch_en);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static ssize_t hdmiautoswitch_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 					    struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 					    const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	struct ep9461e_dev *ep9461e = g_ep9461e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	u32 hdmiautoswitch = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	ret = kstrtouint(buf, 10, &hdmiautoswitch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		dev_dbg(ep9461e->dev, "state: %d\n", hdmiautoswitch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		ep9461e->auto_switch_en = hdmiautoswitch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		ep9461e_rx_select(ep9461e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		dev_err(ep9461e->dev, "write hdmi auto switch failed!!!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static DEVICE_ATTR_RW(hdmirxsel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static DEVICE_ATTR_RW(hdmiautoswitch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static inline bool detect_rx_signal(struct ep9461e_dev *ep9461e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	i2c_rd8(ep9461e, RX_SIGNAL_DETECT, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	if (!(val & MASK_RX0_SIGNAL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static void ep9461e_init(struct ep9461e_dev *ep9461e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	ep9461e->power_up_chip_en = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	ep9461e->auto_switch_en = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	ep9461e->hdmi_rx_sel = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	ep9461e->err_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	if (ep9461e->power_up_chip_en) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		i2c_wr8_and_or(ep9461e, GENERAL_CONTROL, ~MASK_POWER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 			       MASK_POWER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	ep9461e_rx_select(ep9461e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	schedule_delayed_work(&ep9461e->work_i2c_poll, msecs_to_jiffies(1000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static void ep9461e_rx_manual_select(struct ep9461e_dev *ep9461e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	i2c_wr8(ep9461e, RX_SEL_CONTROL, ep9461e->hdmi_rx_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static void ep9461e_rx_select(struct ep9461e_dev *ep9461e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	if (ep9461e->auto_switch_en) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		i2c_wr8_and_or(ep9461e, GENERAL_CONTROL, ~MASK_AUTO_SWITCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 			       MASK_AUTO_SWITCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		ep9461e_rx_manual_select(ep9461e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	ret = detect_rx_signal(ep9461e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		dev_info(ep9461e->dev, "Detect HDMI RX valid signal!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		dev_err(ep9461e->dev, "HDMI RX has no valid signal!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static void ep9461e_work_i2c_poll(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	struct delayed_work *dwork = to_delayed_work(work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	struct ep9461e_dev *ep9461e =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		container_of(dwork, struct ep9461e_dev, work_i2c_poll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	ret = detect_rx_signal(ep9461e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	if (!ret && (ep9461e->err_cnt < 10)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		ep9461e->err_cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		dev_err(ep9461e->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 			"ERROR: HDMI RX has no valid signal, err cnt: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 			ep9461e->err_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		if (ep9461e->err_cnt >= 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 			dev_err(ep9461e->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 				"error count greater than 10, please check HDMIRX!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	} else if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		ep9461e->err_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	schedule_delayed_work(&ep9461e->work_i2c_poll, msecs_to_jiffies(1000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static const struct file_operations ep9461e_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	.read = ep9461e_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	.write = ep9461e_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	.unlocked_ioctl = ep9461e_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct miscdevice ep9461e_miscdev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	.minor = MISC_DYNAMIC_MINOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	.name = "ep9461e_dev",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	.fops = &ep9461e_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static int ep9461e_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 			 const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	struct ep9461e_dev *ep9461e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	dev_info(dev, "driver version: %02x.%02x.%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		DRIVER_VERSION >> 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		(DRIVER_VERSION & 0xff00) >> 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		DRIVER_VERSION & 0x00ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	dev_info(dev, "chip found @ 0x%x (%s)\n", client->addr << 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		client->adapter->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	ep9461e = devm_kzalloc(dev, sizeof(struct ep9461e_dev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	if (!ep9461e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	ep9461e->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	ep9461e->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	client->flags |= I2C_CLIENT_SCCB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	ret = misc_register(&ep9461e_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		dev_err(ep9461e->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 			"EP9461E ERROR: could not register ep9461e device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	mutex_init(&ep9461e->confctl_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	ret = device_create_file(ep9461e_miscdev.this_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 				&dev_attr_hdmirxsel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		dev_err(ep9461e->dev, "failed to create attr hdmirxsel!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		goto err1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	ret = device_create_file(ep9461e_miscdev.this_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 				&dev_attr_hdmiautoswitch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 		dev_err(ep9461e->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 			"failed to create attr hdmiautoswitch!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	INIT_DELAYED_WORK(&ep9461e->work_i2c_poll, ep9461e_work_i2c_poll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	ep9461e_init(ep9461e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	g_ep9461e = ep9461e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	dev_info(ep9461e->dev, "%s found @ 0x%x (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 				client->name, client->addr << 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 				client->adapter->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	device_remove_file(ep9461e_miscdev.this_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 			  &dev_attr_hdmirxsel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) err1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	misc_deregister(&ep9461e_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int ep9461e_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	cancel_delayed_work_sync(&ep9461e->work_i2c_poll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	device_remove_file(ep9461e_miscdev.this_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 			  &dev_attr_hdmirxsel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	device_remove_file(ep9461e_miscdev.this_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 			  &dev_attr_hdmiautoswitch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	mutex_destroy(&ep9461e->confctl_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	misc_deregister(&ep9461e_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static const struct of_device_id ep9461e_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	{ .compatible = "semiconn,ep9461e" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) MODULE_DEVICE_TABLE(of, ep9461e_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) static struct i2c_driver ep9461e_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	.probe = ep9461e_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	.remove = ep9461e_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 		.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 		.name = DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 		.of_match_table = of_match_ptr(ep9461e_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static int __init ep9461e_driver_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	return i2c_add_driver(&ep9461e_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static void __exit ep9461e_driver_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	i2c_del_driver(&ep9461e_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) device_initcall_sync(ep9461e_driver_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) module_exit(ep9461e_driver_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) MODULE_DESCRIPTION("semiconn EP9461E 4 HDMI in switch driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) MODULE_AUTHOR("Jianwei Fan <jianwei.fan@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) MODULE_LICENSE("GPL v2");