^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * dw9714 vcm driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2022 Fuzhou Rockchip Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/rk-camera-module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/version.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/rk_vcm_head.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define DW9714_NAME "dw9714"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define DW9714_MAX_CURRENT 120U
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DW9714_MAX_REG 1023U
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DW9714_GRADUAL_MOVELENS_STEPS 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DW9714_DEFAULT_START_CURRENT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DW9714_DEFAULT_RATED_CURRENT 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DW9714_DEFAULT_STEP_MODE 0xd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DW9714_DEFAULT_DLC_EN 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DW9714_DEFAULT_MCLK 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define DW9714_DEFAULT_T_SRC 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define REG_NULL 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* dw9714p advanced mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DW9714_ADVMODE_IC_INFO 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define DW9714_ADVMODE_IC_VER 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DW9714_ADVMODE_CONTROL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define DW9714_ADVMODE_VCM_MSB 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define DW9714_ADVMODE_VCM_LSB 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define DW9714_ADVMODE_STATUS 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define DW9714_ADVMODE_SAC_CFG 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define DW9714_ADVMODE_PRESC 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define DW9714_ADVMODE_SAC_TIME 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define DW9714_ADVMODE_PRESET 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define DW9714_ADVMODE_NRC 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define DW9714_ADVMODE_RING_EN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define DW9714_DEFAULT_ADVMODE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define DW9714_DEFAULT_SAC_MODE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define DW9714_DEFAULT_SAC_TIME 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define DW9714_DEFAULT_SAC_PRESCL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define DW9714_DEFAULT_NRC_EN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define DW9714_DEFAULT_NRC_MODE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define DW9714_DEFAULT_NRC_PRESET 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define DW9714_DEFAULT_NRC_INFL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define DW9714_DEFAULT_NRC_TIME 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* dw9714 device structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct dw9714_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct v4l2_ctrl_handler ctrls_vcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct v4l2_ctrl *focus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct v4l2_subdev sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct v4l2_device vdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u16 current_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) unsigned short current_related_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) unsigned short current_lens_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned int max_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) unsigned int start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) unsigned int rated_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) unsigned int step_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned int vcm_movefull_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned int dlc_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned int t_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned int mclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned int max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* advanced mode*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned char adcanced_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned char sac_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned char sac_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned char sac_prescl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned char nrc_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned char nrc_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned char nrc_preset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned char nrc_infl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned char nrc_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct __kernel_old_timeval start_move_tv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct __kernel_old_timeval end_move_tv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned long move_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) u32 module_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) const char *module_facing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct rk_cam_vcm_cfg vcm_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct gpio_desc *xsd_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct TimeTabel_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned int t_src;/* time of slew rate control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned int step00;/* S[1:0] /MCLK[1:0] step period */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned int step01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) unsigned int step10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) unsigned int step11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static const struct TimeTabel_s dw9714_lsc_time_table[] = {/* 1/10us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {0b10000, 1360, 2720, 5440, 10880},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {0b10001, 1300, 2600, 5200, 10400},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {0b10010, 1250, 2500, 5000, 10000},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {0b10011, 1200, 2400, 4800, 9600},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {0b10100, 1160, 2320, 4640, 9280},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {0b10101, 1120, 2240, 4480, 8960},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {0b10110, 1080, 2160, 4320, 8640},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {0b10111, 1040, 2080, 4160, 8320},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {0b11000, 1010, 2020, 4040, 8080},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {0b11001, 980, 1960, 3920, 7840},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {0b11010, 950, 1900, 3800, 7600},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {0b11011, 920, 1840, 3680, 7360},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {0b11100, 890, 1780, 3560, 7120},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {0b11101, 870, 1740, 3480, 6960},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {0b11110, 850, 1700, 3400, 6800},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {0b11111, 830, 1660, 3320, 6640},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {0b00000, 810, 1620, 3240, 6480},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {0b00001, 790, 1580, 3160, 6320},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {0b00010, 775, 1550, 3100, 6200},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {0b00011, 760, 1520, 3040, 6080},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {0b00100, 745, 1490, 2980, 5960},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {0b00101, 730, 1460, 2920, 5840},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {0b00110, 715, 1430, 2860, 5720},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {0b00111, 700, 1400, 2800, 5600},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {0b01000, 690, 1380, 2760, 5520},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {0b01001, 680, 1360, 2720, 5440},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {0b01010, 670, 1340, 2680, 5360},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {0b01011, 660, 1320, 2640, 5280},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {0b01100, 655, 1310, 2620, 5240},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {0b01101, 650, 1300, 2600, 5200},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {0b01110, 645, 1290, 2580, 5160},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {0b01111, 640, 1280, 2560, 5120},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {REG_NULL, 0, 0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static const struct TimeTabel_s dw9714_dlc_time_table[] = {/* us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {0b10000, 21250, 10630, 5310, 2660},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {0b10001, 20310, 10160, 5080, 2540},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {0b10010, 19530, 9770, 4880, 2440},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {0b10011, 18750, 9380, 4690, 2340},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {0b10100, 18130, 9060, 4530, 2270},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {0b10101, 17500, 8750, 4380, 2190},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {0b10110, 16880, 8440, 4220, 2110},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {0b10111, 16250, 8130, 4060, 2030},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {0b11000, 15780, 7890, 3950, 1970},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {0b11001, 15310, 7660, 3830, 1910},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {0b11010, 14840, 7420, 3710, 1860},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {0b11011, 14380, 7190, 3590, 1800},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {0b11100, 13910, 6950, 3480, 1740},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {0b11101, 13590, 6800, 3400, 1700},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {0b11110, 13280, 6640, 3320, 1660},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {0b11111, 12970, 6480, 3240, 1620},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {0b00000, 12660, 6330, 3160, 1580},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {0b00001, 12340, 6170, 3090, 1540},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {0b00010, 12110, 6050, 3030, 1510},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {0b00011, 11880, 5940, 2970, 1480},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {0b00100, 11640, 5820, 2910, 1460},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {0b00101, 11410, 5700, 2850, 1430},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {0b00110, 11170, 5590, 2790, 1400},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {0b00111, 10940, 5470, 2730, 1370},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {0b01000, 10780, 5390, 2700, 1350},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {0b01001, 10630, 5310, 2660, 1330},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {0b01010, 10470, 5230, 2620, 1310},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {0b01011, 10310, 5160, 2580, 1290},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {0b01100, 10230, 5120, 2560, 1280},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {0b01101, 10160, 5080, 2540, 1270},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {0b01110, 10080, 5040, 2520, 1260},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {0b01111, 10000, 5000, 2500, 1250},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {REG_NULL, 0, 0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static inline struct dw9714_device *to_dw9714_vcm(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return container_of(ctrl->handler, struct dw9714_device, ctrls_vcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static inline struct dw9714_device *sd_to_dw9714_vcm(struct v4l2_subdev *subdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return container_of(subdev, struct dw9714_device, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int dw9714_read_msg(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) unsigned char *msb, unsigned char *lsb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct i2c_msg msg[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) unsigned char data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) int retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (!client->adapter) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) dev_err(&client->dev, "client->adapter NULL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) for (retries = 0; retries < 5; retries++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) msg->addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) msg->flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) msg->len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) msg->buf = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ret = i2c_transfer(client->adapter, msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (ret == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) "%s: vcm i2c ok, addr 0x%x, data 0x%x, 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) __func__, msg->addr, data[0], data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) *msb = data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) *lsb = data[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) "retrying I2C... %d\n", retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) retries++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) "%s: i2c read to failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static int dw9714_write_msg(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) u8 msb, u8 lsb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) struct i2c_msg msg[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) unsigned char data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) int retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (!client->adapter) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) dev_err(&client->dev, "client->adapter NULL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) for (retries = 0; retries < 5; retries++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) msg->addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) msg->flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) msg->len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) msg->buf = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) data[0] = msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) data[1] = lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ret = i2c_transfer(client->adapter, msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) usleep_range(50, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (ret == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) "%s: vcm i2c ok, addr 0x%x, data 0x%x, 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) __func__, msg->addr, data[0], data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) "retrying I2C... %d\n", retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) "i2c write to failed with error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /* Write registers up to 4 at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static int dw9714_write_reg(struct i2c_client *client, u8 reg, u32 len, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u32 buf_i, val_i, retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) u8 buf[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) u8 *val_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) __be32 val_be;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (len > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) buf[0] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) val_be = cpu_to_be32(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) val_p = (u8 *)&val_be;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) buf_i = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) val_i = 4 - len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) while (val_i < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) buf[buf_i++] = val_p[val_i++];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) for (retries = 0; retries < 5; retries++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (i2c_master_send(client, buf, len + 1) == len + 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) "%s: vcm i2c ok, reg 0x%x, val 0x%x, len 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) __func__, reg, val, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) "retrying I2C... %d\n", retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) dev_err(&client->dev, "Failed to write 0x%04x,0x%x\n", reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /* Read registers up to 4 at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static int dw9714_read_reg(struct i2c_client *client, u8 reg, u32 len, u32 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) struct i2c_msg msgs[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) __be32 data_be = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) u8 *data_be_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) u32 retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (len > 4 || !len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) data_be_p = (u8 *)&data_be;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* Write register address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) msgs[0].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) msgs[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) msgs[0].len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) msgs[0].buf = (u8 *)®
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /* Read data from register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) msgs[1].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) msgs[1].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) msgs[1].len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) msgs[1].buf = &data_be_p[4 - len];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) for (retries = 0; retries < 5; retries++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (ret == ARRAY_SIZE(msgs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) *val = be32_to_cpu(data_be);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) "%s: vcm i2c ok, reg 0x%x, val 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) __func__, reg, *val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) "%s: i2c read to failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static unsigned int dw9714_move_time(struct dw9714_device *dev_vcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) unsigned int move_pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) unsigned int move_time_ms = 200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) unsigned int step_period_lsc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) unsigned int step_period_dlc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) unsigned int codes_per_step = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) unsigned int step_case;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) unsigned int sac_prescl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) int table_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (dev_vcm->adcanced_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) // sac setting time = tvib = (3.81ms+(SACT[6:0]*0.03ms)) * PRESC[1:0]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) sac_prescl = 1 << dev_vcm->sac_prescl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) move_time_ms = (((381 + 3 * dev_vcm->sac_time)) * sac_prescl + 99) / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return move_time_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) } else if (dev_vcm->dlc_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) step_case = dev_vcm->mclk & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) table_cnt = sizeof(dw9714_dlc_time_table) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) sizeof(struct TimeTabel_s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) for (i = 0; i < table_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (dw9714_dlc_time_table[i].t_src == dev_vcm->t_src)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) step_case = dev_vcm->step_mode & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) table_cnt = sizeof(dw9714_lsc_time_table) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) sizeof(struct TimeTabel_s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) for (i = 0; i < table_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (dw9714_lsc_time_table[i].t_src == dev_vcm->t_src)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (i >= table_cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) switch (step_case) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) step_period_lsc = dw9714_lsc_time_table[i].step00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) step_period_dlc = dw9714_dlc_time_table[i].step00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) step_period_lsc = dw9714_lsc_time_table[i].step01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) step_period_dlc = dw9714_dlc_time_table[i].step01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) step_period_lsc = dw9714_lsc_time_table[i].step10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) step_period_dlc = dw9714_dlc_time_table[i].step10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) step_period_lsc = dw9714_lsc_time_table[i].step11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) step_period_dlc = dw9714_dlc_time_table[i].step11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) "%s: step_case is error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) __func__, step_case);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) codes_per_step = (dev_vcm->step_mode & 0x0c) >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (codes_per_step > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) codes_per_step = 1 << (codes_per_step - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (!dev_vcm->dlc_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (!codes_per_step)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) move_time_ms = (step_period_lsc * move_pos + 9999) / 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) move_time_ms = (step_period_lsc * move_pos / codes_per_step + 9999) / 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) move_time_ms = (step_period_dlc + 999) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return move_time_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static int dw9714_get_dac(struct dw9714_device *dev_vcm, unsigned int *cur_dac)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) unsigned char lsb = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) unsigned char msb = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) unsigned int abs_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (dev_vcm->adcanced_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) ret = dw9714_read_reg(client, DW9714_ADVMODE_VCM_MSB, 2, &abs_step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ret = dw9714_read_msg(client, &msb, &lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) abs_step = (((unsigned int)(msb & 0x3FU)) << 4U) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) (((unsigned int)lsb) >> 4U);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) *cur_dac = abs_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) dev_dbg(&client->dev, "%s: get dac %d\n", __func__, *cur_dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) "%s: failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static int dw9714_set_dac(struct dw9714_device *dev_vcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) unsigned int dest_dac)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (dev_vcm->adcanced_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) bool vcm_idle = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /* wait for I2C bus idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) vcm_idle = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) for (i = 0; i < 10; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) unsigned int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) dw9714_read_reg(client, DW9714_ADVMODE_STATUS, 1, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) status &= 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (status == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) vcm_idle = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) usleep_range(1000, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (!vcm_idle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) "%s: watting 0x05 flag timeout!\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) /* vcm move */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) ret = dw9714_write_reg(client, DW9714_ADVMODE_VCM_MSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 2, dest_dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) unsigned char msb, lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) msb = (0x00U | ((dest_dac & 0x3F0U) >> 4U));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) lsb = (((dest_dac & 0x0FU) << 4U) | dev_vcm->step_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) ret = dw9714_write_msg(client, msb, lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) "%s: failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static int dw9714_get_pos(struct dw9714_device *dev_vcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) unsigned int *cur_pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) unsigned int dac, position, range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) range = dev_vcm->rated_current - dev_vcm->start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ret = dw9714_get_dac(dev_vcm, &dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) if (dac <= dev_vcm->start_current) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) position = dev_vcm->max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) } else if ((dac > dev_vcm->start_current) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) (dac <= dev_vcm->rated_current)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) position = (dac - dev_vcm->start_current) * dev_vcm->max_logicalpos / range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) position = dev_vcm->max_logicalpos - position;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) position = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) *cur_pos = position;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) dev_dbg(&client->dev, "%s: get position %d, dac %d\n", __func__, *cur_pos, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) "%s: failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static int dw9714_set_pos(struct dw9714_device *dev_vcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) unsigned int dest_pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) unsigned int position;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) unsigned int range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) range = dev_vcm->rated_current - dev_vcm->start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (dest_pos >= dev_vcm->max_logicalpos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) position = dev_vcm->start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) position = dev_vcm->start_current +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) (range * (dev_vcm->max_logicalpos - dest_pos) / dev_vcm->max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if (position > DW9714_MAX_REG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) position = DW9714_MAX_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) dev_vcm->current_lens_pos = position;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) dev_vcm->current_related_pos = dest_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) ret = dw9714_set_dac(dev_vcm, position);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) dev_dbg(&client->dev, "%s: set position %d, dac %d\n", __func__, dest_pos, position);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) static int dw9714_get_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) struct dw9714_device *dev_vcm = to_dw9714_vcm(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (ctrl->id == V4L2_CID_FOCUS_ABSOLUTE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return dw9714_get_pos(dev_vcm, &ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static int dw9714_set_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) struct dw9714_device *dev_vcm = to_dw9714_vcm(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) unsigned int dest_pos = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) int move_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) long mv_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (ctrl->id == V4L2_CID_FOCUS_ABSOLUTE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) if (dest_pos > dev_vcm->max_logicalpos) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) "%s dest_pos is error. %d > %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) __func__, dest_pos, dev_vcm->max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) /* calculate move time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) move_pos = dev_vcm->current_related_pos - dest_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (move_pos < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) move_pos = -move_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) ret = dw9714_set_pos(dev_vcm, dest_pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) if (dev_vcm->dlc_enable || dev_vcm->adcanced_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) dev_vcm->move_ms = dev_vcm->vcm_movefull_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) dev_vcm->move_ms =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) ((dev_vcm->vcm_movefull_t * (uint32_t)move_pos) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) dev_vcm->max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) "dest_pos %d, dac %d, move_ms %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) dest_pos, dev_vcm->current_lens_pos, dev_vcm->move_ms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) dev_vcm->start_move_tv = ns_to_kernel_old_timeval(ktime_get_ns());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) mv_us = dev_vcm->start_move_tv.tv_usec +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) dev_vcm->move_ms * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) if (mv_us >= 1000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) dev_vcm->end_move_tv.tv_sec =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) dev_vcm->start_move_tv.tv_sec + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) dev_vcm->end_move_tv.tv_usec = mv_us - 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) dev_vcm->end_move_tv.tv_sec =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) dev_vcm->start_move_tv.tv_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) dev_vcm->end_move_tv.tv_usec = mv_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) static const struct v4l2_ctrl_ops dw9714_vcm_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) .g_volatile_ctrl = dw9714_get_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .s_ctrl = dw9714_set_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) static int dw9714_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) rval = pm_runtime_get_sync(sd->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (rval < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) pm_runtime_put_noidle(sd->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static int dw9714_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) pm_runtime_put(sd->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) static const struct v4l2_subdev_internal_ops dw9714_int_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) .open = dw9714_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .close = dw9714_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) static void dw9714_update_vcm_cfg(struct dw9714_device *dev_vcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if (dev_vcm->max_current == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) dev_err(&client->dev, "max current is zero");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) dev_vcm->start_current = dev_vcm->vcm_cfg.start_ma *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) DW9714_MAX_REG / dev_vcm->max_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) dev_vcm->rated_current = dev_vcm->vcm_cfg.rated_ma *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) DW9714_MAX_REG / dev_vcm->max_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) dev_vcm->step_mode = dev_vcm->vcm_cfg.step_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) "vcm_cfg: %d, %d, %d, max_current %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) dev_vcm->vcm_cfg.start_ma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) dev_vcm->vcm_cfg.rated_ma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) dev_vcm->vcm_cfg.step_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) dev_vcm->max_current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) static long dw9714_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) struct dw9714_device *dev_vcm = sd_to_dw9714_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) struct rk_cam_vcm_tim *vcm_tim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) struct rk_cam_vcm_cfg *vcm_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) unsigned int max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (cmd == RK_VIDIOC_VCM_TIMEINFO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) vcm_tim = (struct rk_cam_vcm_tim *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) vcm_tim->vcm_start_t.tv_sec = dev_vcm->start_move_tv.tv_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) vcm_tim->vcm_start_t.tv_usec =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) dev_vcm->start_move_tv.tv_usec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) vcm_tim->vcm_end_t.tv_sec = dev_vcm->end_move_tv.tv_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) vcm_tim->vcm_end_t.tv_usec = dev_vcm->end_move_tv.tv_usec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) dev_dbg(&client->dev, "dw9714_get_move_res 0x%lx, 0x%lx, 0x%lx, 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) vcm_tim->vcm_start_t.tv_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) vcm_tim->vcm_start_t.tv_usec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) vcm_tim->vcm_end_t.tv_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) vcm_tim->vcm_end_t.tv_usec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) } else if (cmd == RK_VIDIOC_GET_VCM_CFG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) vcm_cfg = (struct rk_cam_vcm_cfg *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) vcm_cfg->start_ma = dev_vcm->vcm_cfg.start_ma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) vcm_cfg->rated_ma = dev_vcm->vcm_cfg.rated_ma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) vcm_cfg->step_mode = dev_vcm->vcm_cfg.step_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) } else if (cmd == RK_VIDIOC_SET_VCM_CFG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) vcm_cfg = (struct rk_cam_vcm_cfg *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) dev_vcm->vcm_cfg.start_ma = vcm_cfg->start_ma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) dev_vcm->vcm_cfg.rated_ma = vcm_cfg->rated_ma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) dev_vcm->vcm_cfg.step_mode = vcm_cfg->step_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) dw9714_update_vcm_cfg(dev_vcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) } else if (cmd == RK_VIDIOC_SET_VCM_MAX_LOGICALPOS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) max_logicalpos = *(unsigned int *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (max_logicalpos > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) dev_vcm->max_logicalpos = max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) __v4l2_ctrl_modify_range(dev_vcm->focus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) 0, dev_vcm->max_logicalpos, 1, dev_vcm->max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) "max_logicalpos %d\n", max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) "cmd 0x%x not supported\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) static long dw9714_compat_ioctl32(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) void __user *up = compat_ptr(arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) struct rk_cam_compat_vcm_tim compat_vcm_tim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) struct rk_cam_vcm_tim vcm_tim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) struct rk_cam_vcm_cfg vcm_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) unsigned int max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) long ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) if (cmd == RK_VIDIOC_COMPAT_VCM_TIMEINFO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) struct rk_cam_compat_vcm_tim __user *p32 = up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) ret = dw9714_ioctl(sd, RK_VIDIOC_VCM_TIMEINFO, &vcm_tim);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) compat_vcm_tim.vcm_start_t.tv_sec = vcm_tim.vcm_start_t.tv_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) compat_vcm_tim.vcm_start_t.tv_usec = vcm_tim.vcm_start_t.tv_usec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) compat_vcm_tim.vcm_end_t.tv_sec = vcm_tim.vcm_end_t.tv_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) compat_vcm_tim.vcm_end_t.tv_usec = vcm_tim.vcm_end_t.tv_usec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) put_user(compat_vcm_tim.vcm_start_t.tv_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) &p32->vcm_start_t.tv_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) put_user(compat_vcm_tim.vcm_start_t.tv_usec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) &p32->vcm_start_t.tv_usec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) put_user(compat_vcm_tim.vcm_end_t.tv_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) &p32->vcm_end_t.tv_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) put_user(compat_vcm_tim.vcm_end_t.tv_usec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) &p32->vcm_end_t.tv_usec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) } else if (cmd == RK_VIDIOC_GET_VCM_CFG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) ret = dw9714_ioctl(sd, RK_VIDIOC_GET_VCM_CFG, &vcm_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) ret = copy_to_user(up, &vcm_cfg, sizeof(vcm_cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) } else if (cmd == RK_VIDIOC_SET_VCM_CFG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) ret = copy_from_user(&vcm_cfg, up, sizeof(vcm_cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) ret = dw9714_ioctl(sd, cmd, &vcm_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) } else if (cmd == RK_VIDIOC_SET_VCM_MAX_LOGICALPOS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) ret = copy_from_user(&max_logicalpos, up, sizeof(max_logicalpos));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) ret = dw9714_ioctl(sd, cmd, &max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) "cmd 0x%x not supported\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) static const struct v4l2_subdev_core_ops dw9714_core_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) .ioctl = dw9714_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) .compat_ioctl32 = dw9714_compat_ioctl32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) static const struct v4l2_subdev_ops dw9714_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) .core = &dw9714_core_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) static void dw9714_subdev_cleanup(struct dw9714_device *dw9714_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) v4l2_device_unregister_subdev(&dw9714_dev->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) v4l2_device_unregister(&dw9714_dev->vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) v4l2_ctrl_handler_free(&dw9714_dev->ctrls_vcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) media_entity_cleanup(&dw9714_dev->sd.entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) static int dw9714_init_controls(struct dw9714_device *dev_vcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) struct v4l2_ctrl_handler *hdl = &dev_vcm->ctrls_vcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) const struct v4l2_ctrl_ops *ops = &dw9714_vcm_ctrl_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) v4l2_ctrl_handler_init(hdl, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) dev_vcm->focus = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FOCUS_ABSOLUTE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) 0, dev_vcm->max_logicalpos, 1, dev_vcm->max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (hdl->error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) dev_err(dev_vcm->sd.dev, "%s fail error: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) __func__, hdl->error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) dev_vcm->sd.ctrl_handler = hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) return hdl->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) #define USED_SYS_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) #ifdef USED_SYS_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) static ssize_t set_dacval(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) struct dw9714_device *dev_vcm = sd_to_dw9714_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) int val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) ret = kstrtoint(buf, 0, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) dw9714_set_dac(dev_vcm, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) static ssize_t get_dacval(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) struct dw9714_device *dev_vcm = sd_to_dw9714_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) unsigned int dac = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) dw9714_get_dac(dev_vcm, &dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) return sprintf(buf, "%u\n", dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) static struct device_attribute attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) __ATTR(dacval, 0600, get_dacval, set_dacval),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) static int add_sysfs_interfaces(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) for (i = 0; i < ARRAY_SIZE(attributes); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) if (device_create_file(dev, attributes + i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) goto undo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) undo:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) for (i--; i >= 0 ; i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) device_remove_file(dev, attributes + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) dev_err(dev, "%s: failed to create sysfs interface\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) static int remove_sysfs_interfaces(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) for (i = 0; i < ARRAY_SIZE(attributes); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) device_remove_file(dev, attributes + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) static inline int add_sysfs_interfaces(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) static inline int remove_sysfs_interfaces(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) static int dw9714_parse_dt_property(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) struct dw9714_device *dev_vcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) struct device_node *np = of_node_get(client->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) OF_CAMERA_VCMDRV_MAX_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) (unsigned int *)&dev_vcm->max_current)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) dev_vcm->max_current = DW9714_MAX_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) OF_CAMERA_VCMDRV_MAX_CURRENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) if (dev_vcm->max_current == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) dev_vcm->max_current = DW9714_MAX_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) OF_CAMERA_VCMDRV_START_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) (unsigned int *)&dev_vcm->vcm_cfg.start_ma)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) dev_vcm->vcm_cfg.start_ma = DW9714_DEFAULT_START_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) OF_CAMERA_VCMDRV_START_CURRENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) OF_CAMERA_VCMDRV_RATED_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) (unsigned int *)&dev_vcm->vcm_cfg.rated_ma)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) dev_vcm->vcm_cfg.rated_ma = DW9714_DEFAULT_RATED_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) OF_CAMERA_VCMDRV_RATED_CURRENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) OF_CAMERA_VCMDRV_STEP_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) (unsigned int *)&dev_vcm->vcm_cfg.step_mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) dev_vcm->vcm_cfg.step_mode = DW9714_DEFAULT_STEP_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) OF_CAMERA_VCMDRV_STEP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) OF_CAMERA_VCMDRV_DLC_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) (unsigned int *)&dev_vcm->dlc_enable)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) dev_vcm->dlc_enable = DW9714_DEFAULT_DLC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) OF_CAMERA_VCMDRV_DLC_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) OF_CAMERA_VCMDRV_MCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) (unsigned int *)&dev_vcm->mclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) dev_vcm->mclk = DW9714_DEFAULT_MCLK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) OF_CAMERA_VCMDRV_MCLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) OF_CAMERA_VCMDRV_T_SRC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) (unsigned int *)&dev_vcm->t_src)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) dev_vcm->t_src = DW9714_DEFAULT_T_SRC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) OF_CAMERA_VCMDRV_T_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) OF_CAMERA_VCMDRV_ADVANCED_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) (unsigned int *)&dev_vcm->adcanced_mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) dev_vcm->adcanced_mode = DW9714_DEFAULT_ADVMODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) OF_CAMERA_VCMDRV_ADVANCED_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) OF_CAMERA_VCMDRV_SAC_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) (unsigned int *)&dev_vcm->sac_mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) dev_vcm->sac_mode = DW9714_DEFAULT_SAC_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) OF_CAMERA_VCMDRV_SAC_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) OF_CAMERA_VCMDRV_SAC_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) (unsigned int *)&dev_vcm->sac_time)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) dev_vcm->sac_time = DW9714_DEFAULT_SAC_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) OF_CAMERA_VCMDRV_SAC_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) OF_CAMERA_VCMDRV_PRESC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) (unsigned int *)&dev_vcm->sac_prescl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) dev_vcm->sac_prescl = DW9714_DEFAULT_SAC_PRESCL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) OF_CAMERA_VCMDRV_PRESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) OF_CAMERA_VCMDRV_NRC_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) (unsigned int *)&dev_vcm->nrc_en)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) dev_vcm->nrc_en = DW9714_DEFAULT_NRC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) OF_CAMERA_VCMDRV_NRC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) OF_CAMERA_VCMDRV_NRC_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) (unsigned int *)&dev_vcm->nrc_mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) dev_vcm->nrc_mode = DW9714_DEFAULT_NRC_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) OF_CAMERA_VCMDRV_NRC_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) OF_CAMERA_VCMDRV_NRC_PRESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) (unsigned int *)&dev_vcm->nrc_preset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) dev_vcm->nrc_preset = DW9714_DEFAULT_NRC_PRESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) OF_CAMERA_VCMDRV_NRC_PRESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) OF_CAMERA_VCMDRV_NRC_INFL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) (unsigned int *)&dev_vcm->nrc_infl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) dev_vcm->nrc_infl = DW9714_DEFAULT_NRC_INFL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) OF_CAMERA_VCMDRV_NRC_INFL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) OF_CAMERA_VCMDRV_NRC_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) (unsigned int *)&dev_vcm->nrc_time)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) dev_vcm->nrc_time = DW9714_DEFAULT_NRC_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) OF_CAMERA_VCMDRV_NRC_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) dev_vcm->xsd_gpio = devm_gpiod_get(&client->dev, "xsd", GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) if (IS_ERR(dev_vcm->xsd_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) dev_warn(&client->dev, "Failed to get xsd-gpios\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) ret = of_property_read_u32(np, RKMODULE_CAMERA_MODULE_INDEX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) &dev_vcm->module_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) ret |= of_property_read_string(np, RKMODULE_CAMERA_MODULE_FACING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) &dev_vcm->module_facing);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) "could not get module information!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) dev_dbg(&client->dev, "current: %d, %d, %d, dlc_en: %d, t_src: %d, mclk: %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) dev_vcm->max_current,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) dev_vcm->start_current,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) dev_vcm->rated_current,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) dev_vcm->dlc_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) dev_vcm->t_src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) dev_vcm->mclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) /* advanced mode*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) dev_dbg(&client->dev, "adcanced: %d, sac: %d, %d, %d, nrc: %d, %d, %d, %d, %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) dev_vcm->adcanced_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) dev_vcm->sac_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) dev_vcm->sac_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) dev_vcm->sac_prescl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) dev_vcm->nrc_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) dev_vcm->nrc_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) dev_vcm->nrc_preset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) dev_vcm->nrc_infl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) dev_vcm->nrc_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) static int dw9714_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) struct dw9714_device *dw9714_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) char facing[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) dev_info(&client->dev, "probing...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) dw9714_dev = devm_kzalloc(&client->dev, sizeof(*dw9714_dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) if (dw9714_dev == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) ret = dw9714_parse_dt_property(client, dw9714_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) v4l2_i2c_subdev_init(&dw9714_dev->sd, client, &dw9714_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) dw9714_dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) dw9714_dev->sd.internal_ops = &dw9714_int_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) dw9714_dev->max_logicalpos = VCMDRV_MAX_LOG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) ret = dw9714_init_controls(dw9714_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) goto err_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) ret = media_entity_pads_init(&dw9714_dev->sd.entity, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) goto err_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) sd = &dw9714_dev->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) sd->entity.function = MEDIA_ENT_F_LENS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) memset(facing, 0, sizeof(facing));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) if (strcmp(dw9714_dev->module_facing, "back") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) facing[0] = 'b';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) facing[0] = 'f';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) dw9714_dev->module_index, facing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) DW9714_NAME, dev_name(sd->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) ret = v4l2_async_register_subdev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) dev_err(&client->dev, "v4l2 async register subdev failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) dw9714_update_vcm_cfg(dw9714_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) dw9714_dev->move_ms = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) dw9714_dev->current_related_pos = dw9714_dev->max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) dw9714_dev->current_lens_pos = dw9714_dev->start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) dw9714_dev->start_move_tv = ns_to_kernel_old_timeval(ktime_get_ns());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) dw9714_dev->end_move_tv = ns_to_kernel_old_timeval(ktime_get_ns());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) dw9714_dev->vcm_movefull_t =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) dw9714_move_time(dw9714_dev, DW9714_MAX_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) pm_runtime_enable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) add_sysfs_interfaces(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) dev_info(&client->dev, "probing successful\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) err_cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) dw9714_subdev_cleanup(dw9714_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) dev_err(&client->dev, "Probe failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) static int dw9714_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) struct dw9714_device *dw9714_dev = sd_to_dw9714_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) remove_sysfs_interfaces(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) pm_runtime_disable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) dw9714_subdev_cleanup(dw9714_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) static int dw9714_init(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) struct dw9714_device *dw9714_dev = sd_to_dw9714_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) unsigned char data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) if (dw9714_dev->adcanced_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) // need to wait 1ms after poweron
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) usleep_range(1000, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) // Advanced Mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) ret = dw9714_write_msg(client, 0xED, 0xAB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) // Power down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) ret = dw9714_write_msg(client, DW9714_ADVMODE_CONTROL, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) // active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) ret = dw9714_write_msg(client, DW9714_ADVMODE_CONTROL, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) // delay 1ms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) usleep_range(1000, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) // SAC mode & nrc_time & nrc_infl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) data = DW9714_ADVMODE_RING_EN << 7 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) (dw9714_dev->nrc_infl & 0x3) << 5 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) (dw9714_dev->nrc_time & 0x1) << 4 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) (dw9714_dev->sac_mode & 0xF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) ret = dw9714_write_msg(client, DW9714_ADVMODE_SAC_CFG, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) // Set Tvib (PRESC[1:0] )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) ret = dw9714_write_msg(client, DW9714_ADVMODE_PRESC, dw9714_dev->sac_prescl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) // Set Tvib (SACT[6:0] )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) ret = dw9714_write_msg(client, DW9714_ADVMODE_SAC_TIME, dw9714_dev->sac_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) // nrc preset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) ret = dw9714_write_msg(client, DW9714_ADVMODE_PRESET, dw9714_dev->nrc_preset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) // nrc en & nrc mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) data = (dw9714_dev->nrc_en & 0x1) << 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) (dw9714_dev->nrc_mode & 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) ret = dw9714_write_msg(client, DW9714_ADVMODE_NRC, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) // need to wait 12ms after poweron
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) usleep_range(12000, 12500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) ret = dw9714_write_msg(client, 0xEC, 0xA3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) data = (dw9714_dev->mclk & 0x3) | 0x04 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) ((dw9714_dev->dlc_enable << 0x3) & 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) ret = dw9714_write_msg(client, 0xA1, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) data = (dw9714_dev->t_src << 0x3) & 0xf8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) ret = dw9714_write_msg(client, 0xF2, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) ret = dw9714_write_msg(client, 0xDC, 0x51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) /* set normal mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) ret = dw9714_write_msg(client, 0xDF, 0x5B);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) "%s: failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) dev_err(&client->dev, "failed with error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) static int __maybe_unused dw9714_vcm_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) struct dw9714_device *dev_vcm = sd_to_dw9714_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) int dac = dev_vcm->current_lens_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) unsigned int move_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) dev_dbg(&client->dev, "%s: current_lens_pos %d, current_related_pos %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) __func__, dev_vcm->current_lens_pos, dev_vcm->current_related_pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) move_time = 1000 * dw9714_move_time(dev_vcm, DW9714_GRADUAL_MOVELENS_STEPS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) while (dac >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) dw9714_set_dac(dev_vcm, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) usleep_range(move_time, move_time + 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) dac -= DW9714_GRADUAL_MOVELENS_STEPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) if (dac <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) if (dac < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) dac = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) dw9714_set_dac(dev_vcm, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) static int __maybe_unused dw9714_vcm_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) struct dw9714_device *dev_vcm = sd_to_dw9714_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) unsigned int move_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) int dac = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) dw9714_init(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) dev_dbg(&client->dev, "%s: current_lens_pos %d, current_related_pos %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) __func__, dev_vcm->current_lens_pos, dev_vcm->current_related_pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) move_time = 1000 * dw9714_move_time(dev_vcm, DW9714_GRADUAL_MOVELENS_STEPS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) while (dac <= dev_vcm->current_lens_pos) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) dw9714_set_dac(dev_vcm, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) usleep_range(move_time, move_time + 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) dac += DW9714_GRADUAL_MOVELENS_STEPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) if (dac >= dev_vcm->current_lens_pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) if (dac > dev_vcm->current_lens_pos) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) dac = dev_vcm->current_lens_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) dw9714_set_dac(dev_vcm, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) static const struct i2c_device_id dw9714_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) { DW9714_NAME, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) { { 0 } }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) MODULE_DEVICE_TABLE(i2c, dw9714_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) static const struct of_device_id dw9714_of_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) { .compatible = "dongwoon,dw9714" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) { { 0 } }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) MODULE_DEVICE_TABLE(of, dw9714_of_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) static const struct dev_pm_ops dw9714_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) SET_SYSTEM_SLEEP_PM_OPS(dw9714_vcm_suspend, dw9714_vcm_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) SET_RUNTIME_PM_OPS(dw9714_vcm_suspend, dw9714_vcm_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) static struct i2c_driver dw9714_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) .name = DW9714_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) .pm = &dw9714_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) .of_match_table = dw9714_of_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) .probe = &dw9714_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) .remove = &dw9714_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) .id_table = dw9714_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) module_i2c_driver(dw9714_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) MODULE_DESCRIPTION("DW9714 VCM driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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