Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /* cx25840 VBI functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <media/drv-intf/cx25840.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include "cx25840-core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) static int odd_parity(u8 c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	c ^= (c >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	c ^= (c >> 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	c ^= (c >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	return c & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) static int decode_vps(u8 * dst, u8 * p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	static const u8 biphase_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 		0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 		0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 		0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		0xc3, 0x4b, 0x43, 0xc3, 0x87, 0x0f, 0x07, 0x87,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		0x83, 0x0b, 0x03, 0x83, 0xc3, 0x4b, 0x43, 0xc3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		0xc1, 0x49, 0x41, 0xc1, 0x85, 0x0d, 0x05, 0x85,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		0x81, 0x09, 0x01, 0x81, 0xc1, 0x49, 0x41, 0xc1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		0xc2, 0x4a, 0x42, 0xc2, 0x86, 0x0e, 0x06, 0x86,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		0x82, 0x0a, 0x02, 0x82, 0xc2, 0x4a, 0x42, 0xc2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		0xc0, 0x48, 0x40, 0xc0, 0x84, 0x0c, 0x04, 0x84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		0x80, 0x08, 0x00, 0x80, 0xc0, 0x48, 0x40, 0xc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	u8 c, err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	for (i = 0; i < 2 * 13; i += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		err |= biphase_tbl[p[i]] | biphase_tbl[p[i + 1]];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		c = (biphase_tbl[p[i + 1]] & 0xf) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		    ((biphase_tbl[p[i]] & 0xf) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		dst[i / 2] = c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	return err & 0xf0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) int cx25840_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct cx25840_state *state = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	static const u16 lcr2vbi[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		0, V4L2_SLICED_TELETEXT_B, 0,	/* 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		0, V4L2_SLICED_WSS_625, 0,	/* 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		V4L2_SLICED_CAPTION_525,	/* 6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		0, 0, V4L2_SLICED_VPS, 0, 0,	/* 9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		0, 0, 0, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	int is_pal = !(state->std & V4L2_STD_525_60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	memset(svbi->service_lines, 0, sizeof(svbi->service_lines));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	svbi->service_set = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	/* we're done if raw VBI is active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	/* TODO: this will have to be changed for generic_mode VBI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if ((cx25840_read(client, 0x404) & 0x10) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	if (is_pal) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		for (i = 7; i <= 23; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 			u8 v = cx25840_read(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 				 state->vbi_regs_offset + 0x424 + i - 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			svbi->service_lines[0][i] = lcr2vbi[v >> 4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			svbi->service_lines[1][i] = lcr2vbi[v & 0xf];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			svbi->service_set |= svbi->service_lines[0][i] |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 					     svbi->service_lines[1][i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		for (i = 10; i <= 21; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			u8 v = cx25840_read(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 				state->vbi_regs_offset + 0x424 + i - 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			svbi->service_lines[0][i] = lcr2vbi[v >> 4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			svbi->service_lines[1][i] = lcr2vbi[v & 0xf];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			svbi->service_set |= svbi->service_lines[0][i] |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 					     svbi->service_lines[1][i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int cx25840_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	struct cx25840_state *state = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	int is_pal = !(state->std & V4L2_STD_525_60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	int vbi_offset = is_pal ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	/* Setup standard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	cx25840_std_setup(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	/* VBI Offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (is_cx23888(state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		cx25840_write(client, 0x54f, vbi_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		cx25840_write(client, 0x47f, vbi_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	/* TODO: this will have to be changed for generic_mode VBI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	cx25840_write(client, 0x404, 0x2e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) int cx25840_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	struct cx25840_state *state = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	int is_pal = !(state->std & V4L2_STD_525_60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	int vbi_offset = is_pal ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	int i, x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	u8 lcr[24];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	for (x = 0; x <= 23; x++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		lcr[x] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	/* Setup standard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	cx25840_std_setup(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	/* Sliced VBI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	/* TODO: this will have to be changed for generic_mode VBI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	cx25840_write(client, 0x404, 0x32);	/* Ancillary data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	cx25840_write(client, 0x406, 0x13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (is_cx23888(state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		cx25840_write(client, 0x54f, vbi_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		cx25840_write(client, 0x47f, vbi_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (is_pal) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		for (i = 0; i <= 6; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 			svbi->service_lines[0][i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 				svbi->service_lines[1][i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		for (i = 0; i <= 9; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 			svbi->service_lines[0][i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 				svbi->service_lines[1][i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		for (i = 22; i <= 23; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			svbi->service_lines[0][i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 				svbi->service_lines[1][i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	for (i = 7; i <= 23; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		for (x = 0; x <= 1; x++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			switch (svbi->service_lines[1-x][i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 			case V4L2_SLICED_TELETEXT_B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 				lcr[i] |= 1 << (4 * x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			case V4L2_SLICED_WSS_625:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 				lcr[i] |= 4 << (4 * x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			case V4L2_SLICED_CAPTION_525:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 				lcr[i] |= 6 << (4 * x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			case V4L2_SLICED_VPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 				lcr[i] |= 9 << (4 * x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	if (is_pal) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		for (x = 1, i = state->vbi_regs_offset + 0x424;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		     i <= state->vbi_regs_offset + 0x434; i++, x++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			cx25840_write(client, i, lcr[6 + x]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		for (x = 1, i = state->vbi_regs_offset + 0x424;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		     i <= state->vbi_regs_offset + 0x430; i++, x++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			cx25840_write(client, i, lcr[9 + x]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		for (i = state->vbi_regs_offset + 0x431;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		     i <= state->vbi_regs_offset + 0x434; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 			cx25840_write(client, i, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	cx25840_write(client, state->vbi_regs_offset + 0x43c, 0x16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	/* TODO: this will have to be changed for generic_mode VBI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	if (is_cx23888(state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		cx25840_write(client, 0x428, is_pal ? 0x2a : 0x22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		cx25840_write(client, 0x474, is_pal ? 0x2a : 0x22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int cx25840_decode_vbi_line(struct v4l2_subdev *sd, struct v4l2_decode_vbi_line *vbi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct cx25840_state *state = to_state(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	u8 *p = vbi->p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	int id1, id2, l, err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	if (p[0] || p[1] != 0xff || p[2] != 0xff ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			(p[3] != 0x55 && p[3] != 0x91)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		vbi->line = vbi->type = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	p += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	id1 = p[-1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	id2 = p[0] & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	l = p[2] & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	l += state->vbi_line_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	p += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	switch (id2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		id2 = V4L2_SLICED_TELETEXT_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		id2 = V4L2_SLICED_WSS_625;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		id2 = V4L2_SLICED_CAPTION_525;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		err = !odd_parity(p[0]) || !odd_parity(p[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	case 9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		id2 = V4L2_SLICED_VPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		if (decode_vps(p, p) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			err = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		id2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		err = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	vbi->type = err ? 0 : id2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	vbi->line = err ? 0 : l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	vbi->is_second_field = err ? 0 : (id1 == 0x55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	vbi->p = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }