^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * cn3927v vcm driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2022 Rockchip Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * V0.0X01.0X01 reduce vcm collision noise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * V0.0X01.0X02 check dev connection before register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) //#define DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/rk-camera-module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/version.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/rk_vcm_head.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define OF_CAMERA_VCMDRV_EDLC_ENABLE "rockchip,vcm-edlc-enable"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define CN3927V_NAME "cn3927v"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define CN3927V_MAX_CURRENT 120U
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define CN3927V_MAX_REG 1023U
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define CN3927V_GRADUAL_MOVELENS_STEPS 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define CN3927V_DEFAULT_START_CURRENT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define CN3927V_DEFAULT_RATED_CURRENT 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define CN3927V_DEFAULT_STEP_MODE 0xd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define CN3927V_DEFAULT_EDLC_EN 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define CN3927V_DEFAULT_DLC_EN 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define CN3927V_DEFAULT_MCLK 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define CN3927V_DEFAULT_T_SRC 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define REG_NULL 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* cn3927v advanced mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define CN3927V_ADVMODE_IC_INFO 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define CN3927V_ADVMODE_IC_VER 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define CN3927V_ADVMODE_CONTROL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define CN3927V_ADVMODE_VCM_MSB 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define CN3927V_ADVMODE_VCM_LSB 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define CN3927V_ADVMODE_STATUS 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define CN3927V_ADVMODE_SAC_CFG 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define CN3927V_ADVMODE_PRESC 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define CN3927V_ADVMODE_SAC_TIME 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define CN3927V_ADVMODE_PRESET 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define CN3927V_ADVMODE_NRC 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define CN3927V_ADVMODE_RING_EN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define CN3927V_DEFAULT_ADVMODE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define CN3927V_DEFAULT_SAC_MODE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define CN3927V_DEFAULT_SAC_TIME 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define CN3927V_DEFAULT_SAC_PRESCL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define CN3927V_DEFAULT_NRC_EN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define CN3927V_DEFAULT_NRC_MODE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define CN3927V_DEFAULT_NRC_PRESET 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define CN3927V_DEFAULT_NRC_INFL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define CN3927V_DEFAULT_NRC_TIME 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* cn3927v device structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct cn3927v_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct v4l2_ctrl_handler ctrls_vcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct v4l2_ctrl *focus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct v4l2_subdev sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct v4l2_device vdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u16 current_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned short current_related_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned short current_lens_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned int max_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned int start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned int rated_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned int step_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned int vcm_movefull_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned int edlc_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned int dlc_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned int t_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned int mclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned int max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* advanced mode*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned char adcanced_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned char sac_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned char sac_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned char sac_prescl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) unsigned char nrc_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned char nrc_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) unsigned char nrc_preset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) unsigned char nrc_infl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned char nrc_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct __kernel_old_timeval start_move_tv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct __kernel_old_timeval end_move_tv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned long move_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u32 module_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) const char *module_facing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct rk_cam_vcm_cfg vcm_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct gpio_desc *xsd_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct regulator *supply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) bool power_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct TimeTabel_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned int t_src;/* time of slew rate control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) unsigned int step00;/* S[1:0] /MCLK[1:0] step period */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) unsigned int step01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned int step10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) unsigned int step11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const struct TimeTabel_s cn3927v_lsc_time_table[] = {/* 1/10us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {0b10000, 1360, 2720, 5440, 10880},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {0b10001, 1300, 2600, 5200, 10400},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {0b10010, 1250, 2500, 5000, 10000},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {0b10011, 1200, 2400, 4800, 9600},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {0b10100, 1160, 2320, 4640, 9280},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {0b10101, 1120, 2240, 4480, 8960},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {0b10110, 1080, 2160, 4320, 8640},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {0b10111, 1040, 2080, 4160, 8320},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {0b11000, 1010, 2020, 4040, 8080},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {0b11001, 980, 1960, 3920, 7840},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {0b11010, 950, 1900, 3800, 7600},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {0b11011, 920, 1840, 3680, 7360},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {0b11100, 890, 1780, 3560, 7120},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {0b11101, 870, 1740, 3480, 6960},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {0b11110, 850, 1700, 3400, 6800},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {0b11111, 830, 1660, 3320, 6640},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {0b00000, 810, 1620, 3240, 6480},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {0b00001, 790, 1580, 3160, 6320},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {0b00010, 775, 1550, 3100, 6200},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {0b00011, 760, 1520, 3040, 6080},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {0b00100, 745, 1490, 2980, 5960},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {0b00101, 730, 1460, 2920, 5840},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {0b00110, 715, 1430, 2860, 5720},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {0b00111, 700, 1400, 2800, 5600},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {0b01000, 690, 1380, 2760, 5520},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {0b01001, 680, 1360, 2720, 5440},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {0b01010, 670, 1340, 2680, 5360},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {0b01011, 660, 1320, 2640, 5280},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {0b01100, 655, 1310, 2620, 5240},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {0b01101, 650, 1300, 2600, 5200},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {0b01110, 645, 1290, 2580, 5160},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {0b01111, 640, 1280, 2560, 5120},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {REG_NULL, 0, 0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static const struct TimeTabel_s cn3927v_dlc_time_table[] = {/* us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {0b10000, 21250, 10630, 5310, 2660},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {0b10001, 20310, 10160, 5080, 2540},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {0b10010, 19530, 9770, 4880, 2440},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {0b10011, 18750, 9380, 4690, 2340},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {0b10100, 18130, 9060, 4530, 2270},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {0b10101, 17500, 8750, 4380, 2190},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {0b10110, 16880, 8440, 4220, 2110},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {0b10111, 16250, 8130, 4060, 2030},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {0b11000, 15780, 7890, 3950, 1970},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {0b11001, 15310, 7660, 3830, 1910},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {0b11010, 14840, 7420, 3710, 1860},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {0b11011, 14380, 7190, 3590, 1800},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {0b11100, 13910, 6950, 3480, 1740},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {0b11101, 13590, 6800, 3400, 1700},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {0b11110, 13280, 6640, 3320, 1660},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {0b11111, 12970, 6480, 3240, 1620},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {0b00000, 12660, 6330, 3160, 1580},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {0b00001, 12340, 6170, 3090, 1540},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {0b00010, 12110, 6050, 3030, 1510},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {0b00011, 11880, 5940, 2970, 1480},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {0b00100, 11640, 5820, 2910, 1460},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {0b00101, 11410, 5700, 2850, 1430},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {0b00110, 11170, 5590, 2790, 1400},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {0b00111, 10940, 5470, 2730, 1370},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {0b01000, 10780, 5390, 2700, 1350},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {0b01001, 10630, 5310, 2660, 1330},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {0b01010, 10470, 5230, 2620, 1310},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {0b01011, 10310, 5160, 2580, 1290},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {0b01100, 10230, 5120, 2560, 1280},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {0b01101, 10160, 5080, 2540, 1270},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {0b01110, 10080, 5040, 2520, 1260},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {0b01111, 10000, 5000, 2500, 1250},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {REG_NULL, 0, 0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static inline struct cn3927v_device *to_cn3927v_vcm(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return container_of(ctrl->handler, struct cn3927v_device, ctrls_vcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static inline struct cn3927v_device *sd_to_cn3927v_vcm(struct v4l2_subdev *subdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return container_of(subdev, struct cn3927v_device, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static int cn3927v_read_msg(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) unsigned char *msb, unsigned char *lsb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct i2c_msg msg[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) unsigned char data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (!client->adapter) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) dev_err(&client->dev, "client->adapter NULL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) for (retries = 0; retries < 5; retries++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) msg->addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) msg->flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) msg->len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) msg->buf = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ret = i2c_transfer(client->adapter, msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (ret == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) "%s: vcm i2c ok, addr 0x%x, data 0x%x, 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) __func__, msg->addr, data[0], data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) *msb = data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) *lsb = data[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) "retrying I2C... %d\n", retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) retries++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) "%s: i2c read to failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int cn3927v_write_msg(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u8 msb, u8 lsb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct i2c_msg msg[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) unsigned char data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) int retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (!client->adapter) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) dev_err(&client->dev, "client->adapter NULL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) for (retries = 0; retries < 5; retries++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) msg->addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) msg->flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) msg->len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) msg->buf = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) data[0] = msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) data[1] = lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ret = i2c_transfer(client->adapter, msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) usleep_range(50, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (ret == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) "%s: vcm i2c ok, addr 0x%x, data 0x%x, 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) __func__, msg->addr, data[0], data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) "retrying I2C... %d\n", retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) "i2c write to failed with error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /* Write registers up to 4 at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static int cn3927v_write_reg(struct i2c_client *client, u8 reg, u32 len, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u32 buf_i, val_i, retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u8 buf[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) u8 *val_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) __be32 val_be;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (len > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) buf[0] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) val_be = cpu_to_be32(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) val_p = (u8 *)&val_be;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) buf_i = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) val_i = 4 - len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) while (val_i < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) buf[buf_i++] = val_p[val_i++];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) for (retries = 0; retries < 5; retries++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (i2c_master_send(client, buf, len + 1) == len + 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) "%s: vcm i2c ok, reg 0x%x, val 0x%x, len 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) __func__, reg, val, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) "retrying I2C... %d\n", retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) dev_err(&client->dev, "Failed to write 0x%04x,0x%x\n", reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* Read registers up to 4 at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int cn3927v_read_reg(struct i2c_client *client, u8 reg, u32 len, u32 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct i2c_msg msgs[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) __be32 data_be = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) u8 *data_be_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) u32 retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (len > 4 || !len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) data_be_p = (u8 *)&data_be;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /* Write register address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) msgs[0].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) msgs[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) msgs[0].len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) msgs[0].buf = (u8 *)®
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* Read data from register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) msgs[1].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) msgs[1].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) msgs[1].len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) msgs[1].buf = &data_be_p[4 - len];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) for (retries = 0; retries < 5; retries++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) if (ret == ARRAY_SIZE(msgs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) *val = be32_to_cpu(data_be);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) "%s: vcm i2c ok, reg 0x%x, val 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) __func__, reg, *val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) "%s: i2c read to failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static unsigned int cn3927v_move_time(struct cn3927v_device *dev_vcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) unsigned int move_pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) unsigned int move_time_ms = 200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) unsigned int step_period_lsc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) unsigned int step_period_dlc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) unsigned int codes_per_step = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) unsigned int step_case;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) unsigned int sac_prescl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) int table_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (dev_vcm->adcanced_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) // sac setting time = tvib = (3.81ms+(SACT[6:0]*0.03ms)) * PRESC[1:0]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) sac_prescl = 1 << dev_vcm->sac_prescl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) move_time_ms = (((381 + 3 * dev_vcm->sac_time)) * sac_prescl + 50) / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) return move_time_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) } else if (dev_vcm->dlc_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) step_case = dev_vcm->mclk & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) table_cnt = sizeof(cn3927v_dlc_time_table) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) sizeof(struct TimeTabel_s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) for (i = 0; i < table_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (cn3927v_dlc_time_table[i].t_src == dev_vcm->t_src)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) step_case = dev_vcm->step_mode & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) table_cnt = sizeof(cn3927v_lsc_time_table) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) sizeof(struct TimeTabel_s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) for (i = 0; i < table_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (cn3927v_lsc_time_table[i].t_src == dev_vcm->t_src)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) if (i >= table_cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) switch (step_case) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) step_period_lsc = cn3927v_lsc_time_table[i].step00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) step_period_dlc = cn3927v_dlc_time_table[i].step00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) step_period_lsc = cn3927v_lsc_time_table[i].step01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) step_period_dlc = cn3927v_dlc_time_table[i].step01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) step_period_lsc = cn3927v_lsc_time_table[i].step10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) step_period_dlc = cn3927v_dlc_time_table[i].step10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) step_period_lsc = cn3927v_lsc_time_table[i].step11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) step_period_dlc = cn3927v_dlc_time_table[i].step11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) "%s: step_case is error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) __func__, step_case);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) codes_per_step = (dev_vcm->step_mode & 0x0c) >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (codes_per_step > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) codes_per_step = 1 << (codes_per_step - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (!dev_vcm->dlc_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (!codes_per_step)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) move_time_ms = (step_period_lsc * move_pos + 9999) / 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) move_time_ms = (step_period_lsc * move_pos / codes_per_step + 9999) / 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) move_time_ms = (step_period_dlc + 999) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return move_time_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static int cn3927v_get_dac(struct cn3927v_device *dev_vcm, unsigned int *cur_dac)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) unsigned char lsb = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) unsigned char msb = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) unsigned int abs_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (dev_vcm->adcanced_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) ret = cn3927v_read_reg(client, CN3927V_ADVMODE_VCM_MSB, 2, &abs_step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) ret = cn3927v_read_msg(client, &msb, &lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) abs_step = (((unsigned int)(msb & 0x3FU)) << 4U) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) (((unsigned int)lsb) >> 4U);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) *cur_dac = abs_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) dev_dbg(&client->dev, "%s: get dac %d\n", __func__, *cur_dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) "%s: failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static int cn3927v_set_dac(struct cn3927v_device *dev_vcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) unsigned int dest_dac)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (dev_vcm->adcanced_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) bool vcm_idle = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* wait for I2C bus idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) vcm_idle = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) for (i = 0; i < 10; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) unsigned int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) cn3927v_read_reg(client, CN3927V_ADVMODE_STATUS, 1, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) status &= 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) if (status == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) vcm_idle = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) usleep_range(1000, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (!vcm_idle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) "%s: watting 0x05 flag timeout!\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) /* vcm move */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) ret = cn3927v_write_reg(client, CN3927V_ADVMODE_VCM_MSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 2, dest_dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) unsigned char msb, lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) msb = (0x00U | ((dest_dac & 0x3F0U) >> 4U));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) lsb = (((dest_dac & 0x0FU) << 4U) | dev_vcm->step_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) ret = cn3927v_write_msg(client, msb, lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) "%s: failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static int cn3927v_get_pos(struct cn3927v_device *dev_vcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) unsigned int *cur_pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) unsigned int dac, position, range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) range = dev_vcm->rated_current - dev_vcm->start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) ret = cn3927v_get_dac(dev_vcm, &dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) if (dac <= dev_vcm->start_current) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) position = dev_vcm->max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) } else if ((dac > dev_vcm->start_current) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) (dac <= dev_vcm->rated_current)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) position = (dac - dev_vcm->start_current) * dev_vcm->max_logicalpos / range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) position = dev_vcm->max_logicalpos - position;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) position = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) *cur_pos = position;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) dev_dbg(&client->dev, "%s: get position %d, dac %d\n", __func__, *cur_pos, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) "%s: failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) static int cn3927v_set_pos(struct cn3927v_device *dev_vcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) unsigned int dest_pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) unsigned int position;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) unsigned int range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) range = dev_vcm->rated_current - dev_vcm->start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (dest_pos >= dev_vcm->max_logicalpos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) position = dev_vcm->start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) position = dev_vcm->start_current +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) (range * (dev_vcm->max_logicalpos - dest_pos) / dev_vcm->max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (position > CN3927V_MAX_REG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) position = CN3927V_MAX_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) dev_vcm->current_lens_pos = position;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) dev_vcm->current_related_pos = dest_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) ret = cn3927v_set_dac(dev_vcm, position);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) dev_dbg(&client->dev, "%s: set position %d, dac %d\n", __func__, dest_pos, position);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static int cn3927v_get_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct cn3927v_device *dev_vcm = to_cn3927v_vcm(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (ctrl->id == V4L2_CID_FOCUS_ABSOLUTE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) return cn3927v_get_pos(dev_vcm, &ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) static int cn3927v_set_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) struct cn3927v_device *dev_vcm = to_cn3927v_vcm(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) unsigned int dest_pos = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) int move_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) long mv_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (ctrl->id == V4L2_CID_FOCUS_ABSOLUTE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) if (dest_pos > dev_vcm->max_logicalpos) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) "%s dest_pos is error. %d > %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) __func__, dest_pos, dev_vcm->max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) /* calculate move time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) move_pos = dev_vcm->current_related_pos - dest_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (move_pos < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) move_pos = -move_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) ret = cn3927v_set_pos(dev_vcm, dest_pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (dev_vcm->dlc_enable || dev_vcm->adcanced_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) dev_vcm->move_ms = dev_vcm->vcm_movefull_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) dev_vcm->move_ms =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) ((dev_vcm->vcm_movefull_t * (uint32_t)move_pos) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) dev_vcm->max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) "dest_pos %d, dac %d, move_ms %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) dest_pos, dev_vcm->current_lens_pos, dev_vcm->move_ms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) dev_vcm->start_move_tv = ns_to_kernel_old_timeval(ktime_get_ns());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) mv_us = dev_vcm->start_move_tv.tv_usec +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) dev_vcm->move_ms * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (mv_us >= 1000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) dev_vcm->end_move_tv.tv_sec =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) dev_vcm->start_move_tv.tv_sec + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) dev_vcm->end_move_tv.tv_usec = mv_us - 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) dev_vcm->end_move_tv.tv_sec =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) dev_vcm->start_move_tv.tv_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) dev_vcm->end_move_tv.tv_usec = mv_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) static const struct v4l2_ctrl_ops cn3927v_vcm_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .g_volatile_ctrl = cn3927v_get_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) .s_ctrl = cn3927v_set_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static int cn3927v_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) rval = pm_runtime_get_sync(sd->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) if (rval < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) pm_runtime_put_noidle(sd->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) static int cn3927v_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) pm_runtime_put(sd->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) static const struct v4l2_subdev_internal_ops cn3927v_int_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) .open = cn3927v_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) .close = cn3927v_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) static void cn3927v_update_vcm_cfg(struct cn3927v_device *dev_vcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) if (dev_vcm->max_current == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) dev_err(&client->dev, "max current is zero");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) dev_vcm->start_current = dev_vcm->vcm_cfg.start_ma *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) CN3927V_MAX_REG / dev_vcm->max_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) dev_vcm->rated_current = dev_vcm->vcm_cfg.rated_ma *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) CN3927V_MAX_REG / dev_vcm->max_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) dev_vcm->step_mode = dev_vcm->vcm_cfg.step_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) "vcm_cfg: %d, %d, %d, max_current %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) dev_vcm->vcm_cfg.start_ma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) dev_vcm->vcm_cfg.rated_ma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) dev_vcm->vcm_cfg.step_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) dev_vcm->max_current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) static long cn3927v_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) struct cn3927v_device *dev_vcm = sd_to_cn3927v_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) struct rk_cam_vcm_tim *vcm_tim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) struct rk_cam_vcm_cfg *vcm_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) unsigned int max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) if (cmd == RK_VIDIOC_VCM_TIMEINFO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) vcm_tim = (struct rk_cam_vcm_tim *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) vcm_tim->vcm_start_t.tv_sec = dev_vcm->start_move_tv.tv_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) vcm_tim->vcm_start_t.tv_usec =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) dev_vcm->start_move_tv.tv_usec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) vcm_tim->vcm_end_t.tv_sec = dev_vcm->end_move_tv.tv_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) vcm_tim->vcm_end_t.tv_usec = dev_vcm->end_move_tv.tv_usec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) dev_dbg(&client->dev, "cn3927v_get_move_res 0x%lx, 0x%lx, 0x%lx, 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) vcm_tim->vcm_start_t.tv_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) vcm_tim->vcm_start_t.tv_usec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) vcm_tim->vcm_end_t.tv_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) vcm_tim->vcm_end_t.tv_usec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) } else if (cmd == RK_VIDIOC_GET_VCM_CFG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) vcm_cfg = (struct rk_cam_vcm_cfg *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) vcm_cfg->start_ma = dev_vcm->vcm_cfg.start_ma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) vcm_cfg->rated_ma = dev_vcm->vcm_cfg.rated_ma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) vcm_cfg->step_mode = dev_vcm->vcm_cfg.step_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) } else if (cmd == RK_VIDIOC_SET_VCM_CFG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) vcm_cfg = (struct rk_cam_vcm_cfg *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) if (vcm_cfg->start_ma == 0 && vcm_cfg->rated_ma == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) "vcm_cfg err, start_ma %d, rated_ma %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) vcm_cfg->start_ma, vcm_cfg->rated_ma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) if (vcm_cfg->rated_ma > CN3927V_MAX_CURRENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) "vcm_cfg use dac value, do convert!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) vcm_cfg->rated_ma = vcm_cfg->rated_ma *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) dev_vcm->max_current / CN3927V_MAX_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) vcm_cfg->start_ma = vcm_cfg->start_ma *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) dev_vcm->max_current / CN3927V_MAX_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) dev_vcm->vcm_cfg.start_ma = vcm_cfg->start_ma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) dev_vcm->vcm_cfg.rated_ma = vcm_cfg->rated_ma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) dev_vcm->vcm_cfg.step_mode = vcm_cfg->step_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) cn3927v_update_vcm_cfg(dev_vcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) } else if (cmd == RK_VIDIOC_SET_VCM_MAX_LOGICALPOS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) max_logicalpos = *(unsigned int *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) if (max_logicalpos > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) dev_vcm->max_logicalpos = max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) __v4l2_ctrl_modify_range(dev_vcm->focus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) 0, dev_vcm->max_logicalpos, 1, dev_vcm->max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) "max_logicalpos %d\n", max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) "cmd 0x%x not supported\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) static long cn3927v_compat_ioctl32(struct v4l2_subdev *sd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) struct i2c_client *client = v4l2_get_subdevdata(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) void __user *up = compat_ptr(arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) struct rk_cam_compat_vcm_tim compat_vcm_tim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) struct rk_cam_vcm_tim vcm_tim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) struct rk_cam_vcm_cfg vcm_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) unsigned int max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) long ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (cmd == RK_VIDIOC_COMPAT_VCM_TIMEINFO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) struct rk_cam_compat_vcm_tim __user *p32 = up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) ret = cn3927v_ioctl(sd, RK_VIDIOC_VCM_TIMEINFO, &vcm_tim);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) compat_vcm_tim.vcm_start_t.tv_sec = vcm_tim.vcm_start_t.tv_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) compat_vcm_tim.vcm_start_t.tv_usec = vcm_tim.vcm_start_t.tv_usec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) compat_vcm_tim.vcm_end_t.tv_sec = vcm_tim.vcm_end_t.tv_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) compat_vcm_tim.vcm_end_t.tv_usec = vcm_tim.vcm_end_t.tv_usec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) put_user(compat_vcm_tim.vcm_start_t.tv_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) &p32->vcm_start_t.tv_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) put_user(compat_vcm_tim.vcm_start_t.tv_usec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) &p32->vcm_start_t.tv_usec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) put_user(compat_vcm_tim.vcm_end_t.tv_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) &p32->vcm_end_t.tv_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) put_user(compat_vcm_tim.vcm_end_t.tv_usec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) &p32->vcm_end_t.tv_usec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) } else if (cmd == RK_VIDIOC_GET_VCM_CFG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) ret = cn3927v_ioctl(sd, RK_VIDIOC_GET_VCM_CFG, &vcm_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) ret = copy_to_user(up, &vcm_cfg, sizeof(vcm_cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) } else if (cmd == RK_VIDIOC_SET_VCM_CFG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) ret = copy_from_user(&vcm_cfg, up, sizeof(vcm_cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) ret = cn3927v_ioctl(sd, cmd, &vcm_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) } else if (cmd == RK_VIDIOC_SET_VCM_MAX_LOGICALPOS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) ret = copy_from_user(&max_logicalpos, up, sizeof(max_logicalpos));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) ret = cn3927v_ioctl(sd, cmd, &max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) "cmd 0x%x not supported\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) static const struct v4l2_subdev_core_ops cn3927v_core_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .ioctl = cn3927v_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .compat_ioctl32 = cn3927v_compat_ioctl32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) static const struct v4l2_subdev_ops cn3927v_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) .core = &cn3927v_core_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) static void cn3927v_subdev_cleanup(struct cn3927v_device *cn3927v_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) v4l2_device_unregister_subdev(&cn3927v_dev->sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) v4l2_device_unregister(&cn3927v_dev->vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) v4l2_ctrl_handler_free(&cn3927v_dev->ctrls_vcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) media_entity_cleanup(&cn3927v_dev->sd.entity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) static int cn3927v_init_controls(struct cn3927v_device *dev_vcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) struct v4l2_ctrl_handler *hdl = &dev_vcm->ctrls_vcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) const struct v4l2_ctrl_ops *ops = &cn3927v_vcm_ctrl_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) v4l2_ctrl_handler_init(hdl, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) dev_vcm->focus = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FOCUS_ABSOLUTE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) 0, dev_vcm->max_logicalpos, 1, dev_vcm->max_logicalpos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) if (hdl->error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) dev_err(dev_vcm->sd.dev, "%s fail error: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) __func__, hdl->error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) dev_vcm->sd.ctrl_handler = hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) return hdl->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) #define USED_SYS_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) #ifdef USED_SYS_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) static ssize_t set_dacval(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) struct cn3927v_device *dev_vcm = sd_to_cn3927v_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) int val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) ret = kstrtoint(buf, 0, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) cn3927v_set_dac(dev_vcm, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) static ssize_t get_dacval(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) struct cn3927v_device *dev_vcm = sd_to_cn3927v_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) unsigned int dac = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) cn3927v_get_dac(dev_vcm, &dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) return sprintf(buf, "%u\n", dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) static struct device_attribute attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) __ATTR(dacval, 0600, get_dacval, set_dacval),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) static int add_sysfs_interfaces(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) for (i = 0; i < ARRAY_SIZE(attributes); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) if (device_create_file(dev, attributes + i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) goto undo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) undo:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) for (i--; i >= 0 ; i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) device_remove_file(dev, attributes + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) dev_err(dev, "%s: failed to create sysfs interface\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) static int remove_sysfs_interfaces(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) for (i = 0; i < ARRAY_SIZE(attributes); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) device_remove_file(dev, attributes + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) static inline int add_sysfs_interfaces(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) static inline int remove_sysfs_interfaces(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) static int __cn3927v_set_power(struct cn3927v_device *cn3927v, bool on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) struct i2c_client *client = cn3927v->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) if (cn3927v->power_on == !!on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) goto unlock_and_return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) ret = regulator_enable(cn3927v->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) dev_err(&client->dev, "Failed to enable regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) goto unlock_and_return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) cn3927v->power_on = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) ret = regulator_disable(cn3927v->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) dev_err(&client->dev, "Failed to disable regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) goto unlock_and_return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) cn3927v->power_on = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) unlock_and_return:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) static int cn3927v_check_i2c(struct cn3927v_device *cn3927v,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) // need to wait 1ms after poweron
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) usleep_range(1000, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) // Advanced Mode TEST set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) ret = cn3927v_write_msg(client, 0xED, 0xAB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) dev_info(dev, "Check cn3927v connection OK!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) dev_info(dev, "cn3927v not connect!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) static int cn3927v_configure_regulator(struct cn3927v_device *cn3927v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) struct i2c_client *client = cn3927v->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) cn3927v->supply = devm_regulator_get(&client->dev, "avdd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) if (IS_ERR(cn3927v->supply)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) ret = PTR_ERR(cn3927v->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if (ret != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) dev_err(&client->dev, "could not get regulator avdd\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) cn3927v->power_on = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) static int cn3927v_parse_dt_property(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) struct cn3927v_device *dev_vcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) struct device_node *np = of_node_get(client->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) OF_CAMERA_VCMDRV_MAX_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) (unsigned int *)&dev_vcm->max_current)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) dev_vcm->max_current = CN3927V_MAX_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) OF_CAMERA_VCMDRV_MAX_CURRENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) if (dev_vcm->max_current == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) dev_vcm->max_current = CN3927V_MAX_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) OF_CAMERA_VCMDRV_START_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) (unsigned int *)&dev_vcm->vcm_cfg.start_ma)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) dev_vcm->vcm_cfg.start_ma = CN3927V_DEFAULT_START_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) OF_CAMERA_VCMDRV_START_CURRENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) OF_CAMERA_VCMDRV_RATED_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) (unsigned int *)&dev_vcm->vcm_cfg.rated_ma)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) dev_vcm->vcm_cfg.rated_ma = CN3927V_DEFAULT_RATED_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) OF_CAMERA_VCMDRV_RATED_CURRENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) OF_CAMERA_VCMDRV_STEP_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) (unsigned int *)&dev_vcm->vcm_cfg.step_mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) dev_vcm->vcm_cfg.step_mode = CN3927V_DEFAULT_STEP_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) OF_CAMERA_VCMDRV_STEP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) OF_CAMERA_VCMDRV_EDLC_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) (unsigned int *)&dev_vcm->edlc_enable)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) dev_vcm->edlc_enable = CN3927V_DEFAULT_EDLC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) OF_CAMERA_VCMDRV_EDLC_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) OF_CAMERA_VCMDRV_DLC_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) (unsigned int *)&dev_vcm->dlc_enable)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) dev_vcm->dlc_enable = CN3927V_DEFAULT_DLC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) OF_CAMERA_VCMDRV_DLC_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) OF_CAMERA_VCMDRV_MCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) (unsigned int *)&dev_vcm->mclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) dev_vcm->mclk = CN3927V_DEFAULT_MCLK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) OF_CAMERA_VCMDRV_MCLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) OF_CAMERA_VCMDRV_T_SRC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) (unsigned int *)&dev_vcm->t_src)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) dev_vcm->t_src = CN3927V_DEFAULT_T_SRC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) OF_CAMERA_VCMDRV_T_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) OF_CAMERA_VCMDRV_ADVANCED_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) (unsigned int *)&dev_vcm->adcanced_mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) dev_vcm->adcanced_mode = CN3927V_DEFAULT_ADVMODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) OF_CAMERA_VCMDRV_ADVANCED_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) OF_CAMERA_VCMDRV_SAC_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) (unsigned int *)&dev_vcm->sac_mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) dev_vcm->sac_mode = CN3927V_DEFAULT_SAC_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) OF_CAMERA_VCMDRV_SAC_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) OF_CAMERA_VCMDRV_SAC_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) (unsigned int *)&dev_vcm->sac_time)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) dev_vcm->sac_time = CN3927V_DEFAULT_SAC_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) OF_CAMERA_VCMDRV_SAC_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) OF_CAMERA_VCMDRV_PRESC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) (unsigned int *)&dev_vcm->sac_prescl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) dev_vcm->sac_prescl = CN3927V_DEFAULT_SAC_PRESCL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) OF_CAMERA_VCMDRV_PRESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) OF_CAMERA_VCMDRV_NRC_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) (unsigned int *)&dev_vcm->nrc_en)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) dev_vcm->nrc_en = CN3927V_DEFAULT_NRC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) OF_CAMERA_VCMDRV_NRC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) OF_CAMERA_VCMDRV_NRC_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) (unsigned int *)&dev_vcm->nrc_mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) dev_vcm->nrc_mode = CN3927V_DEFAULT_NRC_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) OF_CAMERA_VCMDRV_NRC_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) OF_CAMERA_VCMDRV_NRC_PRESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) (unsigned int *)&dev_vcm->nrc_preset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) dev_vcm->nrc_preset = CN3927V_DEFAULT_NRC_PRESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) OF_CAMERA_VCMDRV_NRC_PRESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) OF_CAMERA_VCMDRV_NRC_INFL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) (unsigned int *)&dev_vcm->nrc_infl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) dev_vcm->nrc_infl = CN3927V_DEFAULT_NRC_INFL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) OF_CAMERA_VCMDRV_NRC_INFL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) if (of_property_read_u32(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) OF_CAMERA_VCMDRV_NRC_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) (unsigned int *)&dev_vcm->nrc_time)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) dev_vcm->nrc_time = CN3927V_DEFAULT_NRC_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) "could not get module %s from dts!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) OF_CAMERA_VCMDRV_NRC_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) dev_vcm->xsd_gpio = devm_gpiod_get(&client->dev, "xsd", GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) if (IS_ERR(dev_vcm->xsd_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) dev_warn(&client->dev, "Failed to get xsd-gpios\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) ret = of_property_read_u32(np, RKMODULE_CAMERA_MODULE_INDEX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) &dev_vcm->module_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) ret |= of_property_read_string(np, RKMODULE_CAMERA_MODULE_FACING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) &dev_vcm->module_facing);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) "could not get module information!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) dev_vcm->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) ret = cn3927v_configure_regulator(dev_vcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) dev_err(&client->dev, "Failed to get power regulator!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) dev_dbg(&client->dev, "current: %d, %d, %d, dlc_en: %d, t_src: %d, mclk: %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) dev_vcm->max_current,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) dev_vcm->vcm_cfg.start_ma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) dev_vcm->vcm_cfg.rated_ma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) dev_vcm->dlc_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) dev_vcm->t_src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) dev_vcm->mclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) /* advanced mode*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) dev_info(&client->dev, "adcanced: %d, sac: %d, %d, %d, nrc: %d, %d, %d, %d, %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) dev_vcm->adcanced_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) dev_vcm->sac_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) dev_vcm->sac_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) dev_vcm->sac_prescl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) dev_vcm->nrc_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) dev_vcm->nrc_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) dev_vcm->nrc_preset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) dev_vcm->nrc_infl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) dev_vcm->nrc_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) static int cn3927v_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) struct cn3927v_device *cn3927v_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) char facing[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) dev_info(dev, "driver version: %02x.%02x.%02x, probing...",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) DRIVER_VERSION >> 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) (DRIVER_VERSION & 0xff00) >> 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) DRIVER_VERSION & 0x00ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) cn3927v_dev = devm_kzalloc(dev, sizeof(*cn3927v_dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) if (cn3927v_dev == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) ret = cn3927v_parse_dt_property(client, cn3927v_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) v4l2_i2c_subdev_init(&cn3927v_dev->sd, client, &cn3927v_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) cn3927v_dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) cn3927v_dev->sd.internal_ops = &cn3927v_int_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) cn3927v_dev->max_logicalpos = VCMDRV_MAX_LOG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) ret = cn3927v_init_controls(cn3927v_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) goto err_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) ret = media_entity_pads_init(&cn3927v_dev->sd.entity, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) goto err_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) ret = __cn3927v_set_power(cn3927v_dev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) goto err_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) ret = cn3927v_check_i2c(cn3927v_dev, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) goto err_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) sd = &cn3927v_dev->sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) sd->entity.function = MEDIA_ENT_F_LENS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) memset(facing, 0, sizeof(facing));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) if (strcmp(cn3927v_dev->module_facing, "back") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) facing[0] = 'b';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) facing[0] = 'f';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) cn3927v_dev->module_index, facing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) CN3927V_NAME, dev_name(sd->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) ret = v4l2_async_register_subdev(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) dev_err(&client->dev, "v4l2 async register subdev failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) cn3927v_update_vcm_cfg(cn3927v_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) cn3927v_dev->move_ms = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) cn3927v_dev->current_related_pos = cn3927v_dev->max_logicalpos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) cn3927v_dev->current_lens_pos = cn3927v_dev->start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) cn3927v_dev->start_move_tv = ns_to_kernel_old_timeval(ktime_get_ns());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) cn3927v_dev->end_move_tv = ns_to_kernel_old_timeval(ktime_get_ns());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) cn3927v_dev->vcm_movefull_t =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) cn3927v_move_time(cn3927v_dev, CN3927V_MAX_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) add_sysfs_interfaces(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) dev_info(dev, "probing successful\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) err_power_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) __cn3927v_set_power(cn3927v_dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) err_cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) cn3927v_subdev_cleanup(cn3927v_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) dev_err(&client->dev, "Probe failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) static int cn3927v_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) struct cn3927v_device *cn3927v_dev = sd_to_cn3927v_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) remove_sysfs_interfaces(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) pm_runtime_disable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) cn3927v_subdev_cleanup(cn3927v_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) static int cn3927v_init(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) struct cn3927v_device *cn3927v_dev = sd_to_cn3927v_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) unsigned char data = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) if (cn3927v_dev->adcanced_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) // need to wait 1ms after poweron
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) usleep_range(1000, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) // Advanced Mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) ret = cn3927v_write_msg(client, 0xED, 0xAB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) // Power down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) ret = cn3927v_write_msg(client, CN3927V_ADVMODE_CONTROL, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) // active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) ret = cn3927v_write_msg(client, CN3927V_ADVMODE_CONTROL, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) // delay 1ms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) usleep_range(1000, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) // Set Tvib (PRESC[1:0] )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) ret = cn3927v_write_msg(client, CN3927V_ADVMODE_PRESC, cn3927v_dev->sac_prescl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) // Set Tvib (SACT[6:0] )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) ret = cn3927v_write_msg(client, CN3927V_ADVMODE_SAC_TIME, cn3927v_dev->sac_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) // nrc preset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) ret = cn3927v_write_msg(client, CN3927V_ADVMODE_PRESET, cn3927v_dev->nrc_preset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) // nrc en & nrc mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) data = (cn3927v_dev->nrc_en & 0x1) << 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) (cn3927v_dev->nrc_mode & 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) ret = cn3927v_write_msg(client, CN3927V_ADVMODE_NRC, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) // SAC mode & nrc_time & nrc_infl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) data = CN3927V_ADVMODE_RING_EN << 7 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) (cn3927v_dev->nrc_infl & 0x3) << 5 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) (cn3927v_dev->nrc_time & 0x1) << 4 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) (cn3927v_dev->sac_mode & 0xF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) ret = cn3927v_write_msg(client, CN3927V_ADVMODE_SAC_CFG, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) // need to wait 1ms after poweron
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) usleep_range(1000, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) ret = cn3927v_write_msg(client, 0xEC, 0xA3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) data = (cn3927v_dev->mclk & 0x3) | 0x04 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) ((cn3927v_dev->dlc_enable << 0x3) & 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) ret = cn3927v_write_msg(client, 0xA1, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) data = (cn3927v_dev->t_src << 0x3) & 0xf8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) ret = cn3927v_write_msg(client, 0xF2, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) ret = cn3927v_write_msg(client, 0xDC, 0x51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) /* set normal mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) ret = cn3927v_write_msg(client, 0xDF, 0x5B);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) "%s: failed with error %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) dev_err(&client->dev, "failed with error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) static int __maybe_unused cn3927v_vcm_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) struct cn3927v_device *dev_vcm = sd_to_cn3927v_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) int dac = dev_vcm->current_lens_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) unsigned int move_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) dev_dbg(&client->dev, "%s: current_lens_pos %d, current_related_pos %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) __func__, dev_vcm->current_lens_pos, dev_vcm->current_related_pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) move_time = 1000 * cn3927v_move_time(dev_vcm, CN3927V_GRADUAL_MOVELENS_STEPS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) while (dac >= CN3927V_GRADUAL_MOVELENS_STEPS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) cn3927v_set_dac(dev_vcm, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) usleep_range(move_time, move_time + 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) dac -= CN3927V_GRADUAL_MOVELENS_STEPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) if (dac <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) if (dac < CN3927V_GRADUAL_MOVELENS_STEPS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) dac = CN3927V_GRADUAL_MOVELENS_STEPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) cn3927v_set_dac(dev_vcm, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) /* set to power down mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) if (dev_vcm->adcanced_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) cn3927v_write_reg(client, 0x02, 1, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) /* Ringing off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) cn3927v_write_msg(client, 0xDC, 0x51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) __cn3927v_set_power(dev_vcm, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) static int __maybe_unused cn3927v_vcm_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) struct v4l2_subdev *sd = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) struct cn3927v_device *dev_vcm = sd_to_cn3927v_vcm(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) unsigned int move_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) int dac = dev_vcm->start_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) __cn3927v_set_power(dev_vcm, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) cn3927v_init(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) usleep_range(1000, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) dev_dbg(&client->dev, "%s: current_lens_pos %d, current_related_pos %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) __func__, dev_vcm->current_lens_pos, dev_vcm->current_related_pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) move_time = 1000 * cn3927v_move_time(dev_vcm, CN3927V_GRADUAL_MOVELENS_STEPS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) while (dac <= dev_vcm->current_lens_pos) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) cn3927v_set_dac(dev_vcm, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) usleep_range(move_time, move_time + 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) dac += CN3927V_GRADUAL_MOVELENS_STEPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) if (dac >= dev_vcm->current_lens_pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) if (dac > dev_vcm->current_lens_pos) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) dac = dev_vcm->current_lens_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) cn3927v_set_dac(dev_vcm, dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) static const struct i2c_device_id cn3927v_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) { CN3927V_NAME, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) { { 0 } }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) MODULE_DEVICE_TABLE(i2c, cn3927v_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) static const struct of_device_id cn3927v_of_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) { .compatible = "chipnext,cn3927v" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) { { 0 } }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) MODULE_DEVICE_TABLE(of, cn3927v_of_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) static const struct dev_pm_ops cn3927v_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) SET_SYSTEM_SLEEP_PM_OPS(cn3927v_vcm_suspend, cn3927v_vcm_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) SET_RUNTIME_PM_OPS(cn3927v_vcm_suspend, cn3927v_vcm_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) static struct i2c_driver cn3927v_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) .name = CN3927V_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) .pm = &cn3927v_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) .of_match_table = cn3927v_of_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) .probe = &cn3927v_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) .remove = &cn3927v_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) .id_table = cn3927v_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) module_i2c_driver(cn3927v_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) MODULE_DESCRIPTION("CN3927V VCM driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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