Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Aptina Sensor PLL Configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2012 Laurent Pinchart <laurent.pinchart@ideasonboard.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef __APTINA_PLL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define __APTINA_PLL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) struct aptina_pll {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	unsigned int ext_clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	unsigned int pix_clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	unsigned int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	unsigned int m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	unsigned int p1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct aptina_pll_limits {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	unsigned int ext_clock_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	unsigned int ext_clock_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	unsigned int int_clock_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	unsigned int int_clock_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	unsigned int out_clock_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	unsigned int out_clock_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	unsigned int pix_clock_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	unsigned int n_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	unsigned int n_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	unsigned int m_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	unsigned int m_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	unsigned int p1_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	unsigned int p1_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int aptina_pll_calculate(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 			 const struct aptina_pll_limits *limits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			 struct aptina_pll *pll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #endif /* __APTINA_PLL_H */