Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * tdhd1.h - ALPS TDHD1-204A tuner support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2008 Oliver Endriss <o.endriss@gmx.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * The project's page is at https://linuxtv.org
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef TDHD1_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define TDHD1_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "tda1004x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static int alps_tdhd1_204_request_firmware(struct dvb_frontend *fe, const struct firmware **fw, char *name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static struct tda1004x_config alps_tdhd1_204a_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	.demod_address = 0x8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	.invert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	.invert_oclk = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	.xtal_freq = TDA10046_XTAL_4M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	.agc_config = TDA10046_AGC_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	.if_freq = TDA10046_FREQ_3617,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	.request_firmware = alps_tdhd1_204_request_firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int alps_tdhd1_204a_tuner_set_params(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	struct i2c_adapter *i2c = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	u8 data[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	u32 div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	div = (p->frequency + 36166666) / 166666;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	data[0] = (div >> 8) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	data[1] = div & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	data[2] = 0x85;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	if (p->frequency >= 174000000 && p->frequency <= 230000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		data[3] = 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	else if (p->frequency >= 470000000 && p->frequency <= 823000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		data[3] = 0x0C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	else if (p->frequency > 823000000 && p->frequency <= 862000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		data[3] = 0x8C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	if (i2c_transfer(i2c, &msg, 1) != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif /* TDHD1_H */