^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * NXP TDA10071 + Conexant CX24118A DVB-S/S2 demodulator + tuner driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef TDA10071_PRIV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define TDA10071_PRIV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "tda10071.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct tda10071_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct dvb_frontend fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct mutex cmd_execute_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) u32 clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u16 i2c_wr_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u8 ts_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) bool spec_inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u8 pll_multiplier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u8 tuner_i2c_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u8 meas_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u32 dvbv3_ber;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) enum fe_status fe_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) enum fe_delivery_system delivery_system;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) bool warm; /* FW running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u64 post_bit_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u64 block_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static struct tda10071_modcod {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) enum fe_delivery_system delivery_system;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) enum fe_modulation modulation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) enum fe_code_rate fec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) } TDA10071_MODCOD[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* NBC-QPSK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) { SYS_DVBS2, QPSK, FEC_AUTO, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) { SYS_DVBS2, QPSK, FEC_1_2, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) { SYS_DVBS2, QPSK, FEC_3_5, 0x05 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) { SYS_DVBS2, QPSK, FEC_2_3, 0x06 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { SYS_DVBS2, QPSK, FEC_4_5, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) { SYS_DVBS2, QPSK, FEC_5_6, 0x09 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) { SYS_DVBS2, QPSK, FEC_8_9, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) { SYS_DVBS2, QPSK, FEC_9_10, 0x0b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* 8PSK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) { SYS_DVBS2, PSK_8, FEC_AUTO, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { SYS_DVBS2, PSK_8, FEC_3_5, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { SYS_DVBS2, PSK_8, FEC_5_6, 0x0f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { SYS_DVBS2, PSK_8, FEC_8_9, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* QPSK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { SYS_DVBS, QPSK, FEC_AUTO, 0x2d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { SYS_DVBS, QPSK, FEC_1_2, 0x2e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { SYS_DVBS, QPSK, FEC_2_3, 0x2f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) { SYS_DVBS, QPSK, FEC_3_4, 0x30 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { SYS_DVBS, QPSK, FEC_5_6, 0x31 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { SYS_DVBS, QPSK, FEC_7_8, 0x32 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct tda10071_reg_val_mask {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u8 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* firmware filename */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define TDA10071_FIRMWARE "dvb-fe-tda10071.fw"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* firmware commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define CMD_DEMOD_INIT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define CMD_CHANGE_CHANNEL 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define CMD_MPEG_CONFIG 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define CMD_TUNER_INIT 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define CMD_GET_AGCACC 0x1a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define CMD_LNB_CONFIG 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define CMD_LNB_SEND_DISEQC 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define CMD_LNB_SET_DC_LEVEL 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define CMD_LNB_PCB_CONFIG 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define CMD_LNB_SEND_TONEBURST 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define CMD_LNB_UPDATE_REPLY 0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define CMD_GET_FW_VERSION 0x35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define CMD_SET_SLEEP_MODE 0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define CMD_BER_CONTROL 0x3e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define CMD_BER_UPDATE_COUNTERS 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* firmware command struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define TDA10071_ARGLEN 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct tda10071_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u8 args[TDA10071_ARGLEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u8 len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #endif /* TDA10071_PRIV */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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