^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Driver for Philips tda1004xh OFDM Frontend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) (c) 2004 Andrew de Quincey
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef TDA1004X_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define TDA1004X_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/dvb/frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) enum tda10046_xtal {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) TDA10046_XTAL_4M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) TDA10046_XTAL_16M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) enum tda10046_agc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) TDA10046_AGC_DEFAULT, /* original configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) TDA10046_AGC_IFO_AUTO_NEG, /* IF AGC only, automatic, negative */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) TDA10046_AGC_IFO_AUTO_POS, /* IF AGC only, automatic, positive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) TDA10046_AGC_TDA827X, /* IF AGC only, special setup for tda827x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Many (hybrid) boards use GPIO 1 and 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) GPIO1 analog - dvb switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) GPIO3 firmware eeprom address switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) enum tda10046_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) TDA10046_GPTRI = 0x00, /* All GPIOs tristate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) TDA10046_GP00 = 0x40, /* GPIO3=0, GPIO1=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) TDA10046_GP01 = 0x42, /* GPIO3=0, GPIO1=1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) TDA10046_GP10 = 0x48, /* GPIO3=1, GPIO1=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) TDA10046_GP11 = 0x4a, /* GPIO3=1, GPIO1=1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) TDA10046_GP00_I = 0x80, /* GPIO3=0, GPIO1=0, invert in sleep mode*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) TDA10046_GP01_I = 0x82, /* GPIO3=0, GPIO1=1, invert in sleep mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) TDA10046_GP10_I = 0x88, /* GPIO3=1, GPIO1=0, invert in sleep mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) TDA10046_GP11_I = 0x8a, /* GPIO3=1, GPIO1=1, invert in sleep mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) enum tda10046_if {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) TDA10046_FREQ_3617, /* original config, 36,166 MHZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) TDA10046_FREQ_3613, /* 36,13 MHZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) TDA10046_FREQ_045, /* low IF, 4.0, 4.5, or 5.0 MHZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) TDA10046_FREQ_052, /* low IF, 5.1667 MHZ for tda9889 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) enum tda10046_tsout {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) TDA10046_TS_PARALLEL = 0x00, /* parallel transport stream, default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) TDA10046_TS_SERIAL = 0x01, /* serial transport stream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct tda1004x_config
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* the demodulator's i2c address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u8 demod_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* does the "inversion" need inverted? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u8 invert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Does the OCLK signal need inverted? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u8 invert_oclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* parallel or serial transport stream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) enum tda10046_tsout ts_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* Xtal frequency, 4 or 16MHz*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) enum tda10046_xtal xtal_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* IF frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) enum tda10046_if if_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* AGC configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) enum tda10046_agc agc_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* setting of GPIO1 and 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) enum tda10046_gpio gpio_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* slave address and configuration of the tuner */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) u8 tuner_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u8 antenna_switch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* if the board uses another I2c Bridge (tda8290), its address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u8 i2c_gate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* request firmware for device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int (*request_firmware)(struct dvb_frontend* fe, const struct firmware **fw, char* name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) enum tda1004x_demod {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) TDA1004X_DEMOD_TDA10045,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) TDA1004X_DEMOD_TDA10046,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct tda1004x_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct i2c_adapter* i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) const struct tda1004x_config* config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct dvb_frontend frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* private demod data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) enum tda1004x_demod demod_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #if IS_REACHABLE(CONFIG_DVB_TDA1004X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) extern struct dvb_frontend* tda10045_attach(const struct tda1004x_config* config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct i2c_adapter* i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) extern struct dvb_frontend* tda10046_attach(const struct tda1004x_config* config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct i2c_adapter* i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static inline struct dvb_frontend* tda10045_attach(const struct tda1004x_config* config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct i2c_adapter* i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static inline struct dvb_frontend* tda10046_attach(const struct tda1004x_config* config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct i2c_adapter* i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #endif // CONFIG_DVB_TDA1004X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static inline int tda1004x_writereg(struct dvb_frontend *fe, u8 reg, u8 val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int r = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u8 buf[] = {reg, val};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (fe->ops.write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) r = fe->ops.write(fe, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #endif // TDA1004X_H