^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) STV0900/0903 Multistandard Broadcast Frontend driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Copyright (C) Manu Abraham <abraham.manu@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Copyright (C) ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/dvb/frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "stv6110x.h" /* for demodulator internal modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "stv090x_reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "stv090x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "stv090x_priv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Max transfer size done by I2C transfer functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MAX_XFER_SIZE 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static unsigned int verbose;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) module_param(verbose, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* internal params node */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct stv090x_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* pointer for internal params, one for each pair of demods */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct stv090x_internal *internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct stv090x_dev *next_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* first internal params */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static struct stv090x_dev *stv090x_first_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* find chip by i2c adapter and i2c address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static struct stv090x_dev *find_dev(struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u8 i2c_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct stv090x_dev *temp_dev = stv090x_first_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Search of the last stv0900 chip or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) find it by i2c adapter and i2c address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) while ((temp_dev != NULL) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) ((temp_dev->internal->i2c_adap != i2c_adap) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) (temp_dev->internal->i2c_addr != i2c_addr))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) temp_dev = temp_dev->next_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return temp_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* deallocating chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static void remove_dev(struct stv090x_internal *internal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct stv090x_dev *prev_dev = stv090x_first_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct stv090x_dev *del_dev = find_dev(internal->i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) internal->i2c_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (del_dev != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (del_dev == stv090x_first_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) stv090x_first_dev = del_dev->next_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) while (prev_dev->next_dev != del_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) prev_dev = prev_dev->next_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) prev_dev->next_dev = del_dev->next_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) kfree(del_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* allocating new chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static struct stv090x_dev *append_internal(struct stv090x_internal *internal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct stv090x_dev *new_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct stv090x_dev *temp_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) new_dev = kmalloc(sizeof(struct stv090x_dev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (new_dev != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) new_dev->internal = internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) new_dev->next_dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* append to list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (stv090x_first_dev == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) stv090x_first_dev = new_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) temp_dev = stv090x_first_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) while (temp_dev->next_dev != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) temp_dev = temp_dev->next_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) temp_dev->next_dev = new_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return new_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* DVBS1 and DSS C/N Lookup table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static const struct stv090x_tab stv090x_s1cn_tab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) { 0, 8917 }, /* 0.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) { 5, 8801 }, /* 0.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) { 10, 8667 }, /* 1.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) { 15, 8522 }, /* 1.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) { 20, 8355 }, /* 2.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) { 25, 8175 }, /* 2.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) { 30, 7979 }, /* 3.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) { 35, 7763 }, /* 3.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { 40, 7530 }, /* 4.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) { 45, 7282 }, /* 4.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) { 50, 7026 }, /* 5.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) { 55, 6781 }, /* 5.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { 60, 6514 }, /* 6.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) { 65, 6241 }, /* 6.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) { 70, 5965 }, /* 7.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) { 75, 5690 }, /* 7.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) { 80, 5424 }, /* 8.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) { 85, 5161 }, /* 8.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) { 90, 4902 }, /* 9.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) { 95, 4654 }, /* 9.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) { 100, 4417 }, /* 10.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) { 105, 4186 }, /* 10.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) { 110, 3968 }, /* 11.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) { 115, 3757 }, /* 11.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) { 120, 3558 }, /* 12.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) { 125, 3366 }, /* 12.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) { 130, 3185 }, /* 13.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) { 135, 3012 }, /* 13.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) { 140, 2850 }, /* 14.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) { 145, 2698 }, /* 14.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { 150, 2550 }, /* 15.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) { 160, 2283 }, /* 16.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { 170, 2042 }, /* 17.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) { 180, 1827 }, /* 18.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { 190, 1636 }, /* 19.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) { 200, 1466 }, /* 20.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) { 210, 1315 }, /* 21.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) { 220, 1181 }, /* 22.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) { 230, 1064 }, /* 23.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) { 240, 960 }, /* 24.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) { 250, 869 }, /* 25.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) { 260, 792 }, /* 26.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) { 270, 724 }, /* 27.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) { 280, 665 }, /* 28.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) { 290, 616 }, /* 29.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) { 300, 573 }, /* 30.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) { 310, 537 }, /* 31.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) { 320, 507 }, /* 32.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) { 330, 483 }, /* 33.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) { 400, 398 }, /* 40.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) { 450, 381 }, /* 45.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) { 500, 377 } /* 50.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* DVBS2 C/N Lookup table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static const struct stv090x_tab stv090x_s2cn_tab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) { -30, 13348 }, /* -3.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) { -20, 12640 }, /* -2d.0B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) { -10, 11883 }, /* -1.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) { 0, 11101 }, /* -0.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) { 5, 10718 }, /* 0.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) { 10, 10339 }, /* 1.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) { 15, 9947 }, /* 1.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) { 20, 9552 }, /* 2.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) { 25, 9183 }, /* 2.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) { 30, 8799 }, /* 3.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) { 35, 8422 }, /* 3.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) { 40, 8062 }, /* 4.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) { 45, 7707 }, /* 4.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) { 50, 7353 }, /* 5.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) { 55, 7025 }, /* 5.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) { 60, 6684 }, /* 6.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) { 65, 6331 }, /* 6.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) { 70, 6036 }, /* 7.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) { 75, 5727 }, /* 7.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) { 80, 5437 }, /* 8.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) { 85, 5164 }, /* 8.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) { 90, 4902 }, /* 9.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) { 95, 4653 }, /* 9.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) { 100, 4408 }, /* 10.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) { 105, 4187 }, /* 10.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) { 110, 3961 }, /* 11.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) { 115, 3751 }, /* 11.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) { 120, 3558 }, /* 12.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) { 125, 3368 }, /* 12.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) { 130, 3191 }, /* 13.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) { 135, 3017 }, /* 13.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) { 140, 2862 }, /* 14.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) { 145, 2710 }, /* 14.5dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) { 150, 2565 }, /* 15.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) { 160, 2300 }, /* 16.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) { 170, 2058 }, /* 17.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) { 180, 1849 }, /* 18.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) { 190, 1663 }, /* 19.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) { 200, 1495 }, /* 20.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) { 210, 1349 }, /* 21.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) { 220, 1222 }, /* 22.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) { 230, 1110 }, /* 23.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) { 240, 1011 }, /* 24.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) { 250, 925 }, /* 25.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) { 260, 853 }, /* 26.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) { 270, 789 }, /* 27.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) { 280, 734 }, /* 28.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) { 290, 690 }, /* 29.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) { 300, 650 }, /* 30.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) { 310, 619 }, /* 31.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) { 320, 593 }, /* 32.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) { 330, 571 }, /* 33.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) { 400, 498 }, /* 40.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) { 450, 484 }, /* 45.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) { 500, 481 } /* 50.0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* RF level C/N lookup table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static const struct stv090x_tab stv090x_rf_tab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) { -5, 0xcaa1 }, /* -5dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) { -10, 0xc229 }, /* -10dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) { -15, 0xbb08 }, /* -15dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) { -20, 0xb4bc }, /* -20dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) { -25, 0xad5a }, /* -25dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) { -30, 0xa298 }, /* -30dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) { -35, 0x98a8 }, /* -35dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) { -40, 0x8389 }, /* -40dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) { -45, 0x59be }, /* -45dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) { -50, 0x3a14 }, /* -50dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) { -55, 0x2d11 }, /* -55dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) { -60, 0x210d }, /* -60dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) { -65, 0xa14f }, /* -65dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) { -70, 0x07aa } /* -70dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static struct stv090x_reg stv0900_initval[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) { STV090x_OUTCFG, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) { STV090x_MODECFG, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) { STV090x_AGCRF1CFG, 0x11 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) { STV090x_AGCRF2CFG, 0x13 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) { STV090x_TSGENERAL1X, 0x14 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) { STV090x_TSTTNR2, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) { STV090x_TSTTNR4, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) { STV090x_P2_DISTXCTL, 0x22 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) { STV090x_P2_F22TX, 0xc0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) { STV090x_P2_F22RX, 0xc0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) { STV090x_P2_DISRXCTL, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) { STV090x_P2_DMDCFGMD, 0xF9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) { STV090x_P2_DEMOD, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) { STV090x_P2_DMDCFG3, 0xc4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) { STV090x_P2_CARFREQ, 0xed },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) { STV090x_P2_LDT, 0xd0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) { STV090x_P2_LDT2, 0xb8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) { STV090x_P2_TMGCFG, 0xd2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) { STV090x_P2_TMGTHRISE, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) { STV090x_P1_TMGCFG, 0xd2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) { STV090x_P2_TMGTHFALL, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) { STV090x_P2_FECSPY, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) { STV090x_P2_FSPYDATA, 0x3a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) { STV090x_P2_FBERCPT4, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) { STV090x_P2_FSPYBER, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) { STV090x_P2_ERRCTRL1, 0x35 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) { STV090x_P2_ERRCTRL2, 0xc1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) { STV090x_P2_CFRICFG, 0xf8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) { STV090x_P2_NOSCFG, 0x1c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) { STV090x_P2_DMDTOM, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) { STV090x_P2_CORRELMANT, 0x70 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) { STV090x_P2_CORRELABS, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) { STV090x_P2_AGC2O, 0x5b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) { STV090x_P2_AGC2REF, 0x38 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) { STV090x_P2_CARCFG, 0xe4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) { STV090x_P2_ACLC, 0x1A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) { STV090x_P2_BCLC, 0x09 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) { STV090x_P2_CARHDR, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) { STV090x_P2_KREFTMG, 0xc1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) { STV090x_P2_SFRUPRATIO, 0xf0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) { STV090x_P2_SFRLOWRATIO, 0x70 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) { STV090x_P2_SFRSTEP, 0x58 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) { STV090x_P2_TMGCFG2, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) { STV090x_P2_CAR2CFG, 0x26 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) { STV090x_P2_BCLC2S2Q, 0x86 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) { STV090x_P2_BCLC2S28, 0x86 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) { STV090x_P2_SMAPCOEF7, 0x77 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) { STV090x_P2_SMAPCOEF6, 0x85 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) { STV090x_P2_SMAPCOEF5, 0x77 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) { STV090x_P2_TSCFGL, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) { STV090x_P2_DMDCFG2, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) { STV090x_P2_MODCODLST0, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) { STV090x_P2_MODCODLST1, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) { STV090x_P2_MODCODLST2, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) { STV090x_P2_MODCODLST3, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) { STV090x_P2_MODCODLST4, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) { STV090x_P2_MODCODLST5, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) { STV090x_P2_MODCODLST6, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) { STV090x_P2_MODCODLST7, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) { STV090x_P2_MODCODLST8, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) { STV090x_P2_MODCODLST9, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) { STV090x_P2_MODCODLSTA, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) { STV090x_P2_MODCODLSTB, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) { STV090x_P2_MODCODLSTC, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) { STV090x_P2_MODCODLSTD, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) { STV090x_P2_MODCODLSTE, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) { STV090x_P2_MODCODLSTF, 0xcf },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) { STV090x_P1_DISTXCTL, 0x22 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) { STV090x_P1_F22TX, 0xc0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) { STV090x_P1_F22RX, 0xc0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) { STV090x_P1_DISRXCTL, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) { STV090x_P1_DMDCFGMD, 0xf9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) { STV090x_P1_DEMOD, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) { STV090x_P1_DMDCFG3, 0xc4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) { STV090x_P1_DMDTOM, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) { STV090x_P1_CARFREQ, 0xed },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) { STV090x_P1_LDT, 0xd0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) { STV090x_P1_LDT2, 0xb8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) { STV090x_P1_TMGCFG, 0xd2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) { STV090x_P1_TMGTHRISE, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) { STV090x_P1_TMGTHFALL, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) { STV090x_P1_SFRUPRATIO, 0xf0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) { STV090x_P1_SFRLOWRATIO, 0x70 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) { STV090x_P1_TSCFGL, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) { STV090x_P1_FECSPY, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) { STV090x_P1_FSPYDATA, 0x3a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) { STV090x_P1_FBERCPT4, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) { STV090x_P1_FSPYBER, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) { STV090x_P1_ERRCTRL1, 0x35 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) { STV090x_P1_ERRCTRL2, 0xc1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) { STV090x_P1_CFRICFG, 0xf8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) { STV090x_P1_NOSCFG, 0x1c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) { STV090x_P1_CORRELMANT, 0x70 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) { STV090x_P1_CORRELABS, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) { STV090x_P1_AGC2O, 0x5b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) { STV090x_P1_AGC2REF, 0x38 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) { STV090x_P1_CARCFG, 0xe4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) { STV090x_P1_ACLC, 0x1A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) { STV090x_P1_BCLC, 0x09 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) { STV090x_P1_CARHDR, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) { STV090x_P1_KREFTMG, 0xc1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) { STV090x_P1_SFRSTEP, 0x58 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) { STV090x_P1_TMGCFG2, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) { STV090x_P1_CAR2CFG, 0x26 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) { STV090x_P1_BCLC2S2Q, 0x86 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) { STV090x_P1_BCLC2S28, 0x86 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) { STV090x_P1_SMAPCOEF7, 0x77 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) { STV090x_P1_SMAPCOEF6, 0x85 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) { STV090x_P1_SMAPCOEF5, 0x77 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) { STV090x_P1_DMDCFG2, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) { STV090x_P1_MODCODLST0, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) { STV090x_P1_MODCODLST1, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) { STV090x_P1_MODCODLST2, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) { STV090x_P1_MODCODLST3, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) { STV090x_P1_MODCODLST4, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) { STV090x_P1_MODCODLST5, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) { STV090x_P1_MODCODLST6, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) { STV090x_P1_MODCODLST7, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) { STV090x_P1_MODCODLST8, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) { STV090x_P1_MODCODLST9, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) { STV090x_P1_MODCODLSTA, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) { STV090x_P1_MODCODLSTB, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) { STV090x_P1_MODCODLSTC, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) { STV090x_P1_MODCODLSTD, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) { STV090x_P1_MODCODLSTE, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) { STV090x_P1_MODCODLSTF, 0xcf },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) { STV090x_GENCFG, 0x1d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) { STV090x_NBITER_NF4, 0x37 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) { STV090x_NBITER_NF5, 0x29 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) { STV090x_NBITER_NF6, 0x37 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) { STV090x_NBITER_NF7, 0x33 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) { STV090x_NBITER_NF8, 0x31 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) { STV090x_NBITER_NF9, 0x2f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) { STV090x_NBITER_NF10, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) { STV090x_NBITER_NF11, 0x3a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) { STV090x_NBITER_NF12, 0x29 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) { STV090x_NBITER_NF13, 0x37 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) { STV090x_NBITER_NF14, 0x33 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) { STV090x_NBITER_NF15, 0x2f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) { STV090x_NBITER_NF16, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) { STV090x_NBITER_NF17, 0x3a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) { STV090x_NBITERNOERR, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) { STV090x_GAINLLR_NF4, 0x0C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) { STV090x_GAINLLR_NF5, 0x0F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) { STV090x_GAINLLR_NF6, 0x11 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) { STV090x_GAINLLR_NF7, 0x14 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) { STV090x_GAINLLR_NF8, 0x17 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) { STV090x_GAINLLR_NF9, 0x19 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) { STV090x_GAINLLR_NF10, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) { STV090x_GAINLLR_NF11, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) { STV090x_GAINLLR_NF12, 0x0D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) { STV090x_GAINLLR_NF13, 0x0F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) { STV090x_GAINLLR_NF14, 0x13 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) { STV090x_GAINLLR_NF15, 0x1A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) { STV090x_GAINLLR_NF16, 0x1F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) { STV090x_GAINLLR_NF17, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) { STV090x_RCCFGH, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) { STV090x_P1_FECM, 0x01 }, /* disable DSS modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) { STV090x_P2_FECM, 0x01 }, /* disable DSS modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) { STV090x_P1_PRVIT, 0x2F }, /* disable PR 6/7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) { STV090x_P2_PRVIT, 0x2F }, /* disable PR 6/7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) static struct stv090x_reg stv0903_initval[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) { STV090x_OUTCFG, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) { STV090x_AGCRF1CFG, 0x11 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) { STV090x_STOPCLK1, 0x48 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) { STV090x_STOPCLK2, 0x14 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) { STV090x_TSTTNR1, 0x27 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) { STV090x_TSTTNR2, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) { STV090x_P1_DISTXCTL, 0x22 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) { STV090x_P1_F22TX, 0xc0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) { STV090x_P1_F22RX, 0xc0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) { STV090x_P1_DISRXCTL, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) { STV090x_P1_DMDCFGMD, 0xF9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) { STV090x_P1_DEMOD, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) { STV090x_P1_DMDCFG3, 0xc4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) { STV090x_P1_CARFREQ, 0xed },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) { STV090x_P1_TNRCFG2, 0x82 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) { STV090x_P1_LDT, 0xd0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) { STV090x_P1_LDT2, 0xb8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) { STV090x_P1_TMGCFG, 0xd2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) { STV090x_P1_TMGTHRISE, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) { STV090x_P1_TMGTHFALL, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) { STV090x_P1_SFRUPRATIO, 0xf0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) { STV090x_P1_SFRLOWRATIO, 0x70 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) { STV090x_P1_TSCFGL, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) { STV090x_P1_FECSPY, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) { STV090x_P1_FSPYDATA, 0x3a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) { STV090x_P1_FBERCPT4, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) { STV090x_P1_FSPYBER, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) { STV090x_P1_ERRCTRL1, 0x35 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) { STV090x_P1_ERRCTRL2, 0xc1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) { STV090x_P1_CFRICFG, 0xf8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) { STV090x_P1_NOSCFG, 0x1c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) { STV090x_P1_DMDTOM, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) { STV090x_P1_CORRELMANT, 0x70 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) { STV090x_P1_CORRELABS, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) { STV090x_P1_AGC2O, 0x5b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) { STV090x_P1_AGC2REF, 0x38 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) { STV090x_P1_CARCFG, 0xe4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) { STV090x_P1_ACLC, 0x1A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) { STV090x_P1_BCLC, 0x09 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) { STV090x_P1_CARHDR, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) { STV090x_P1_KREFTMG, 0xc1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) { STV090x_P1_SFRSTEP, 0x58 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) { STV090x_P1_TMGCFG2, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) { STV090x_P1_CAR2CFG, 0x26 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) { STV090x_P1_BCLC2S2Q, 0x86 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) { STV090x_P1_BCLC2S28, 0x86 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) { STV090x_P1_SMAPCOEF7, 0x77 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) { STV090x_P1_SMAPCOEF6, 0x85 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) { STV090x_P1_SMAPCOEF5, 0x77 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) { STV090x_P1_DMDCFG2, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) { STV090x_P1_MODCODLST0, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) { STV090x_P1_MODCODLST1, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) { STV090x_P1_MODCODLST2, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) { STV090x_P1_MODCODLST3, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) { STV090x_P1_MODCODLST4, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) { STV090x_P1_MODCODLST5, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) { STV090x_P1_MODCODLST6, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) { STV090x_P1_MODCODLST7, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) { STV090x_P1_MODCODLST8, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) { STV090x_P1_MODCODLST9, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) { STV090x_P1_MODCODLSTA, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) { STV090x_P1_MODCODLSTB, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) { STV090x_P1_MODCODLSTC, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) { STV090x_P1_MODCODLSTD, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) { STV090x_P1_MODCODLSTE, 0xcc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) { STV090x_P1_MODCODLSTF, 0xcf },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) { STV090x_GENCFG, 0x1c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) { STV090x_NBITER_NF4, 0x37 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) { STV090x_NBITER_NF5, 0x29 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) { STV090x_NBITER_NF6, 0x37 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) { STV090x_NBITER_NF7, 0x33 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) { STV090x_NBITER_NF8, 0x31 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) { STV090x_NBITER_NF9, 0x2f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) { STV090x_NBITER_NF10, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) { STV090x_NBITER_NF11, 0x3a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) { STV090x_NBITER_NF12, 0x29 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) { STV090x_NBITER_NF13, 0x37 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) { STV090x_NBITER_NF14, 0x33 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) { STV090x_NBITER_NF15, 0x2f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) { STV090x_NBITER_NF16, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) { STV090x_NBITER_NF17, 0x3a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) { STV090x_NBITERNOERR, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) { STV090x_GAINLLR_NF4, 0x0C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) { STV090x_GAINLLR_NF5, 0x0F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) { STV090x_GAINLLR_NF6, 0x11 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) { STV090x_GAINLLR_NF7, 0x14 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) { STV090x_GAINLLR_NF8, 0x17 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) { STV090x_GAINLLR_NF9, 0x19 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) { STV090x_GAINLLR_NF10, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) { STV090x_GAINLLR_NF11, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) { STV090x_GAINLLR_NF12, 0x0D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) { STV090x_GAINLLR_NF13, 0x0F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) { STV090x_GAINLLR_NF14, 0x13 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) { STV090x_GAINLLR_NF15, 0x1A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) { STV090x_GAINLLR_NF16, 0x1F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) { STV090x_GAINLLR_NF17, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) { STV090x_RCCFGH, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) { STV090x_P1_FECM, 0x01 }, /*disable the DSS mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) { STV090x_P1_PRVIT, 0x2f } /*disable puncture rate 6/7*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static struct stv090x_reg stv0900_cut20_val[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) { STV090x_P2_DMDCFG3, 0xe8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) { STV090x_P2_DMDCFG4, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) { STV090x_P2_CARFREQ, 0x38 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) { STV090x_P2_CARHDR, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) { STV090x_P2_KREFTMG, 0x5a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) { STV090x_P2_SMAPCOEF7, 0x06 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) { STV090x_P2_SMAPCOEF6, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) { STV090x_P2_SMAPCOEF5, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) { STV090x_P2_NOSCFG, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) { STV090x_P1_DMDCFG3, 0xe8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) { STV090x_P1_DMDCFG4, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) { STV090x_P1_CARFREQ, 0x38 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) { STV090x_P1_CARHDR, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) { STV090x_P1_KREFTMG, 0x5a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) { STV090x_P1_SMAPCOEF7, 0x06 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) { STV090x_P1_SMAPCOEF6, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) { STV090x_P1_SMAPCOEF5, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) { STV090x_P1_NOSCFG, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) { STV090x_GAINLLR_NF4, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) { STV090x_GAINLLR_NF5, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) { STV090x_GAINLLR_NF6, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) { STV090x_GAINLLR_NF7, 0x1F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) { STV090x_GAINLLR_NF8, 0x1E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) { STV090x_GAINLLR_NF9, 0x1E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) { STV090x_GAINLLR_NF10, 0x1D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) { STV090x_GAINLLR_NF11, 0x1B },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) { STV090x_GAINLLR_NF12, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) { STV090x_GAINLLR_NF13, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) { STV090x_GAINLLR_NF14, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) { STV090x_GAINLLR_NF15, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) { STV090x_GAINLLR_NF16, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) { STV090x_GAINLLR_NF17, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) static struct stv090x_reg stv0903_cut20_val[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) { STV090x_P1_DMDCFG3, 0xe8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) { STV090x_P1_DMDCFG4, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) { STV090x_P1_CARFREQ, 0x38 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) { STV090x_P1_CARHDR, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) { STV090x_P1_KREFTMG, 0x5a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) { STV090x_P1_SMAPCOEF7, 0x06 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) { STV090x_P1_SMAPCOEF6, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) { STV090x_P1_SMAPCOEF5, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) { STV090x_P1_NOSCFG, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) { STV090x_GAINLLR_NF4, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) { STV090x_GAINLLR_NF5, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) { STV090x_GAINLLR_NF6, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) { STV090x_GAINLLR_NF7, 0x1F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) { STV090x_GAINLLR_NF8, 0x1E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) { STV090x_GAINLLR_NF9, 0x1E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) { STV090x_GAINLLR_NF10, 0x1D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) { STV090x_GAINLLR_NF11, 0x1B },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) { STV090x_GAINLLR_NF12, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) { STV090x_GAINLLR_NF13, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) { STV090x_GAINLLR_NF14, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) { STV090x_GAINLLR_NF15, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) { STV090x_GAINLLR_NF16, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) { STV090x_GAINLLR_NF17, 0x21 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /* Cut 2.0 Long Frame Tracking CR loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) { STV090x_QPSK_12, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) { STV090x_QPSK_35, 0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) { STV090x_QPSK_23, 0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) { STV090x_QPSK_34, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) { STV090x_QPSK_45, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) { STV090x_QPSK_56, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) { STV090x_QPSK_89, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) { STV090x_8PSK_35, 0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) { STV090x_8PSK_23, 0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) { STV090x_8PSK_34, 0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) { STV090x_8PSK_56, 0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) { STV090x_8PSK_89, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) /* Cut 3.0 Long Frame Tracking CR loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) { STV090x_QPSK_12, 0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) { STV090x_QPSK_35, 0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) { STV090x_QPSK_23, 0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) { STV090x_QPSK_34, 0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) { STV090x_QPSK_45, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) { STV090x_QPSK_56, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) { STV090x_QPSK_89, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) { STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) { STV090x_8PSK_35, 0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) { STV090x_8PSK_23, 0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) { STV090x_8PSK_34, 0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) { STV090x_8PSK_56, 0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) { STV090x_8PSK_89, 0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) { STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) /* Cut 2.0 Long Frame Tracking CR Loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) { STV090x_16APSK_23, 0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) { STV090x_16APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) { STV090x_16APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) { STV090x_16APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) { STV090x_16APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) { STV090x_32APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) { STV090x_32APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) { STV090x_32APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) { STV090x_32APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) /* Cut 3.0 Long Frame Tracking CR Loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut30[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) { STV090x_16APSK_23, 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) { STV090x_16APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) { STV090x_16APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) { STV090x_16APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) { STV090x_16APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) { STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) { STV090x_32APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) { STV090x_32APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) { STV090x_32APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) { STV090x_32APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) { STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) { STV090x_QPSK_14, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) { STV090x_QPSK_13, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) { STV090x_QPSK_25, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut30[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) { STV090x_QPSK_14, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) { STV090x_QPSK_13, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) { STV090x_QPSK_25, 0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) /* Cut 2.0 Short Frame Tracking CR Loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) /* MODCOD 2M 5M 10M 20M 30M */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) { STV090x_QPSK, 0x2f, 0x2e, 0x0e, 0x0e, 0x3d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) { STV090x_8PSK, 0x3e, 0x0e, 0x2d, 0x0d, 0x3c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) { STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) { STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) /* Cut 3.0 Short Frame Tracking CR Loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) /* MODCOD 2M 5M 10M 20M 30M */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) { STV090x_QPSK, 0x2C, 0x2B, 0x0B, 0x0B, 0x3A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) { STV090x_8PSK, 0x3B, 0x0B, 0x2A, 0x0A, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) { STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) { STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) static inline s32 comp2(s32 __x, s32 __width)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) if (__width == 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) return __x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) const struct stv090x_config *config = state->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) u8 b0[] = { reg >> 8, reg & 0xff };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) u8 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) { .addr = config->address, .flags = 0, .buf = b0, .len = 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) { .addr = config->address, .flags = I2C_M_RD, .buf = &buf, .len = 1 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) ret = i2c_transfer(state->i2c, msg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) if (ret != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (ret != -ERESTARTSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) dprintk(FE_ERROR, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) "Read error, Reg=[0x%02x], Status=%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) reg, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) return ret < 0 ? ret : -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (unlikely(*state->verbose >= FE_DEBUGREG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) reg, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) return (unsigned int) buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) const struct stv090x_config *config = state->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) u8 buf[MAX_XFER_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) if (2 + count > sizeof(buf)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) printk(KERN_WARNING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) "%s: i2c wr reg=%04x: len=%d is too big!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) KBUILD_MODNAME, reg, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) buf[0] = reg >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) buf[1] = reg & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) memcpy(&buf[2], data, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) dprintk(FE_DEBUGREG, 1, "%s [0x%04x]: %*ph",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) __func__, reg, count, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) ret = i2c_transfer(state->i2c, &i2c_msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) if (ret != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) if (ret != -ERESTARTSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) reg, data[0], count, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) return ret < 0 ? ret : -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) u8 tmp = data; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) return stv090x_write_regs(state, reg, &tmp, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static int stv090x_i2c_gate_ctrl(struct stv090x_state *state, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) * NOTE! A lock is used as a FSM to control the state in which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * access is serialized between two tuners on the same demod.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) * This has nothing to do with a lock to protect a critical section
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) * which may in some other cases be confused with protecting I/O
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) * access to the demodulator gate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) * In case of any error, the lock is unlocked and exit within the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) * relevant operations themselves.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) if (enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) if (state->config->tuner_i2c_lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) state->config->tuner_i2c_lock(&state->frontend, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) mutex_lock(&state->internal->tuner_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) reg = STV090x_READ_DEMOD(state, I2CRPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if (enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) dprintk(FE_DEBUG, 1, "Enable Gate");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) dprintk(FE_DEBUG, 1, "Disable Gate");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) if (!enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) if (state->config->tuner_i2c_lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) state->config->tuner_i2c_lock(&state->frontend, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) mutex_unlock(&state->internal->tuner_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) if (state->config->tuner_i2c_lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) state->config->tuner_i2c_lock(&state->frontend, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) mutex_unlock(&state->internal->tuner_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) static void stv090x_get_lock_tmg(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) switch (state->algo) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) case STV090x_BLIND_SEARCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) dprintk(FE_DEBUG, 1, "Blind Search");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (state->srate <= 1500000) { /*10Msps< SR <=15Msps*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) state->DemodTimeout = 1500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) state->FecTimeout = 400;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) } else if (state->srate <= 5000000) { /*10Msps< SR <=15Msps*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) state->DemodTimeout = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) state->FecTimeout = 300;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) } else { /*SR >20Msps*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) state->DemodTimeout = 700;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) state->FecTimeout = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) case STV090x_COLD_SEARCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) case STV090x_WARM_SEARCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) dprintk(FE_DEBUG, 1, "Normal Search");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) if (state->srate <= 1000000) { /*SR <=1Msps*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) state->DemodTimeout = 4500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) state->FecTimeout = 1700;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) state->DemodTimeout = 2500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) state->FecTimeout = 1100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) state->DemodTimeout = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) state->FecTimeout = 550;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) state->DemodTimeout = 700;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) state->FecTimeout = 250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) state->DemodTimeout = 400;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) state->FecTimeout = 130;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) } else { /*SR >20Msps*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) state->DemodTimeout = 300;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) state->FecTimeout = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) if (state->algo == STV090x_WARM_SEARCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) state->DemodTimeout /= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) u32 sym;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) if (srate > 60000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) sym = (srate << 4); /* SR * 2^16 / master_clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) sym /= (state->internal->mclk >> 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) } else if (srate > 6000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) sym = (srate << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) sym /= (state->internal->mclk >> 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) sym = (srate << 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) sym /= (state->internal->mclk >> 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) u32 sym;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) srate = 105 * (srate / 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (srate > 60000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) sym = (srate << 4); /* SR * 2^16 / master_clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) sym /= (state->internal->mclk >> 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) } else if (srate > 6000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) sym = (srate << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) sym /= (state->internal->mclk >> 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) sym = (srate << 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) sym /= (state->internal->mclk >> 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) if (sym < 0x7fff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) u32 sym;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) srate = 95 * (srate / 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) if (srate > 60000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) sym = (srate << 4); /* SR * 2^16 / master_clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) sym /= (state->internal->mclk >> 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) } else if (srate > 6000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) sym = (srate << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) sym /= (state->internal->mclk >> 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) sym = (srate << 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) sym /= (state->internal->mclk >> 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) u32 ro;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) switch (rolloff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) case STV090x_RO_20:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) ro = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) case STV090x_RO_25:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) ro = 25;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) case STV090x_RO_35:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) ro = 35;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) return srate + (srate * ro) / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) static int stv090x_set_vit_thacq(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) static int stv090x_set_vit_thtracq(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) static int stv090x_set_viterbi(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) switch (state->search_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) case STV090x_SEARCH_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) case STV090x_SEARCH_DVBS1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) switch (state->fec) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) case STV090x_PR12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) case STV090x_PR23:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) case STV090x_PR34:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) case STV090x_PR56:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) case STV090x_PR78:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) case STV090x_SEARCH_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) switch (state->fec) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) case STV090x_PR12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) case STV090x_PR23:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) case STV090x_PR67:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) static int stv090x_stop_modcod(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) static int stv090x_activate_modcod(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) static int stv090x_activate_modcod_single(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) switch (state->demod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) case STV090x_DEMODULATOR_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) mutex_lock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) reg = stv090x_read_reg(state, STV090x_STOPCLK2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) mutex_unlock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) case STV090x_DEMODULATOR_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) mutex_lock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) reg = stv090x_read_reg(state, STV090x_STOPCLK2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) mutex_unlock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) dprintk(FE_ERROR, 1, "Wrong demodulator!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) mutex_unlock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) static int stv090x_dvbs_track_crl(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) if (state->internal->dev_ver >= 0x30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) /* Set ACLC BCLC optimised value vs SR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) if (state->srate >= 15000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) } else if ((state->srate >= 7000000) && (15000000 > state->srate)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) } else if (state->srate < 7000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) /* Cut 2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) static int stv090x_delivery_search(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) switch (state->search_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) case STV090x_SEARCH_DVBS1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) case STV090x_SEARCH_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) /* Activate Viterbi decoder in legacy search,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) * do not use FRESVIT1, might impact VITERBI2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) if (stv090x_vitclk_ctl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) if (stv090x_dvbs_track_crl(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) if (stv090x_set_vit_thacq(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) if (stv090x_set_viterbi(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) case STV090x_SEARCH_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) if (stv090x_vitclk_ctl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) if (state->internal->dev_ver <= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) /* enable S2 carrier loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) /* > Cut 3: Stop carrier 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) if (state->demod_mode != STV090x_SINGLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) /* Cut 2: enable link during search */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) if (stv090x_activate_modcod(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) /* Single demodulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) * Authorize SHORT and LONG frames,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) * QPSK, 8PSK, 16APSK and 32APSK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) if (stv090x_activate_modcod_single(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) if (stv090x_set_vit_thtracq(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) case STV090x_SEARCH_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) /* enable DVB-S2 and DVB-S2 in Auto MODE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) if (stv090x_vitclk_ctl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) if (stv090x_dvbs_track_crl(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) if (state->internal->dev_ver <= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) /* enable S2 carrier loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) /* > Cut 3: Stop carrier 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) if (state->demod_mode != STV090x_SINGLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) /* Cut 2: enable link during search */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) if (stv090x_activate_modcod(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) /* Single demodulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) * Authorize SHORT and LONG frames,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) * QPSK, 8PSK, 16APSK and 32APSK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) if (stv090x_activate_modcod_single(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) if (stv090x_set_vit_thacq(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) if (stv090x_set_viterbi(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) static int stv090x_start_search(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) u32 reg, freq_abs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) s16 freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) /* Reset demodulator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) reg = STV090x_READ_DEMOD(state, DMDISTATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) if (state->internal->dev_ver <= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) if (state->srate <= 5000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) if (STV090x_WRITE_DEMOD(state, CFRUP0, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) /*enlarge the timing bandwidth for Low SR*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) /* If the symbol rate is >5 Msps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) Set The carrier search up and low to auto mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) /*reduce the timing bandwidth for high SR*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) /* >= Cut 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) if (state->srate <= 5000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) /* enlarge the timing bandwidth for Low SR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) /* reduce timing bandwidth for high SR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) /* Set CFR min and max to manual mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) STV090x_WRITE_DEMOD(state, CARCFG, 0x46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) if (state->algo == STV090x_WARM_SEARCH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) /* WARM Start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) * CFR min = -1MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) * CFR max = +1MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) freq_abs = 1000 << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) freq_abs /= (state->internal->mclk / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) freq = (s16) freq_abs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) /* COLD Start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) * CFR min =- (SearchRange / 2 + 600KHz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) * CFR max = +(SearchRange / 2 + 600KHz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) * (600KHz for the tuner step size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) freq_abs = (state->search_range / 2000) + 600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) freq_abs = freq_abs << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) freq_abs /= (state->internal->mclk / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) freq = (s16) freq_abs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) if (STV090x_WRITE_DEMOD(state, CFRUP0, LSB(freq)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) freq *= -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) (state->search_mode == STV090x_SEARCH_DSS) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) (state->search_mode == STV090x_SEARCH_AUTO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) reg = STV090x_READ_DEMOD(state, DMDCFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) /*Frequency offset detector setting*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) if (state->srate < 2000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) if (state->internal->dev_ver <= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) /* Cut 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) /* Cut 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) } else if (state->srate < 10000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) if (state->srate < 10000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) switch (state->algo) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) case STV090x_WARM_SEARCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) /* The symbol rate and the exact
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) * carrier Frequency are known
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) case STV090x_COLD_SEARCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) /* The symbol rate is known */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) static int stv090x_get_agc2_min_level(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) s32 i, j, steps, dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) if (stv090x_set_srate(state, 1000000) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) steps = state->search_range / 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) if (steps <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) steps = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) dir = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) freq_step = (1000000 * 256) / (state->internal->mclk / 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) freq_init = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) for (i = 0; i < steps; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) if (dir > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) freq_init = freq_init + (freq_step * i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) freq_init = freq_init - (freq_step * i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) dir *= -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) agc2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) for (j = 0; j < 10; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) STV090x_READ_DEMOD(state, AGC2I0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) agc2 /= 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) if (agc2 < agc2_min)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) agc2_min = agc2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) return agc2_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) u8 r3, r2, r1, r0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) s32 srate, int_1, int_2, tmp_1, tmp_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) r3 = STV090x_READ_DEMOD(state, SFR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) r2 = STV090x_READ_DEMOD(state, SFR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) r1 = STV090x_READ_DEMOD(state, SFR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) r0 = STV090x_READ_DEMOD(state, SFR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) srate = ((r3 << 24) | (r2 << 16) | (r1 << 8) | r0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) int_1 = clk >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) int_2 = srate >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) tmp_1 = clk % 0x10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) tmp_2 = srate % 0x10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) srate = (int_1 * int_2) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) ((int_1 * tmp_2) >> 16) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) ((int_2 * tmp_1) >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) return srate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) struct dvb_frontend *fe = &state->frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) int tmg_lock = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) u32 agc2th;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) if (state->internal->dev_ver >= 0x30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) agc2th = 0x2e00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) agc2th = 0x1f00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) reg = STV090x_READ_DEMOD(state, DMDISTATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) if (state->internal->dev_ver >= 0x30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) } else if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) if (state->srate <= 2000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) car_step = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) else if (state->srate <= 5000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) car_step = 2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) else if (state->srate <= 12000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) car_step = 3000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) car_step = 5000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) steps = -1 + ((state->search_range / 1000) / car_step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) steps /= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) steps = (2 * steps) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) if (steps < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) steps = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) else if (steps > 10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) steps = 11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) car_step = (state->search_range / 1000) / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) cur_step = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) dir = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) freq = state->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) while ((!tmg_lock) && (cur_step < steps)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) if (STV090x_WRITE_DEMOD(state, SFRINIT1, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) if (STV090x_WRITE_DEMOD(state, SFRINIT0, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) /* trigger acquisition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x40) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) for (i = 0; i < 10; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) reg = STV090x_READ_DEMOD(state, DSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) tmg_cpt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) STV090x_READ_DEMOD(state, AGC2I0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) agc2 /= 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) srate_coarse = stv090x_get_srate(state, state->internal->mclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) cur_step++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) dir *= -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) (srate_coarse < 50000000) && (srate_coarse > 850000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) tmg_lock = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) else if (cur_step < steps) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) if (dir > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) freq += cur_step * car_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) freq -= cur_step * car_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) /* Setup tuner */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) if (state->config->tuner_set_frequency) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) if (state->config->tuner_set_frequency(fe, freq) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) if (state->config->tuner_set_bandwidth) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) if (state->config->tuner_get_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) if (state->config->tuner_get_status(fe, ®) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) if (reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) dprintk(FE_DEBUG, 1, "Tuner phase locked");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) dprintk(FE_DEBUG, 1, "Tuner unlocked");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) if (!tmg_lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) srate_coarse = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) srate_coarse = stv090x_get_srate(state, state->internal->mclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) return srate_coarse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) err_gateoff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) stv090x_i2c_gate_ctrl(state, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) u32 srate_coarse, freq_coarse, sym, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) srate_coarse = stv090x_get_srate(state, state->internal->mclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) freq_coarse = STV090x_READ_DEMOD(state, CFR2) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) if (sym < state->srate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) srate_coarse = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) if (state->internal->dev_ver >= 0x30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) } else if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) if (srate_coarse > 3000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) sym = (sym / 1000) * 65536;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) sym /= (state->internal->mclk / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) sym = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) sym = (sym / 1000) * 65536;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) sym /= (state->internal->mclk / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) sym = (srate_coarse / 1000) * 65536;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) sym /= (state->internal->mclk / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) sym = (sym / 100) * 65536;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) sym /= (state->internal->mclk / 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) sym = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) sym = (sym / 100) * 65536;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) sym /= (state->internal->mclk / 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) sym = (srate_coarse / 100) * 65536;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) sym /= (state->internal->mclk / 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) return srate_coarse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) s32 timer = 0, lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) u8 stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) while ((timer < timeout) && (!lock)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) reg = STV090x_READ_DEMOD(state, DMDSTATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) switch (stat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) case 0: /* searching */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) case 1: /* first PLH detected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) dprintk(FE_DEBUG, 1, "Demodulator searching ..");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) case 2: /* DVB-S2 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) case 3: /* DVB-S1/legacy mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) reg = STV090x_READ_DEMOD(state, DSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) if (!lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) timer += 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) return lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) static int stv090x_blind_search(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) u32 agc2, reg, srate_coarse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) s32 cpt_fail, agc2_ovflw, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) u8 k_ref, k_max, k_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) int coarse_fail = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) int lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) k_max = 110;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) k_min = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) agc2 = stv090x_get_agc2_min_level(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) if (agc2 > STV090x_SEARCH_AGC2_TH(state->internal->dev_ver)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) if (state->internal->dev_ver <= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) /* > Cut 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) k_ref = k_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) if (stv090x_srate_srch_coarse(state) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) srate_coarse = stv090x_srate_srch_fine(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) if (srate_coarse != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) stv090x_get_lock_tmg(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) lock = stv090x_get_dmdlock(state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) state->DemodTimeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) cpt_fail = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) agc2_ovflw = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) for (i = 0; i < 10; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) STV090x_READ_DEMOD(state, AGC2I0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) if (agc2 >= 0xff00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) agc2_ovflw++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) reg = STV090x_READ_DEMOD(state, DSTATUS2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) cpt_fail++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) if ((cpt_fail > 7) || (agc2_ovflw > 7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) coarse_fail = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) k_ref -= 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) return lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) static int stv090x_chk_tmg(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) s32 tmg_cpt = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) u8 freq, tmg_thh, tmg_thl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) int tmg_lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) freq = STV090x_READ_DEMOD(state, CARFREQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) for (i = 0; i < 10; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) reg = STV090x_READ_DEMOD(state, DSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) tmg_cpt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) if (tmg_cpt >= 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) tmg_lock = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) return tmg_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) struct dvb_frontend *fe = &state->frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) s32 car_step, steps, cur_step, dir, freq, timeout_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) int lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) if (state->srate >= 10000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) timeout_lock = timeout_dmd / 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) timeout_lock = timeout_dmd / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) if (lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) return lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) if (state->srate >= 10000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) if (stv090x_chk_tmg(state)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) return stv090x_get_dmdlock(state, timeout_dmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) if (state->srate <= 4000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) car_step = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) else if (state->srate <= 7000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) car_step = 2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) else if (state->srate <= 10000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) car_step = 3000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) car_step = 5000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) steps = (state->search_range / 1000) / car_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) steps /= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) steps = 2 * (steps + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) if (steps < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) steps = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) else if (steps > 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) steps = 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) cur_step = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) dir = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) freq = state->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) while ((cur_step <= steps) && (!lock)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) if (dir > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) freq += cur_step * car_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) freq -= cur_step * car_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) /* Setup tuner */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) if (state->config->tuner_set_frequency) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) if (state->config->tuner_set_frequency(fe, freq) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) if (state->config->tuner_set_bandwidth) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) if (state->config->tuner_get_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) if (state->config->tuner_get_status(fe, ®) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) if (reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) dprintk(FE_DEBUG, 1, "Tuner phase locked");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) dprintk(FE_DEBUG, 1, "Tuner unlocked");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) dir *= -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) cur_step++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) return lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) err_gateoff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) stv090x_i2c_gate_ctrl(state, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) s32 timeout, inc, steps_max, srate, car_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) srate = state->srate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) car_max = state->search_range / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) car_max += car_max / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) car_max = 65536 * (car_max / 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) car_max /= (state->internal->mclk / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) if (car_max > 0x4000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) inc = srate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) inc /= state->internal->mclk / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) inc *= 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) inc *= 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) inc /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) switch (state->search_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) case STV090x_SEARCH_DVBS1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) case STV090x_SEARCH_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) inc *= 3; /* freq step = 3% of srate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) timeout = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) case STV090x_SEARCH_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) inc *= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) timeout = 25;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) case STV090x_SEARCH_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) inc *= 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) timeout = 25;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) inc /= 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) if ((inc > car_max) || (inc < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) inc = car_max / 2; /* increment <= 1/8 Mclk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) timeout *= 27500; /* 27.5 Msps reference */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) if (srate > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) timeout /= (srate / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) if ((timeout > 100) || (timeout < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) timeout = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) steps_max = (car_max / inc) + 1; /* min steps = 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) if ((steps_max > 100) || (steps_max < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) steps_max = 100; /* max steps <= 100 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) inc = car_max / steps_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) *freq_inc = inc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) *timeout_sw = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) *steps = steps_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) static int stv090x_chk_signal(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) s32 offst_car, agc2, car_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) int no_signal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) offst_car = STV090x_READ_DEMOD(state, CFR2) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) offst_car |= STV090x_READ_DEMOD(state, CFR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) offst_car = comp2(offst_car, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) agc2 = STV090x_READ_DEMOD(state, AGC2I1) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) car_max = state->search_range / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) car_max += (car_max / 10); /* 10% margin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) car_max = (65536 * car_max / 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) car_max /= state->internal->mclk / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) if (car_max > 0x4000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) car_max = 0x4000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) no_signal = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) dprintk(FE_DEBUG, 1, "No Signal");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) no_signal = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) dprintk(FE_DEBUG, 1, "Found Signal");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) return no_signal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) int no_signal, lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) s32 cpt_step = 0, offst_freq, car_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) car_max = state->search_range / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) car_max += (car_max / 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) car_max = (65536 * car_max / 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) car_max /= (state->internal->mclk / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) if (car_max > 0x4000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) car_max = 0x4000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) if (zigzag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) offst_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) offst_freq = -car_max + inc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) reg = STV090x_READ_DEMOD(state, PDELCTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) if (zigzag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) if (offst_freq >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) offst_freq = -offst_freq - 2 * inc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) offst_freq = -offst_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) offst_freq += 2 * inc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) cpt_step++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) lock = stv090x_get_dmdlock(state, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) no_signal = stv090x_chk_signal(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) } while ((!lock) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) (!no_signal) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) ((offst_freq - inc) < car_max) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) ((offst_freq + inc) > -car_max) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) (cpt_step < steps_max));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) reg = STV090x_READ_DEMOD(state, PDELCTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) return lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) static int stv090x_sw_algo(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) int no_signal, zigzag, lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) s32 dvbs2_fly_wheel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) s32 inc, timeout_step, trials, steps_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) /* get params */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) switch (state->search_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) case STV090x_SEARCH_DVBS1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) case STV090x_SEARCH_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) /* accelerate the frequency detector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) zigzag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) case STV090x_SEARCH_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) zigzag = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) case STV090x_SEARCH_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) /* accelerate the frequency detector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) zigzag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) trials = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) no_signal = stv090x_chk_signal(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) trials++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) /*run the SW search 2 times maximum*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) if (lock || no_signal || (trials == 2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) /*Check if the demod is not losing lock in DVBS2*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) reg = STV090x_READ_DEMOD(state, DMDSTATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) /*Check if the demod is not losing lock in DVBS2*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) msleep(timeout_step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) reg = STV090x_READ_DEMOD(state, DMDFLYW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) if (dvbs2_fly_wheel < 0xd) { /*if correct frames is decrementing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) msleep(timeout_step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) reg = STV090x_READ_DEMOD(state, DMDFLYW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) if (dvbs2_fly_wheel < 0xd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) /*FALSE lock, The demod is losing lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) if (trials < 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) } while ((!lock) && (trials < 2) && (!no_signal));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) return lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) enum stv090x_delsys delsys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) reg = STV090x_READ_DEMOD(state, DMDSTATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) delsys = STV090x_DVBS2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) reg = STV090x_READ_DEMOD(state, FECM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) delsys = STV090x_DSS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) delsys = STV090x_DVBS1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) delsys = STV090x_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) return delsys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) /* in Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) s32 derot, int_1, int_2, tmp_1, tmp_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) derot = STV090x_READ_DEMOD(state, CFR2) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) derot |= STV090x_READ_DEMOD(state, CFR1) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) derot |= STV090x_READ_DEMOD(state, CFR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) derot = comp2(derot, 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) int_1 = mclk >> 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) int_2 = derot >> 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) /* carrier_frequency = MasterClock * Reg / 2^24 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) tmp_1 = mclk % 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) tmp_2 = derot % 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) derot = (int_1 * int_2) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) ((int_1 * tmp_2) >> 12) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) ((int_2 * tmp_1) >> 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) return derot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) static int stv090x_get_viterbi(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) u32 reg, rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) reg = STV090x_READ_DEMOD(state, VITCURPUN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) switch (rate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) case 13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) state->fec = STV090x_PR12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) case 18:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) state->fec = STV090x_PR23;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) case 21:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) state->fec = STV090x_PR34;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) case 24:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) state->fec = STV090x_PR56;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) case 25:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) state->fec = STV090x_PR67;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) case 26:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) state->fec = STV090x_PR78;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) state->fec = STV090x_PRERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) struct dvb_frontend *fe = &state->frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) u8 tmg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) s32 i = 0, offst_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) if (state->algo == STV090x_BLIND_SEARCH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) tmg = STV090x_READ_DEMOD(state, TMGREG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) tmg = STV090x_READ_DEMOD(state, TMGREG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) i += 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) state->delsys = stv090x_get_std(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) if (state->config->tuner_get_frequency) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) offst_freq = stv090x_get_car_freq(state, state->internal->mclk) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) state->frequency += offst_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) if (stv090x_get_viterbi(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) reg = STV090x_READ_DEMOD(state, DMDMODCOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) reg = STV090x_READ_DEMOD(state, TMGOBS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) reg = STV090x_READ_DEMOD(state, FECM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) if (state->config->tuner_get_frequency) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) return STV090x_RANGEOK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) return STV090x_RANGEOK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) return STV090x_RANGEOK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) return STV090x_OUTOFRANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) err_gateoff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) stv090x_i2c_gate_ctrl(state, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) s32 offst_tmg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) offst_tmg = STV090x_READ_DEMOD(state, TMGREG2) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) if (!offst_tmg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) offst_tmg = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) offst_tmg = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) offst_tmg /= 320;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) return offst_tmg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) u8 aclc = 0x29;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) s32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) if (state->internal->dev_ver == 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) car_loop = stv090x_s2_crl_cut20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) car_loop_apsk_low = stv090x_s2_apsk_crl_cut20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) /* >= Cut 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) car_loop = stv090x_s2_crl_cut30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) car_loop_apsk_low = stv090x_s2_apsk_crl_cut30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) if (modcod < STV090x_QPSK_12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) if (i >= 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) i = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) while ((i < 14) && (modcod != car_loop[i].modcod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) if (i >= 14) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) if (i >= 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) i = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) if (modcod <= STV090x_QPSK_25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) if (pilots) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) if (state->srate <= 3000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) aclc = car_loop_qpsk_low[i].crl_pilots_on_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) else if (state->srate <= 7000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) aclc = car_loop_qpsk_low[i].crl_pilots_on_5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) else if (state->srate <= 15000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) aclc = car_loop_qpsk_low[i].crl_pilots_on_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) else if (state->srate <= 25000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) aclc = car_loop_qpsk_low[i].crl_pilots_on_20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) aclc = car_loop_qpsk_low[i].crl_pilots_on_30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) if (state->srate <= 3000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) aclc = car_loop_qpsk_low[i].crl_pilots_off_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) else if (state->srate <= 7000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) aclc = car_loop_qpsk_low[i].crl_pilots_off_5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) else if (state->srate <= 15000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) aclc = car_loop_qpsk_low[i].crl_pilots_off_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) else if (state->srate <= 25000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) aclc = car_loop_qpsk_low[i].crl_pilots_off_20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) aclc = car_loop_qpsk_low[i].crl_pilots_off_30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) } else if (modcod <= STV090x_8PSK_910) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) if (pilots) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) if (state->srate <= 3000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) aclc = car_loop[i].crl_pilots_on_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) else if (state->srate <= 7000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) aclc = car_loop[i].crl_pilots_on_5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) else if (state->srate <= 15000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) aclc = car_loop[i].crl_pilots_on_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) else if (state->srate <= 25000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) aclc = car_loop[i].crl_pilots_on_20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) aclc = car_loop[i].crl_pilots_on_30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) if (state->srate <= 3000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) aclc = car_loop[i].crl_pilots_off_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) else if (state->srate <= 7000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) aclc = car_loop[i].crl_pilots_off_5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) else if (state->srate <= 15000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) aclc = car_loop[i].crl_pilots_off_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) else if (state->srate <= 25000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) aclc = car_loop[i].crl_pilots_off_20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) aclc = car_loop[i].crl_pilots_off_30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) } else { /* 16APSK and 32APSK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) * This should never happen in practice, except if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) * something is really wrong at the car_loop table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) if (i >= 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) i = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) if (state->srate <= 3000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) aclc = car_loop_apsk_low[i].crl_pilots_on_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) else if (state->srate <= 7000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) aclc = car_loop_apsk_low[i].crl_pilots_on_5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) else if (state->srate <= 15000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) aclc = car_loop_apsk_low[i].crl_pilots_on_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) else if (state->srate <= 25000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) aclc = car_loop_apsk_low[i].crl_pilots_on_20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) aclc = car_loop_apsk_low[i].crl_pilots_on_30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) return aclc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) struct stv090x_short_frame_crloop *short_crl = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) s32 index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) u8 aclc = 0x0b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) switch (state->modulation) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) case STV090x_QPSK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) case STV090x_8PSK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) index = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) case STV090x_16APSK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) index = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) case STV090x_32APSK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) index = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) if (state->internal->dev_ver >= 0x30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) /* Cut 3.0 and up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) short_crl = stv090x_s2_short_crl_cut30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) /* Cut 2.0 and up: we don't support cuts older than 2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) short_crl = stv090x_s2_short_crl_cut20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) if (state->srate <= 3000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) aclc = short_crl[index].crl_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) else if (state->srate <= 7000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) aclc = short_crl[index].crl_5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) else if (state->srate <= 15000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) aclc = short_crl[index].crl_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) else if (state->srate <= 25000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) aclc = short_crl[index].crl_20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) aclc = short_crl[index].crl_30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) return aclc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) static int stv090x_optimize_track(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) struct dvb_frontend *fe = &state->frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) enum stv090x_modcod modcod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) srate = stv090x_get_srate(state, state->internal->mclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) srate += stv090x_get_tmgoffst(state, srate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) switch (state->delsys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) case STV090x_DVBS1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) case STV090x_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) if (state->search_mode == STV090x_SEARCH_AUTO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) reg = STV090x_READ_DEMOD(state, DEMOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) if (state->internal->dev_ver >= 0x30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) if (stv090x_get_viterbi(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) if (state->fec == STV090x_PR12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) case STV090x_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) if (state->internal->dev_ver >= 0x30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) if (state->frame_len == STV090x_LONG_FRAME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) reg = STV090x_READ_DEMOD(state, DMDMODCOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) aclc = stv090x_optimize_carloop(state, modcod, pilots);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) if (modcod <= STV090x_QPSK_910) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) } else if (modcod <= STV090x_8PSK_910) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) if (modcod <= STV090x_16APSK_910) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) /*Carrier loop setting for short frame*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) aclc = stv090x_optimize_carloop_short(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) if (state->modulation == STV090x_QPSK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) } else if (state->modulation == STV090x_8PSK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) } else if (state->modulation == STV090x_16APSK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) } else if (state->modulation == STV090x_32APSK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) case STV090x_ERROR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) f_1 = STV090x_READ_DEMOD(state, CFR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) f_0 = STV090x_READ_DEMOD(state, CFR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) reg = STV090x_READ_DEMOD(state, TMGOBS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) if (state->algo == STV090x_BLIND_SEARCH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) reg = STV090x_READ_DEMOD(state, DMDCFGMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) if (stv090x_set_srate(state, srate) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) blind_tune = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) if (stv090x_dvbs_track_crl(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) (state->search_mode == STV090x_SEARCH_DSS) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) (state->search_mode == STV090x_SEARCH_AUTO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987) if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) /* AUTO tracking MODE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) /* AUTO tracking MODE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003) (state->srate < 10000000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) /* update initial carrier freq with the found freq offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) if (state->algo != STV090x_WARM_SEARCH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) if (state->config->tuner_set_bandwidth) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) msleep(50); /* blind search: wait 50ms for SR stabilization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) stv090x_get_lock_tmg(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038) if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047) while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068) if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) stv090x_set_vit_thtracq(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073) err_gateoff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) stv090x_i2c_gate_ctrl(state, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) s32 timer = 0, lock = 0, stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) while ((timer < timeout) && (!lock)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) reg = STV090x_READ_DEMOD(state, DMDSTATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) switch (stat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) case 0: /* searching */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) case 1: /* first PLH detected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) case 2: /* DVB-S2 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097) reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) case 3: /* DVB-S1/legacy mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) if (!lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) timer += 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) return lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117) s32 timer = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) int lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) lock = stv090x_get_dmdlock(state, timeout_dmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) if (lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) lock = stv090x_get_feclock(state, timeout_fec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) if (lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) while ((timer < timeout_fec) && (!lock)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) reg = STV090x_READ_DEMOD(state, TSSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) timer++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) return lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) static int stv090x_set_s2rolloff(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) if (state->internal->dev_ver <= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) /* rolloff to auto mode if DVBS2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) reg = STV090x_READ_DEMOD(state, DEMOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146) if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) /* DVB-S2 rolloff to auto mode if DVBS2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) reg = STV090x_READ_DEMOD(state, DEMOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151) STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162) static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164) struct dvb_frontend *fe = &state->frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167) s32 agc1_power, power_iq = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) int lock = 0, low_sr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) reg = STV090x_READ_DEMOD(state, TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172) if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) if (state->srate > 5000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183) if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x82) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) stv090x_get_lock_tmg(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) if (state->algo == STV090x_BLIND_SEARCH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) if (stv090x_set_srate(state, 1000000) < 0) /* initial srate = 1Msps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) /* known srate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) if (state->srate < 2000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) /* SR < 2MSPS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207) if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) /* SR >= 2Msps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211) if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) if (state->algo == STV090x_COLD_SEARCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) else if (state->algo == STV090x_WARM_SEARCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) /* if cold start or warm (Symbolrate is known)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) * use a Narrow symbol rate scan range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) if (stv090x_set_srate(state, state->srate) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) if (stv090x_set_max_srate(state, state->internal->mclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) state->srate) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) if (stv090x_set_min_srate(state, state->internal->mclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) state->srate) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) if (state->srate >= 10000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244) low_sr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) low_sr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) /* Setup tuner */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) if (state->config->tuner_set_bbgain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) reg = state->config->tuner_bbgain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) if (reg == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) reg = 10; /* default: 10dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) if (state->config->tuner_set_bbgain(fe, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) if (state->config->tuner_set_frequency) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) if (state->config->tuner_set_bandwidth) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) if (state->config->tuner_get_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) if (state->config->tuner_get_status(fe, ®) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) if (reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285) dprintk(FE_DEBUG, 1, "Tuner phase locked");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) dprintk(FE_DEBUG, 1, "Tuner unlocked");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) return STV090x_NOCARRIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) STV090x_READ_DEMOD(state, AGCIQIN0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296) if (agc1_power == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) /* If AGC1 integrator value is 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) * then read POWERI, POWERQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) for (i = 0; i < 5; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) power_iq += (STV090x_READ_DEMOD(state, POWERI) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302) STV090x_READ_DEMOD(state, POWERQ)) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) power_iq /= 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309) lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) signal_state = STV090x_NOAGC1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) reg = STV090x_READ_DEMOD(state, DEMOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315) if (state->internal->dev_ver <= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316) /* rolloff to auto mode if DVBS2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) /* DVB-S2 rolloff to auto mode if DVBS2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320) STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) if (stv090x_delivery_search(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) if (state->algo != STV090x_BLIND_SEARCH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329) if (stv090x_start_search(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) if (signal_state == STV090x_NOAGC1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) return signal_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) if (state->algo == STV090x_BLIND_SEARCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338) lock = stv090x_blind_search(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340) else if (state->algo == STV090x_COLD_SEARCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) lock = stv090x_get_coldlock(state, state->DemodTimeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) else if (state->algo == STV090x_WARM_SEARCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) lock = stv090x_get_dmdlock(state, state->DemodTimeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347) if (!low_sr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348) if (stv090x_chk_tmg(state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) lock = stv090x_sw_algo(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) if (lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) signal_state = stv090x_get_sig_params(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) stv090x_optimize_track(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360) /* >= Cut 2.0 :release TS reset after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) * demod lock and optimized Tracking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) reg = STV090x_READ_DEMOD(state, TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364) STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365) if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) msleep(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379) lock = stv090x_get_lock(state, state->FecTimeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) state->FecTimeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) if (lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) if (state->delsys == STV090x_DVBS2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383) stv090x_set_s2rolloff(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385) reg = STV090x_READ_DEMOD(state, PDELCTRL2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) /* Reset DVBS2 packet delinator error counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) reg = STV090x_READ_DEMOD(state, PDELCTRL2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391) STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392) if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401) /* Reset the Total packet counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) /* Reset the packet Error counter2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) signal_state = STV090x_NODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409) stv090x_chk_signal(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) return signal_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) err_gateoff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415) stv090x_i2c_gate_ctrl(state, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) static int stv090x_set_pls(struct stv090x_state *state, u32 pls_code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423) dprintk(FE_DEBUG, 1, "Set Gold PLS code %d", pls_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) if (STV090x_WRITE_DEMOD(state, PLROOT0, pls_code & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) if (STV090x_WRITE_DEMOD(state, PLROOT1, (pls_code >> 8) & 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428) if (STV090x_WRITE_DEMOD(state, PLROOT2, 0x04 | (pls_code >> 16)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) static int stv090x_set_mis(struct stv090x_state *state, int mis)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440) if (mis < 0 || mis > 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) dprintk(FE_DEBUG, 1, "Disable MIS filtering");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) reg = STV090x_READ_DEMOD(state, PDELCTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) dprintk(FE_DEBUG, 1, "Enable MIS filtering - %d", mis);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) reg = STV090x_READ_DEMOD(state, PDELCTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449) STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450) if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452) if (STV090x_WRITE_DEMOD(state, ISIENTRY, mis) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) if (STV090x_WRITE_DEMOD(state, ISIBITENA, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) static enum dvbfe_search stv090x_search(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) struct dtv_frontend_properties *props = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468) if (props->frequency == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) return DVBFE_ALGO_SEARCH_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471) switch (props->delivery_system) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) case SYS_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473) state->delsys = STV090x_DSS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) case SYS_DVBS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) state->delsys = STV090x_DVBS1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) case SYS_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) state->delsys = STV090x_DVBS2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) return DVBFE_ALGO_SEARCH_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) state->frequency = props->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) state->srate = props->symbol_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) state->search_mode = STV090x_SEARCH_AUTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488) state->algo = STV090x_COLD_SEARCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489) state->fec = STV090x_PRERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) if (state->srate > 10000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491) dprintk(FE_DEBUG, 1, "Search range: 10 MHz");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) state->search_range = 10000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) dprintk(FE_DEBUG, 1, "Search range: 5 MHz");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) state->search_range = 5000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498) stv090x_set_pls(state, props->scrambling_sequence_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499) stv090x_set_mis(state, props->stream_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) if (stv090x_algo(state) == STV090x_RANGEOK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) dprintk(FE_DEBUG, 1, "Search success!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503) return DVBFE_ALGO_SEARCH_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) dprintk(FE_DEBUG, 1, "Search failed!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506) return DVBFE_ALGO_SEARCH_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509) return DVBFE_ALGO_SEARCH_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512) static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) u32 reg, dstatus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) u8 search_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518) *status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) dstatus = STV090x_READ_DEMOD(state, DSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521) if (STV090x_GETFIELD_Px(dstatus, CAR_LOCK_FIELD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) reg = STV090x_READ_DEMOD(state, DMDSTATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) switch (search_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) case 0: /* searching */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529) case 1: /* first PLH detected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531) dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) case 2: /* DVB-S2 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535) dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538) if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539) *status |= FE_HAS_VITERBI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) reg = STV090x_READ_DEMOD(state, TSSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) *status |= FE_HAS_SYNC | FE_HAS_LOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) case 3: /* DVB-S1/legacy mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550) reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551) if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) *status |= FE_HAS_VITERBI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) reg = STV090x_READ_DEMOD(state, TSSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555) *status |= FE_HAS_SYNC | FE_HAS_LOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) s32 count_4, count_3, count_2, count_1, count_0, count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) u32 reg, h, m, l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570) enum fe_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572) stv090x_read_status(fe, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573) if (!(status & FE_HAS_LOCK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574) *per = 1 << 23; /* Max PER */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576) /* Counter 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) reg = STV090x_READ_DEMOD(state, ERRCNT22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578) h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) reg = STV090x_READ_DEMOD(state, ERRCNT21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581) m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) reg = STV090x_READ_DEMOD(state, ERRCNT20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584) l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586) *per = ((h << 16) | (m << 8) | l);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590) count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594) if ((!count_4) && (!count_3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) count = (count_2 & 0xff) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) count |= (count_1 & 0xff) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) count |= count_0 & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) count = 1 << 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) if (count == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602) *per = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606) if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617) int res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) int min = 0, med;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) if ((val >= tab[min].read && val < tab[max].read) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) (val >= tab[max].read && val < tab[min].read)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622) while ((max - min) > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) med = (max + min) / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) if ((val >= tab[min].read && val < tab[med].read) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) (val >= tab[med].read && val < tab[min].read))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626) max = med;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) min = med;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) res = ((val - tab[min].read) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631) (tab[max].real - tab[min].real) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) (tab[max].read - tab[min].read)) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633) tab[min].real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635) if (tab[min].read < tab[max].read) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) if (val < tab[min].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637) res = tab[min].real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) else if (val >= tab[max].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639) res = tab[max].real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) if (val >= tab[min].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) res = tab[min].real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) else if (val < tab[max].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) res = tab[max].real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651) static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) s32 agc_0, agc_1, agc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656) s32 str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658) reg = STV090x_READ_DEMOD(state, AGCIQIN1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) agc_1 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) reg = STV090x_READ_DEMOD(state, AGCIQIN0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) agc_0 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) agc = MAKEWORD16(agc_1, agc_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664) str = stv090x_table_lookup(stv090x_rf_tab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) if (agc > stv090x_rf_tab[0].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667) str = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668) else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) str = -100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670) *strength = (str + 100) * 0xFFFF / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675) static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) u32 reg_0, reg_1, reg, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679) s32 val_0, val_1, val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680) u8 lock_f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) s32 div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682) u32 last;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) switch (state->delsys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) case STV090x_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686) reg = STV090x_READ_DEMOD(state, DSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687) lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688) if (lock_f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690) for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691) reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692) val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693) reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694) val_0 = STV090x_GETFIELD_Px(reg_0, NOSPLHT_NORMED_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695) val += MAKEWORD16(val_1, val_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698) val /= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699) last = ARRAY_SIZE(stv090x_s2cn_tab) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700) div = stv090x_s2cn_tab[last].real -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) stv090x_s2cn_tab[3].real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702) val = stv090x_table_lookup(stv090x_s2cn_tab, last, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) *cnr = val * 0xFFFF / div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) case STV090x_DVBS1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710) case STV090x_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711) reg = STV090x_READ_DEMOD(state, DSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712) lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713) if (lock_f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715) for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717) val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718) reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) val_0 = STV090x_GETFIELD_Px(reg_0, NOSDATAT_UNNORMED_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720) val += MAKEWORD16(val_1, val_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723) val /= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) last = ARRAY_SIZE(stv090x_s1cn_tab) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725) div = stv090x_s1cn_tab[last].real -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726) stv090x_s1cn_tab[0].real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) val = stv090x_table_lookup(stv090x_s1cn_tab, last, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) *cnr = val * 0xFFFF / div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) static int stv090x_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743) reg = STV090x_READ_DEMOD(state, DISTXCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744) switch (tone) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745) case SEC_TONE_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747) STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750) STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755) case SEC_TONE_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756) STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772) static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774) return DVBFE_ALGO_CUSTOM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777) static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780) u32 reg, idle = 0, fifo_full = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783) reg = STV090x_READ_DEMOD(state, DISTXCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786) (state->config->diseqc_envelope_mode) ? 4 : 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790) STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794) STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798) for (i = 0; i < cmd->msg_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) while (fifo_full) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801) reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) reg = STV090x_READ_DEMOD(state, DISTXCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809) STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815) while ((!idle) && (i < 10)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817) idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828) static int stv090x_send_diseqc_burst(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829) enum fe_sec_mini_cmd burst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) u32 reg, idle = 0, fifo_full = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833) u8 mode, value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836) reg = STV090x_READ_DEMOD(state, DISTXCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) if (burst == SEC_MINI_A) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839) mode = (state->config->diseqc_envelope_mode) ? 5 : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840) value = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) mode = (state->config->diseqc_envelope_mode) ? 4 : 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843) value = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847) STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850) STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854) STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858) while (fifo_full) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859) reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) reg = STV090x_READ_DEMOD(state, DISTXCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867) STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3868) if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3869) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3871) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3873) while ((!idle) && (i < 10)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3874) reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3875) idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3876) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3877) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3880) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3881) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3882) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3883) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3884) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3886) static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3888) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3889) u32 reg = 0, i = 0, rx_end = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3891) while ((rx_end != 1) && (i < 10)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3892) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3893) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3894) reg = STV090x_READ_DEMOD(state, DISRX_ST0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3895) rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3898) if (rx_end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3899) reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3900) for (i = 0; i < reply->msg_len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3901) reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3902) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3904) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3907) static int stv090x_sleep(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3908) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3909) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3910) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3911) u8 full_standby = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3913) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3914) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3916) if (state->config->tuner_sleep) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3917) if (state->config->tuner_sleep(fe) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3918) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3921) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3922) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3924) dprintk(FE_DEBUG, 1, "Set %s(%d) to sleep",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3925) state->device == STV0900 ? "STV0900" : "STV0903",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3926) state->demod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3928) mutex_lock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3930) switch (state->demod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3931) case STV090x_DEMODULATOR_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3932) /* power off ADC 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3933) reg = stv090x_read_reg(state, STV090x_TSTTNR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3934) STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3935) if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3936) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3937) /* power off DiSEqC 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3938) reg = stv090x_read_reg(state, STV090x_TSTTNR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3939) STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3940) if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3941) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3943) /* check whether path 2 is already sleeping, that is when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3944) ADC2 is off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3945) reg = stv090x_read_reg(state, STV090x_TSTTNR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3946) if (STV090x_GETFIELD(reg, ADC2_PON_FIELD) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3947) full_standby = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3949) /* stop clocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3950) reg = stv090x_read_reg(state, STV090x_STOPCLK1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3951) /* packet delineator 1 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3952) STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3953) /* ADC 1 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3954) STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3955) /* FEC clock is shared between the two paths, only stop it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3956) when full standby is possible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3957) if (full_standby)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3958) STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3959) if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3960) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3961) reg = stv090x_read_reg(state, STV090x_STOPCLK2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3962) /* sampling 1 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3963) STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3964) /* viterbi 1 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3965) STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3966) /* TS clock is shared between the two paths, only stop it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3967) when full standby is possible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3968) if (full_standby)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3969) STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3970) if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3971) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3972) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3974) case STV090x_DEMODULATOR_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3975) /* power off ADC 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3976) reg = stv090x_read_reg(state, STV090x_TSTTNR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3977) STV090x_SETFIELD(reg, ADC2_PON_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3978) if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3979) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3980) /* power off DiSEqC 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3981) reg = stv090x_read_reg(state, STV090x_TSTTNR4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3982) STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3983) if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3984) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3986) /* check whether path 1 is already sleeping, that is when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3987) ADC1 is off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3988) reg = stv090x_read_reg(state, STV090x_TSTTNR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3989) if (STV090x_GETFIELD(reg, ADC1_PON_FIELD) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3990) full_standby = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3992) /* stop clocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3993) reg = stv090x_read_reg(state, STV090x_STOPCLK1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3994) /* packet delineator 2 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3995) STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3996) /* ADC 2 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3997) STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3998) /* FEC clock is shared between the two paths, only stop it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3999) when full standby is possible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4000) if (full_standby)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4001) STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4002) if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4003) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4004) reg = stv090x_read_reg(state, STV090x_STOPCLK2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4005) /* sampling 2 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4006) STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4007) /* viterbi 2 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4008) STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4009) /* TS clock is shared between the two paths, only stop it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4010) when full standby is possible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4011) if (full_standby)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4012) STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4013) if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4014) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4015) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4017) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4018) dprintk(FE_ERROR, 1, "Wrong demodulator!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4019) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4020) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4022) if (full_standby) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4023) /* general power off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4024) reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4025) STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4026) if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4027) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4030) mutex_unlock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4031) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4033) err_gateoff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4034) stv090x_i2c_gate_ctrl(state, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4035) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4036) err_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4037) mutex_unlock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4038) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4039) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4040) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4041) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4043) static int stv090x_wakeup(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4044) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4045) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4046) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4048) dprintk(FE_DEBUG, 1, "Wake %s(%d) from standby",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4049) state->device == STV0900 ? "STV0900" : "STV0903",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4050) state->demod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4052) mutex_lock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4054) /* general power on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4055) reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4056) STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4057) if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4058) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4060) switch (state->demod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4061) case STV090x_DEMODULATOR_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4062) /* power on ADC 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4063) reg = stv090x_read_reg(state, STV090x_TSTTNR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4064) STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4065) if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4066) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4067) /* power on DiSEqC 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4068) reg = stv090x_read_reg(state, STV090x_TSTTNR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4069) STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4070) if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4071) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4073) /* activate clocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4074) reg = stv090x_read_reg(state, STV090x_STOPCLK1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4075) /* packet delineator 1 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4076) STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4077) /* ADC 1 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4078) STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4079) /* FEC clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4080) STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4081) if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4082) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4083) reg = stv090x_read_reg(state, STV090x_STOPCLK2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4084) /* sampling 1 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4085) STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4086) /* viterbi 1 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4087) STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4088) /* TS clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4089) STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4090) if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4091) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4092) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4094) case STV090x_DEMODULATOR_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4095) /* power on ADC 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4096) reg = stv090x_read_reg(state, STV090x_TSTTNR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4097) STV090x_SETFIELD(reg, ADC2_PON_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4098) if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4099) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4100) /* power on DiSEqC 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4101) reg = stv090x_read_reg(state, STV090x_TSTTNR4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4102) STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4103) if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4104) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4106) /* activate clocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4107) reg = stv090x_read_reg(state, STV090x_STOPCLK1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4108) /* packet delineator 2 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4109) STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4110) /* ADC 2 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4111) STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4112) /* FEC clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4113) STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4114) if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4115) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4116) reg = stv090x_read_reg(state, STV090x_STOPCLK2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4117) /* sampling 2 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4118) STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4119) /* viterbi 2 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4120) STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4121) /* TS clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4122) STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4123) if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4124) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4125) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4127) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4128) dprintk(FE_ERROR, 1, "Wrong demodulator!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4129) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4132) mutex_unlock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4133) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4134) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4135) mutex_unlock(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4136) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4137) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4140) static void stv090x_release(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4142) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4144) state->internal->num_used--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4145) if (state->internal->num_used <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4147) dprintk(FE_ERROR, 1, "Actually removing");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4149) remove_dev(state->internal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4150) kfree(state->internal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4153) kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4156) static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4158) u32 reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4160) reg = stv090x_read_reg(state, STV090x_GENCFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4162) switch (ldpc_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4163) case STV090x_DUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4164) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4165) if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4166) /* set LDPC to dual mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4167) if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4168) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4170) state->demod_mode = STV090x_DUAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4172) reg = stv090x_read_reg(state, STV090x_TSTRES0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4173) STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4174) if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4175) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4176) STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4177) if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4178) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4180) if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4181) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4182) if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4183) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4184) if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4185) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4186) if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4187) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4188) if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4189) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4190) if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4191) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4192) if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4193) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4195) if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4196) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4197) if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4198) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4199) if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4200) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4201) if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4202) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4203) if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4204) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4205) if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4206) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4207) if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4208) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4210) if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4211) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4212) if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4213) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4215) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4217) case STV090x_SINGLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4218) if (stv090x_stop_modcod(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4219) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4220) if (stv090x_activate_modcod_single(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4221) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4223) if (state->demod == STV090x_DEMODULATOR_1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4224) if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4225) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4226) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4227) if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4228) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4231) reg = stv090x_read_reg(state, STV090x_TSTRES0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4232) STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4233) if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4234) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4235) STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4236) if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4237) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4239) reg = STV090x_READ_DEMOD(state, PDELCTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4240) STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4241) if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4242) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4243) STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4244) if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4245) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4246) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4249) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4250) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4251) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4252) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4255) /* return (Hz), clk in Hz*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4256) static u32 stv090x_get_mclk(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4258) const struct stv090x_config *config = state->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4259) u32 div, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4260) u8 ratio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4262) div = stv090x_read_reg(state, STV090x_NCOARSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4263) reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4264) ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4266) return (div + 1) * config->xtal / ratio; /* kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4269) static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4271) const struct stv090x_config *config = state->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4272) u32 reg, div, clk_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4274) reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4275) clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4277) div = ((clk_sel * mclk) / config->xtal) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4279) reg = stv090x_read_reg(state, STV090x_NCOARSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4280) STV090x_SETFIELD(reg, M_DIV_FIELD, div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4281) if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4282) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4284) state->internal->mclk = stv090x_get_mclk(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4286) /*Set the DiseqC frequency to 22KHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4287) div = state->internal->mclk / 704000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4288) if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4289) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4290) if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4291) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4293) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4294) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4295) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4296) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4299) static int stv0900_set_tspath(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4301) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4303) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4304) switch (state->config->ts1_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4305) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4306) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4307) switch (state->config->ts2_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4308) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4309) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4310) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4311) stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4312) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4314) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4315) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4316) if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4317) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4318) reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4319) STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4320) if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4321) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4322) reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4323) STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4324) if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4325) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4326) if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4327) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4328) if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4329) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4330) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4332) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4334) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4335) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4336) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4337) switch (state->config->ts2_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4338) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4339) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4340) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4341) if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4342) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4343) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4345) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4346) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4347) if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4348) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4349) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4351) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4353) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4354) switch (state->config->ts1_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4355) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4356) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4357) switch (state->config->ts2_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4358) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4359) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4360) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4361) stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4362) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4364) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4365) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4366) stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4367) reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4368) STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4369) if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4370) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4371) reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4372) STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4373) if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4374) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4375) if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4376) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4377) if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4378) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4379) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4381) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4383) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4384) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4385) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4386) switch (state->config->ts2_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4387) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4388) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4389) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4390) stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4391) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4393) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4394) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4395) stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4396) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4398) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4402) switch (state->config->ts1_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4403) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4404) reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4405) STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4406) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4407) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4408) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4409) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4410) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4412) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4413) reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4414) STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4415) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4416) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4417) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4418) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4419) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4421) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4422) reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4423) STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4424) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4425) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4426) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4427) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4428) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4430) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4431) reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4432) STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4433) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4434) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4435) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4436) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4437) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4439) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4440) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4443) switch (state->config->ts2_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4444) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4445) reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4446) STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4447) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4448) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4449) if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4450) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4451) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4453) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4454) reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4455) STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4456) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4457) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4458) if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4459) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4460) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4462) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4463) reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4464) STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4465) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4466) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4467) if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4468) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4469) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4471) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4472) reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4473) STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4474) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4475) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4476) if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4477) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4478) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4480) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4481) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4484) if (state->config->ts1_clk > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4485) u32 speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4487) switch (state->config->ts1_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4488) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4489) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4490) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4491) speed = state->internal->mclk /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4492) (state->config->ts1_clk / 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4493) if (speed < 0x08)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4494) speed = 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4495) if (speed > 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4496) speed = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4497) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4498) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4499) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4500) speed = state->internal->mclk /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4501) (state->config->ts1_clk / 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4502) if (speed < 0x20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4503) speed = 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4504) if (speed > 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4505) speed = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4506) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4508) reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4509) STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4510) if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4511) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4512) if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4513) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4516) if (state->config->ts2_clk > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4517) u32 speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4519) switch (state->config->ts2_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4520) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4521) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4522) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4523) speed = state->internal->mclk /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4524) (state->config->ts2_clk / 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4525) if (speed < 0x08)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4526) speed = 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4527) if (speed > 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4528) speed = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4529) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4530) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4531) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4532) speed = state->internal->mclk /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4533) (state->config->ts2_clk / 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4534) if (speed < 0x20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4535) speed = 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4536) if (speed > 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4537) speed = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4538) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4540) reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4541) STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4542) if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4543) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4544) if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4545) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4548) reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4549) STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4550) if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4551) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4552) STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4553) if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4554) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4556) reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4557) STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4558) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4559) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4560) STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4561) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4562) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4564) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4565) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4566) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4567) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4570) static int stv0903_set_tspath(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4571) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4572) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4574) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4575) switch (state->config->ts1_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4576) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4577) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4578) stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4579) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4581) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4582) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4583) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4584) stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4585) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4587) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4588) switch (state->config->ts1_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4589) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4590) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4591) stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4592) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4594) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4595) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4596) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4597) stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4598) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4602) switch (state->config->ts1_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4603) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4604) reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4605) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4606) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4607) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4608) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4609) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4611) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4612) reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4613) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4614) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4615) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4616) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4617) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4619) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4620) reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4621) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4622) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4623) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4624) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4625) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4627) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4628) reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4629) STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4630) STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4631) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4632) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4633) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4635) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4636) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4639) if (state->config->ts1_clk > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4640) u32 speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4642) switch (state->config->ts1_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4643) case STV090x_TSMODE_PARALLEL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4644) case STV090x_TSMODE_DVBCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4645) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4646) speed = state->internal->mclk /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4647) (state->config->ts1_clk / 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4648) if (speed < 0x08)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4649) speed = 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4650) if (speed > 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4651) speed = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4652) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4653) case STV090x_TSMODE_SERIAL_PUNCTURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4654) case STV090x_TSMODE_SERIAL_CONTINUOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4655) speed = state->internal->mclk /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4656) (state->config->ts1_clk / 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4657) if (speed < 0x20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4658) speed = 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4659) if (speed > 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4660) speed = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4661) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4663) reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4664) STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4665) if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4666) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4667) if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4668) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4671) reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4672) STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4673) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4674) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4675) STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4676) if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4677) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4679) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4680) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4681) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4682) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4685) static int stv090x_init(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4686) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4687) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4688) const struct stv090x_config *config = state->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4689) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4691) if (state->internal->mclk == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4692) /* call tuner init to configure the tuner's clock output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4693) divider directly before setting up the master clock of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4694) the stv090x. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4695) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4696) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4698) if (config->tuner_init) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4699) if (config->tuner_init(fe) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4700) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4703) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4704) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4706) stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4707) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4708) if (stv090x_write_reg(state, STV090x_SYNTCTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4709) 0x20 | config->clk_mode) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4710) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4711) stv090x_get_mclk(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4714) if (stv090x_wakeup(fe) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4715) dprintk(FE_ERROR, 1, "Error waking device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4716) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4719) if (stv090x_ldpc_mode(state, state->demod_mode) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4720) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4722) reg = STV090x_READ_DEMOD(state, TNRCFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4723) STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4724) if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4725) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4726) reg = STV090x_READ_DEMOD(state, DEMOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4727) STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4728) if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4729) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4731) if (stv090x_i2c_gate_ctrl(state, 1) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4732) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4734) if (config->tuner_set_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4735) if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4736) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4739) if (config->tuner_init) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4740) if (config->tuner_init(fe) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4741) goto err_gateoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4744) if (stv090x_i2c_gate_ctrl(state, 0) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4745) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4747) if (state->device == STV0900) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4748) if (stv0900_set_tspath(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4749) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4750) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4751) if (stv0903_set_tspath(state) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4752) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4755) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4757) err_gateoff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4758) stv090x_i2c_gate_ctrl(state, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4759) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4760) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4761) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4764) static int stv090x_setup(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4765) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4766) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4767) const struct stv090x_config *config = state->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4768) const struct stv090x_reg *stv090x_initval = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4769) const struct stv090x_reg *stv090x_cut20_val = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4770) unsigned long t1_size = 0, t2_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4771) u32 reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4773) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4775) if (state->device == STV0900) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4776) dprintk(FE_DEBUG, 1, "Initializing STV0900");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4777) stv090x_initval = stv0900_initval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4778) t1_size = ARRAY_SIZE(stv0900_initval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4779) stv090x_cut20_val = stv0900_cut20_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4780) t2_size = ARRAY_SIZE(stv0900_cut20_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4781) } else if (state->device == STV0903) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4782) dprintk(FE_DEBUG, 1, "Initializing STV0903");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4783) stv090x_initval = stv0903_initval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4784) t1_size = ARRAY_SIZE(stv0903_initval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4785) stv090x_cut20_val = stv0903_cut20_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4786) t2_size = ARRAY_SIZE(stv0903_cut20_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4789) /* STV090x init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4791) /* Stop Demod */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4792) if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4793) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4794) if (state->device == STV0900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4795) if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4796) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4798) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4800) /* Set No Tuner Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4801) if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4802) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4803) if (state->device == STV0900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4804) if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4805) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4807) /* I2C repeater OFF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4808) STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4809) if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4810) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4811) if (state->device == STV0900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4812) if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4813) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4815) if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4816) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4817) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4818) if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4819) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4820) if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4821) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4822) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4824) /* write initval */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4825) dprintk(FE_DEBUG, 1, "Setting up initial values");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4826) for (i = 0; i < t1_size; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4827) if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4828) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4831) state->internal->dev_ver = stv090x_read_reg(state, STV090x_MID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4832) if (state->internal->dev_ver >= 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4833) if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4834) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4836) /* write cut20_val*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4837) dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4838) for (i = 0; i < t2_size; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4839) if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4840) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4843) } else if (state->internal->dev_ver < 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4844) dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4845) state->internal->dev_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4847) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4848) } else if (state->internal->dev_ver > 0x30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4849) /* we shouldn't bail out from here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4850) dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4851) state->internal->dev_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4854) /* ADC1 range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4855) reg = stv090x_read_reg(state, STV090x_TSTTNR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4856) STV090x_SETFIELD(reg, ADC1_INMODE_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4857) (config->adc1_range == STV090x_ADC_1Vpp) ? 0 : 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4858) if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4859) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4861) /* ADC2 range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4862) reg = stv090x_read_reg(state, STV090x_TSTTNR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4863) STV090x_SETFIELD(reg, ADC2_INMODE_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4864) (config->adc2_range == STV090x_ADC_1Vpp) ? 0 : 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4865) if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4866) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4868) if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4869) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4870) if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4871) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4873) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4874) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4875) dprintk(FE_ERROR, 1, "I/O error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4876) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4879) static int stv090x_set_gpio(struct dvb_frontend *fe, u8 gpio, u8 dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4880) u8 value, u8 xor_value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4881) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4882) struct stv090x_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4883) u8 reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4885) STV090x_SETFIELD(reg, GPIOx_OPD_FIELD, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4886) STV090x_SETFIELD(reg, GPIOx_CONFIG_FIELD, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4887) STV090x_SETFIELD(reg, GPIOx_XOR_FIELD, xor_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4889) return stv090x_write_reg(state, STV090x_GPIOxCFG(gpio), reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4890) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4892) static int stv090x_setup_compound(struct stv090x_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4893) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4894) struct stv090x_dev *temp_int;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4896) temp_int = find_dev(state->i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4897) state->config->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4899) if (temp_int && state->demod_mode == STV090x_DUAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4900) state->internal = temp_int->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4901) state->internal->num_used++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4902) dprintk(FE_INFO, 1, "Found Internal Structure!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4903) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4904) state->internal = kmalloc(sizeof(*state->internal), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4905) if (!state->internal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4906) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4907) temp_int = append_internal(state->internal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4908) if (!temp_int) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4909) kfree(state->internal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4910) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4911) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4912) state->internal->num_used = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4913) state->internal->mclk = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4914) state->internal->dev_ver = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4915) state->internal->i2c_adap = state->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4916) state->internal->i2c_addr = state->config->address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4917) dprintk(FE_INFO, 1, "Create New Internal Structure!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4919) mutex_init(&state->internal->demod_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4920) mutex_init(&state->internal->tuner_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4922) if (stv090x_setup(&state->frontend) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4923) dprintk(FE_ERROR, 1, "Error setting up device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4924) goto err_remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4926) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4928) if (state->internal->dev_ver >= 0x30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4929) state->frontend.ops.info.caps |= FE_CAN_MULTISTREAM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4931) /* workaround for stuck DiSEqC output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4932) if (state->config->diseqc_envelope_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4933) stv090x_send_diseqc_burst(&state->frontend, SEC_MINI_A);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4935) state->config->set_gpio = stv090x_set_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4937) dprintk(FE_ERROR, 1, "Probing %s demodulator(%d) Cut=0x%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4938) state->device == STV0900 ? "STV0900" : "STV0903",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4939) state->config->demod,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4940) state->internal->dev_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4942) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4944) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4945) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4946) err_remove:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4947) remove_dev(state->internal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4948) kfree(state->internal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4949) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4950) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4952) static const struct dvb_frontend_ops stv090x_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4953) .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4954) .info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4955) .name = "STV090x Multistandard",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4956) .frequency_min_hz = 950 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4957) .frequency_max_hz = 2150 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4958) .symbol_rate_min = 1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4959) .symbol_rate_max = 45000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4960) .caps = FE_CAN_INVERSION_AUTO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4961) FE_CAN_FEC_AUTO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4962) FE_CAN_QPSK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4963) FE_CAN_2G_MODULATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4964) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4966) .release = stv090x_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4967) .init = stv090x_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4969) .sleep = stv090x_sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4970) .get_frontend_algo = stv090x_frontend_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4972) .diseqc_send_master_cmd = stv090x_send_diseqc_msg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4973) .diseqc_send_burst = stv090x_send_diseqc_burst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4974) .diseqc_recv_slave_reply = stv090x_recv_slave_reply,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4975) .set_tone = stv090x_set_tone,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4977) .search = stv090x_search,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4978) .read_status = stv090x_read_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4979) .read_ber = stv090x_read_per,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4980) .read_signal_strength = stv090x_read_signal_strength,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4981) .read_snr = stv090x_read_cnr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4982) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4984) static struct dvb_frontend *stv090x_get_dvb_frontend(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4985) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4986) struct stv090x_state *state = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4988) dev_dbg(&client->dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4990) return &state->frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4991) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4993) static int stv090x_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4994) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4995) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4996) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4997) struct stv090x_config *config = client->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4999) struct stv090x_state *state = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5001) state = kzalloc(sizeof(*state), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5002) if (!state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5003) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5004) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5005) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5007) state->verbose = &verbose;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5008) state->config = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5009) state->i2c = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5010) state->frontend.ops = stv090x_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5011) state->frontend.demodulator_priv = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5012) state->demod = config->demod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5013) /* Single or Dual mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5014) state->demod_mode = config->demod_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5015) state->device = config->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5016) /* default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5017) state->rolloff = STV090x_RO_35;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5019) ret = stv090x_setup_compound(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5020) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5021) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5023) i2c_set_clientdata(client, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5025) /* setup callbacks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5026) config->get_dvb_frontend = stv090x_get_dvb_frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5028) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5030) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5031) kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5032) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5033) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5035) static int stv090x_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5036) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5037) struct stv090x_state *state = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5039) stv090x_release(&state->frontend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5040) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5041) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5043) struct dvb_frontend *stv090x_attach(struct stv090x_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5044) struct i2c_adapter *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5045) enum stv090x_demodulator demod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5046) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5047) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5048) struct stv090x_state *state = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5050) state = kzalloc(sizeof(*state), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5051) if (!state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5052) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5054) state->verbose = &verbose;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5055) state->config = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5056) state->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5057) state->frontend.ops = stv090x_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5058) state->frontend.demodulator_priv = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5059) state->demod = demod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5060) /* Single or Dual mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5061) state->demod_mode = config->demod_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5062) state->device = config->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5063) /* default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5064) state->rolloff = STV090x_RO_35;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5066) ret = stv090x_setup_compound(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5067) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5068) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5070) return &state->frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5072) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5073) kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5074) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5075) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5076) EXPORT_SYMBOL(stv090x_attach);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5078) static const struct i2c_device_id stv090x_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5079) {"stv090x", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5080) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5081) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5082) MODULE_DEVICE_TABLE(i2c, stv090x_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5084) static struct i2c_driver stv090x_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5085) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5086) .name = "stv090x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5087) .suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5088) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5089) .probe = stv090x_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5090) .remove = stv090x_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5091) .id_table = stv090x_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5092) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5094) module_i2c_driver(stv090x_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5096) MODULE_PARM_DESC(verbose, "Set Verbosity level");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5097) MODULE_AUTHOR("Manu Abraham");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5098) MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5099) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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