^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Driver for ST STV0288 demodulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Copyright (C) 2006 Georg Acher, BayCom GmbH, acher (at) baycom (dot) de
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) for Reel Multimedia
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Copyright (C) 2008 TurboSight.com, Bob Liu <bob@turbosight.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Removed stb6000 specific tuner code and revised some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) procedures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 2010-09-01 Josef Pavlik <josef@pavlik.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Fixed diseqc_msg, diseqc_burst and set_tone problems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/div64.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "stv0288.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct stv0288_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct i2c_adapter *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) const struct stv0288_config *config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct dvb_frontend frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u8 initialised:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u32 tuner_frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u32 symbol_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) enum fe_code_rate fec_inner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int errmode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define STATUS_BER 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define STATUS_UCBLOCKS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int debug_legacy_dish_switch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define dprintk(args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (debug) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) printk(KERN_DEBUG "stv0288: " args); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static int stv0288_writeregI(struct stv0288_state *state, u8 reg, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u8 buf[] = { reg, data };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct i2c_msg msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .buf = buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .len = 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) ret = i2c_transfer(state->i2c, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) dprintk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) __func__, reg, data, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return (ret != 1) ? -EREMOTEIO : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int stv0288_write(struct dvb_frontend *fe, const u8 buf[], int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (len != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return stv0288_writeregI(state, buf[0], buf[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static u8 stv0288_readreg(struct stv0288_state *state, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u8 b0[] = { reg };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u8 b1[] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .buf = b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .len = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .buf = b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .len = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) ret = i2c_transfer(state->i2c, msg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (ret != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) __func__, reg, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return b1[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int stv0288_set_symbolrate(struct dvb_frontend *fe, u32 srate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) unsigned int temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned char b[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if ((srate < 1000000) || (srate > 45000000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) stv0288_writeregI(state, 0x22, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) stv0288_writeregI(state, 0x23, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) stv0288_writeregI(state, 0x2b, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) stv0288_writeregI(state, 0x2c, 0xf7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) temp = (unsigned int)srate / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) temp = temp * 32768;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) temp = temp / 25;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) temp = temp / 125;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) b[0] = (unsigned char)((temp >> 12) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) b[1] = (unsigned char)((temp >> 4) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) b[2] = (unsigned char)((temp << 4) & 0xf0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) stv0288_writeregI(state, 0x28, 0x80); /* SFRH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) stv0288_writeregI(state, 0x29, 0); /* SFRM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) stv0288_writeregI(state, 0x2a, 0); /* SFRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) stv0288_writeregI(state, 0x28, b[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) stv0288_writeregI(state, 0x29, b[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) stv0288_writeregI(state, 0x2a, b[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) dprintk("stv0288: stv0288_set_symbolrate\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int stv0288_send_diseqc_msg(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct dvb_diseqc_master_cmd *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) dprintk("%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) stv0288_writeregI(state, 0x09, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) msleep(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) stv0288_writeregI(state, 0x05, 0x12);/* modulated mode, single shot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) for (i = 0; i < m->msg_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (stv0288_writeregI(state, 0x06, m->msg[i]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) msleep(m->msg_len*12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static int stv0288_send_diseqc_burst(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) enum fe_sec_mini_cmd burst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) dprintk("%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (stv0288_writeregI(state, 0x05, 0x03))/* burst mode, single shot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (stv0288_writeregI(state, 0x06, burst == SEC_MINI_A ? 0x00 : 0xff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) msleep(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (stv0288_writeregI(state, 0x05, 0x12))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static int stv0288_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) switch (tone) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) case SEC_TONE_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (stv0288_writeregI(state, 0x05, 0x10))/* cont carrier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) case SEC_TONE_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (stv0288_writeregI(state, 0x05, 0x12))/* burst mode off*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static u8 stv0288_inittab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 0x01, 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 0x02, 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 0x09, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 0x0a, 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 0x0b, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 0x0c, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 0x0d, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 0x0e, 0xd4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 0x0f, 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 0x11, 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 0x12, 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 0x13, 0x48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 0x14, 0x84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 0x15, 0x45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 0x16, 0xb7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 0x17, 0x9c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 0x18, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 0x19, 0xa6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 0x1a, 0x88,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 0x1b, 0x8f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 0x1c, 0xf0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 0x20, 0x0b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 0x21, 0x54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 0x22, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 0x23, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 0x2b, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 0x2c, 0xf7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 0x30, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 0x31, 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 0x32, 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 0x33, 0x0f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 0x34, 0x09,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 0x35, 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 0x36, 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 0x37, 0x2f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 0x38, 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 0x39, 0xbe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 0x3a, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 0x3b, 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 0x3c, 0x11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 0x3d, 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 0x40, 0x63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 0x41, 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 0x42, 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 0x43, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 0x44, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 0x45, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 0x46, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 0x47, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 0x4a, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 0x50, 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 0x51, 0x38,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 0x52, 0x21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 0x58, 0x54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 0x59, 0x86,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 0x5a, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 0x5b, 0x9b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 0x5c, 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 0x5d, 0x7f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 0x5e, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 0x5f, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 0x70, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 0x71, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 0x72, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 0x74, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 0x75, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 0x76, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 0x81, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 0x82, 0x3f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 0x83, 0x3f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 0x84, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 0x85, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 0x88, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 0x89, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 0x8a, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 0x8b, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 0x8c, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 0x90, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 0x91, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 0x92, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 0x93, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 0x94, 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 0x97, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 0xa0, 0x48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 0xa1, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 0xb0, 0xb8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 0xb1, 0x3a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 0xb2, 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 0xb3, 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 0xb4, 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 0xb5, 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 0xb6, 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 0xb7, 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 0xb8, 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 0xb9, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 0xf0, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 0xf1, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 0xf2, 0xc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 0x51, 0x36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 0x52, 0x09,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 0x53, 0x94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 0x54, 0x62,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 0x55, 0x29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 0x56, 0x64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 0x57, 0x2b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 0xff, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static int stv0288_set_voltage(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) enum fe_sec_voltage volt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) dprintk("%s: %s\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) volt == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) volt == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static int stv0288_init(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) dprintk("stv0288: init chip\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) stv0288_writeregI(state, 0x41, 0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /* we have default inittab */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (state->config->inittab == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) for (i = 0; !(stv0288_inittab[i] == 0xff &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) stv0288_inittab[i + 1] == 0xff); i += 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) stv0288_writeregI(state, stv0288_inittab[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) stv0288_inittab[i + 1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) for (i = 0; ; i += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) reg = state->config->inittab[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) val = state->config->inittab[i+1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (reg == 0xff && val == 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) stv0288_writeregI(state, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static int stv0288_read_status(struct dvb_frontend *fe, enum fe_status *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) u8 sync = stv0288_readreg(state, 0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (sync == 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) sync = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) dprintk("%s : FE_READ_STATUS : VSTATUS: 0x%02x\n", __func__, sync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) *status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (sync & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (sync & 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) *status |= FE_HAS_VITERBI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (sync & 0x08) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) *status |= FE_HAS_LOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) dprintk("stv0288 has locked\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static int stv0288_read_ber(struct dvb_frontend *fe, u32 *ber)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (state->errmode != STATUS_BER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) *ber = (stv0288_readreg(state, 0x26) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) stv0288_readreg(state, 0x27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) dprintk("stv0288_read_ber %d\n", *ber);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static int stv0288_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) s32 signal = 0xffff - ((stv0288_readreg(state, 0x10) << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) signal = signal * 5 / 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) *strength = (signal > 0xffff) ? 0xffff : (signal < 0) ? 0 : signal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) dprintk("stv0288_read_signal_strength %d\n", *strength);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static int stv0288_sleep(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) stv0288_writeregI(state, 0x41, 0x84);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) state->initialised = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static int stv0288_read_snr(struct dvb_frontend *fe, u16 *snr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) s32 xsnr = 0xffff - ((stv0288_readreg(state, 0x2d) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) | stv0288_readreg(state, 0x2e));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) xsnr = 3 * (xsnr - 0xa100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) *snr = (xsnr > 0xffff) ? 0xffff : (xsnr < 0) ? 0 : xsnr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) dprintk("stv0288_read_snr %d\n", *snr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static int stv0288_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (state->errmode != STATUS_BER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) *ucblocks = (stv0288_readreg(state, 0x26) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) stv0288_readreg(state, 0x27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) dprintk("stv0288_read_ber %d\n", *ucblocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static int stv0288_set_frontend(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) struct dtv_frontend_properties *c = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) char tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) unsigned char tda[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) u8 reg, time_out = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) dprintk("%s : FE_SET_FRONTEND\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (c->delivery_system != SYS_DVBS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) dprintk("%s: unsupported delivery system selected (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) __func__, c->delivery_system);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (state->config->set_ts_params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) state->config->set_ts_params(fe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) /* only frequency & symbol_rate are used for tuner*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (fe->ops.tuner_ops.set_params) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) fe->ops.tuner_ops.set_params(fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) fe->ops.i2c_gate_ctrl(fe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) stv0288_set_symbolrate(fe, c->symbol_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) /* Carrier lock control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) stv0288_writeregI(state, 0x15, 0xc5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) tda[2] = 0x0; /* CFRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) for (tm = -9; tm < 7;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) /* Viterbi status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) reg = stv0288_readreg(state, 0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (reg & 0x8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (reg & 0x80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) time_out++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if (time_out > 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) tda[2] += 40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (tda[2] < 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) tm++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) tm++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) tda[2] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) time_out = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) tda[1] = (unsigned char)tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) stv0288_writeregI(state, 0x2b, tda[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) stv0288_writeregI(state, 0x2c, tda[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) msleep(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) state->tuner_frequency = c->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) state->fec_inner = FEC_AUTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) state->symbol_rate = c->symbol_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) static int stv0288_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) stv0288_writeregI(state, 0x01, 0xb5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) stv0288_writeregI(state, 0x01, 0x35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) static void stv0288_release(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) struct stv0288_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static const struct dvb_frontend_ops stv0288_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) .delsys = { SYS_DVBS },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) .name = "ST STV0288 DVB-S",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .frequency_min_hz = 950 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .frequency_max_hz = 2150 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .frequency_stepsize_hz = 1 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .symbol_rate_min = 1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .symbol_rate_max = 45000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .symbol_rate_tolerance = 500, /* ppm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) FE_CAN_QPSK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) FE_CAN_FEC_AUTO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) .release = stv0288_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .init = stv0288_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) .sleep = stv0288_sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) .write = stv0288_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .i2c_gate_ctrl = stv0288_i2c_gate_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .read_status = stv0288_read_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .read_ber = stv0288_read_ber,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .read_signal_strength = stv0288_read_signal_strength,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .read_snr = stv0288_read_snr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .read_ucblocks = stv0288_read_ucblocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) .diseqc_send_master_cmd = stv0288_send_diseqc_msg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .diseqc_send_burst = stv0288_send_diseqc_burst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .set_tone = stv0288_set_tone,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .set_voltage = stv0288_set_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) .set_frontend = stv0288_set_frontend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) struct dvb_frontend *stv0288_attach(const struct stv0288_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) struct i2c_adapter *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) struct stv0288_state *state = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) /* allocate memory for the internal state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) state = kzalloc(sizeof(struct stv0288_state), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) if (state == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /* setup the state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) state->config = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) state->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) state->initialised = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) state->tuner_frequency = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) state->symbol_rate = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) state->fec_inner = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) state->errmode = STATUS_BER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) stv0288_writeregI(state, 0x41, 0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) msleep(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) id = stv0288_readreg(state, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) dprintk("stv0288 id %x\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) /* register 0x00 contains 0x11 for STV0288 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) if (id != 0x11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /* create dvb_frontend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) memcpy(&state->frontend.ops, &stv0288_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) sizeof(struct dvb_frontend_ops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) state->frontend.demodulator_priv = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) return &state->frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) EXPORT_SYMBOL(stv0288_attach);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) module_param(debug_legacy_dish_switch, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) MODULE_PARM_DESC(debug_legacy_dish_switch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) "Enable timing analysis for Dish Network legacy switches");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) module_param(debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) MODULE_DESCRIPTION("ST STV0288 DVB Demodulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) MODULE_AUTHOR("Georg Acher, Bob Liu, Igor liplianin");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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