^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) STB6100 Silicon Tuner
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Copyright (C) Manu Abraham (abraham.manu@gmail.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Copyright (C) ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "stb6100.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static unsigned int verbose;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) module_param(verbose, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* Max transfer size done by I2C transfer functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MAX_XFER_SIZE 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define FE_ERROR 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define FE_NOTICE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define FE_INFO 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define FE_DEBUG 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define dprintk(x, y, z, format, arg...) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) if (z) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) if ((x > FE_ERROR) && (x > y)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) printk(KERN_ERR "%s: " format "\n", __func__ , ##arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) else if ((x > FE_NOTICE) && (x > y)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) printk(KERN_NOTICE "%s: " format "\n", __func__ , ##arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) else if ((x > FE_INFO) && (x > y)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) printk(KERN_INFO "%s: " format "\n", __func__ , ##arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) else if ((x > FE_DEBUG) && (x > y)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) printk(KERN_DEBUG "%s: " format "\n", __func__ , ##arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) } else { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (x > y) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) printk(format, ##arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct stb6100_lkup {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u32 val_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u32 val_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static void stb6100_release(struct dvb_frontend *fe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static const struct stb6100_lkup lkup[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { 0, 950000, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { 950000, 1000000, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { 1000000, 1075000, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { 1075000, 1200000, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { 1200000, 1300000, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) { 1300000, 1370000, 0x02 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) { 1370000, 1470000, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { 1470000, 1530000, 0x05 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { 1530000, 1650000, 0x06 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { 1650000, 1800000, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) { 1800000, 1950000, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { 1950000, 2150000, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { 2150000, 9999999, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { 0, 0, 0x00 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* Register names for easy debugging. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static const char *stb6100_regnames[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) [STB6100_LD] = "LD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) [STB6100_VCO] = "VCO",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) [STB6100_NI] = "NI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) [STB6100_NF_LSB] = "NF",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) [STB6100_K] = "K",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) [STB6100_G] = "G",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) [STB6100_F] = "F",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) [STB6100_DLB] = "DLB",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) [STB6100_TEST1] = "TEST1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) [STB6100_FCCK] = "FCCK",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) [STB6100_LPEN] = "LPEN",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) [STB6100_TEST3] = "TEST3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Template for normalisation, i.e. setting unused or undocumented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * bits as required according to the documentation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct stb6100_regmask {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) u8 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u8 set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static const struct stb6100_regmask stb6100_template[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) [STB6100_LD] = { 0xff, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) [STB6100_VCO] = { 0xff, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) [STB6100_NI] = { 0xff, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) [STB6100_NF_LSB] = { 0xff, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) [STB6100_K] = { 0xc7, 0x38 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) [STB6100_G] = { 0xef, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) [STB6100_F] = { 0x1f, 0xc0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) [STB6100_DLB] = { 0x38, 0xc4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) [STB6100_TEST1] = { 0x00, 0x8f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) [STB6100_FCCK] = { 0x40, 0x0d },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) [STB6100_LPEN] = { 0xf0, 0x0b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) [STB6100_TEST3] = { 0x00, 0xde },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Currently unused. Some boards might need it in the future
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static inline void stb6100_normalise_regs(u8 regs[])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) for (i = 0; i < STB6100_NUMREGS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) regs[i] = (regs[i] & stb6100_template[i].mask) | stb6100_template[i].set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static int stb6100_read_regs(struct stb6100_state *state, u8 regs[])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct i2c_msg msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .addr = state->config->tuner_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .buf = regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .len = STB6100_NUMREGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) rc = i2c_transfer(state->i2c, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (unlikely(rc != 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) dprintk(verbose, FE_ERROR, 1, "Read (0x%x) err, rc=[%d]",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) state->config->tuner_address, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (unlikely(verbose > FE_DEBUG)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dprintk(verbose, FE_DEBUG, 1, " Read from 0x%02x", state->config->tuner_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) for (i = 0; i < STB6100_NUMREGS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) dprintk(verbose, FE_DEBUG, 1, " %s: 0x%02x", stb6100_regnames[i], regs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static int stb6100_read_reg(struct stb6100_state *state, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) u8 regs[STB6100_NUMREGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct i2c_msg msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .addr = state->config->tuner_address + reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .buf = regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .len = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) i2c_transfer(state->i2c, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (unlikely(reg >= STB6100_NUMREGS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) dprintk(verbose, FE_ERROR, 1, "Invalid register offset 0x%x", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (unlikely(verbose > FE_DEBUG)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) dprintk(verbose, FE_DEBUG, 1, " Read from 0x%02x", state->config->tuner_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) dprintk(verbose, FE_DEBUG, 1, " %s: 0x%02x", stb6100_regnames[reg], regs[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return (unsigned int)regs[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static int stb6100_write_reg_range(struct stb6100_state *state, u8 buf[], int start, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) u8 cmdbuf[MAX_XFER_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct i2c_msg msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .addr = state->config->tuner_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .buf = cmdbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .len = len + 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (1 + len > sizeof(cmdbuf)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) printk(KERN_WARNING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) "%s: i2c wr: len=%d is too big!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) KBUILD_MODNAME, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (unlikely(start < 1 || start + len > STB6100_NUMREGS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) dprintk(verbose, FE_ERROR, 1, "Invalid register range %d:%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) start, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) memcpy(&cmdbuf[1], buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) cmdbuf[0] = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (unlikely(verbose > FE_DEBUG)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) dprintk(verbose, FE_DEBUG, 1, " Write @ 0x%02x: [%d:%d]", state->config->tuner_address, start, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) for (i = 0; i < len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) dprintk(verbose, FE_DEBUG, 1, " %s: 0x%02x", stb6100_regnames[start + i], buf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) rc = i2c_transfer(state->i2c, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) if (unlikely(rc != 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) dprintk(verbose, FE_ERROR, 1, "(0x%x) write err [%d:%d], rc=[%d]",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) (unsigned int)state->config->tuner_address, start, len, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static int stb6100_write_reg(struct stb6100_state *state, u8 reg, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u8 tmp = data; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (unlikely(reg >= STB6100_NUMREGS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) dprintk(verbose, FE_ERROR, 1, "Invalid register offset 0x%x", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) tmp = (tmp & stb6100_template[reg].mask) | stb6100_template[reg].set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return stb6100_write_reg_range(state, &tmp, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static int stb6100_get_status(struct dvb_frontend *fe, u32 *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) struct stb6100_state *state = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) rc = stb6100_read_reg(state, STB6100_LD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) dprintk(verbose, FE_ERROR, 1, "%s failed", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return (rc & STB6100_LD_LOCK) ? TUNER_STATUS_LOCKED : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int stb6100_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) u8 f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) u32 bw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct stb6100_state *state = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) rc = stb6100_read_reg(state, STB6100_F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) f = rc & STB6100_F_F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) bw = (f + 5) * 2000; /* x2 for ZIF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) *bandwidth = state->bandwidth = bw * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) dprintk(verbose, FE_DEBUG, 1, "bandwidth = %u Hz", state->bandwidth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int stb6100_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct stb6100_state *state = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) dprintk(verbose, FE_DEBUG, 1, "set bandwidth to %u Hz", bandwidth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) bandwidth /= 2; /* ZIF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (bandwidth >= 36000000) /* F[4:0] BW/2 max =31+5=36 mhz for F=31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) tmp = 31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) else if (bandwidth <= 5000000) /* bw/2 min = 5Mhz for F=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) else /* if 5 < bw/2 < 36 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) tmp = (bandwidth + 500000) / 1000000 - 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* Turn on LPF bandwidth setting clock control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * set bandwidth, wait 10ms, turn off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) rc = stb6100_write_reg(state, STB6100_FCCK, 0x0d | STB6100_FCCK_FCCK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) rc = stb6100_write_reg(state, STB6100_F, 0xc0 | tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) msleep(5); /* This is dangerous as another (related) thread may start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) rc = stb6100_write_reg(state, STB6100_FCCK, 0x0d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) msleep(10); /* This is dangerous as another (related) thread may start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static int stb6100_get_frequency(struct dvb_frontend *fe, u32 *frequency)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) u32 nint, nfrac, fvco;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) int psd2, odiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) struct stb6100_state *state = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) u8 regs[STB6100_NUMREGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) rc = stb6100_read_regs(state, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) odiv = (regs[STB6100_VCO] & STB6100_VCO_ODIV) >> STB6100_VCO_ODIV_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) psd2 = (regs[STB6100_K] & STB6100_K_PSD2) >> STB6100_K_PSD2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) nint = regs[STB6100_NI];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) nfrac = ((regs[STB6100_K] & STB6100_K_NF_MSB) << 8) | regs[STB6100_NF_LSB];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) fvco = (nfrac * state->reference >> (9 - psd2)) + (nint * state->reference << psd2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) *frequency = state->frequency = fvco >> (odiv + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) dprintk(verbose, FE_DEBUG, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) "frequency = %u kHz, odiv = %u, psd2 = %u, fxtal = %u kHz, fvco = %u kHz, N(I) = %u, N(F) = %u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) state->frequency, odiv, psd2, state->reference, fvco, nint, nfrac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) const struct stb6100_lkup *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) struct stb6100_state *state = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct dtv_frontend_properties *p = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) u32 srate = 0, fvco, nint, nfrac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) u8 regs[STB6100_NUMREGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) u8 g, psd2, odiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) dprintk(verbose, FE_DEBUG, 1, "Version 2010-8-14 13:51");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (fe->ops.get_frontend) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) dprintk(verbose, FE_DEBUG, 1, "Get frontend parameters");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) fe->ops.get_frontend(fe, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) srate = p->symbol_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* Set up tuner cleanly, LPF calibration on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) rc = stb6100_write_reg(state, STB6100_FCCK, 0x4d | STB6100_FCCK_FCCK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) return rc; /* allow LPF calibration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) /* PLL Loop disabled, bias on, VCO on, synth on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) regs[STB6100_LPEN] = 0xeb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) rc = stb6100_write_reg(state, STB6100_LPEN, regs[STB6100_LPEN]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /* Program the registers with their data values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* VCO divide ratio (LO divide ratio, VCO prescaler enable). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (frequency <= 1075000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) odiv = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) odiv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) /* VCO enabled, search clock off as per LL3.7, 3.4.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) regs[STB6100_VCO] = 0xe0 | (odiv << STB6100_VCO_ODIV_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /* OSM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) for (ptr = lkup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) (ptr->val_high != 0) && !CHKRANGE(frequency, ptr->val_low, ptr->val_high);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) ptr++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) if (ptr->val_high == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) printk(KERN_ERR "%s: frequency out of range: %u kHz\n", __func__, frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) regs[STB6100_VCO] = (regs[STB6100_VCO] & ~STB6100_VCO_OSM) | ptr->reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) rc = stb6100_write_reg(state, STB6100_VCO, regs[STB6100_VCO]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if ((frequency > 1075000) && (frequency <= 1325000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) psd2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) psd2 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /* F(VCO) = F(LO) * (ODIV == 0 ? 2 : 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) fvco = frequency << (1 + odiv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /* N(I) = floor(f(VCO) / (f(XTAL) * (PSD2 ? 2 : 1))) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) nint = fvco / (state->reference << psd2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) /* N(F) = round(f(VCO) / f(XTAL) * (PSD2 ? 2 : 1) - N(I)) * 2 ^ 9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) nfrac = DIV_ROUND_CLOSEST((fvco - (nint * state->reference << psd2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) << (9 - psd2), state->reference);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) /* NI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) regs[STB6100_NI] = nint;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) rc = stb6100_write_reg(state, STB6100_NI, regs[STB6100_NI]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* NF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) regs[STB6100_NF_LSB] = nfrac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) rc = stb6100_write_reg(state, STB6100_NF_LSB, regs[STB6100_NF_LSB]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) /* K */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) regs[STB6100_K] = (0x38 & ~STB6100_K_PSD2) | (psd2 << STB6100_K_PSD2_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) regs[STB6100_K] = (regs[STB6100_K] & ~STB6100_K_NF_MSB) | ((nfrac >> 8) & STB6100_K_NF_MSB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) rc = stb6100_write_reg(state, STB6100_K, regs[STB6100_K]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) /* G Baseband gain. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (srate >= 15000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) g = 9; /* +4 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) else if (srate >= 5000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) g = 11; /* +8 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) g = 14; /* +14 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) regs[STB6100_G] = (0x10 & ~STB6100_G_G) | g;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) regs[STB6100_G] &= ~STB6100_G_GCT; /* mask GCT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) regs[STB6100_G] |= (1 << 5); /* 2Vp-p Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) rc = stb6100_write_reg(state, STB6100_G, regs[STB6100_G]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) /* F we don't write as it is set up in BW set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) /* DLB set DC servo loop BW to 160Hz (LLA 3.8 / 2.1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) regs[STB6100_DLB] = 0xcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) rc = stb6100_write_reg(state, STB6100_DLB, regs[STB6100_DLB]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) dprintk(verbose, FE_DEBUG, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) "frequency = %u, srate = %u, g = %u, odiv = %u, psd2 = %u, fxtal = %u, osm = %u, fvco = %u, N(I) = %u, N(F) = %u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) frequency, srate, (unsigned int)g, (unsigned int)odiv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) (unsigned int)psd2, state->reference,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) ptr->reg, fvco, nint, nfrac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /* Set up the test registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) regs[STB6100_TEST1] = 0x8f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) rc = stb6100_write_reg(state, STB6100_TEST1, regs[STB6100_TEST1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) regs[STB6100_TEST3] = 0xde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) rc = stb6100_write_reg(state, STB6100_TEST3, regs[STB6100_TEST3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) /* Bring up tuner according to LLA 3.7 3.4.1, step 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) regs[STB6100_LPEN] = 0xfb; /* PLL Loop enabled, bias on, VCO on, synth on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) rc = stb6100_write_reg(state, STB6100_LPEN, regs[STB6100_LPEN]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) msleep(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /* Bring up tuner according to LLA 3.7 3.4.1, step 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) regs[STB6100_VCO] &= ~STB6100_VCO_OCK; /* VCO fast search */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) rc = stb6100_write_reg(state, STB6100_VCO, regs[STB6100_VCO]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) msleep(10); /* This is dangerous as another (related) thread may start */ /* wait for LO to lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) regs[STB6100_VCO] &= ~STB6100_VCO_OSCH; /* vco search disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) regs[STB6100_VCO] |= STB6100_VCO_OCK; /* search clock off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) rc = stb6100_write_reg(state, STB6100_VCO, regs[STB6100_VCO]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) rc = stb6100_write_reg(state, STB6100_FCCK, 0x0d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return rc; /* Stop LPF calibration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) msleep(10); /* This is dangerous as another (related) thread may start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /* wait for stabilisation, (should not be necessary) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static int stb6100_sleep(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /* TODO: power down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) static int stb6100_init(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) struct stb6100_state *state = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) int refclk = 27000000; /* Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) * iqsense = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) * tunerstep = 125000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) state->bandwidth = 36000000; /* Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) state->reference = refclk / 1000; /* kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* Set default bandwidth. Modified, PN 13-May-10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static int stb6100_set_params(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct dtv_frontend_properties *c = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) if (c->frequency > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) stb6100_set_frequency(fe, c->frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (c->bandwidth_hz > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) stb6100_set_bandwidth(fe, c->bandwidth_hz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) static const struct dvb_tuner_ops stb6100_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .name = "STB6100 Silicon Tuner",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .frequency_min_hz = 950 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .frequency_max_hz = 2150 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .init = stb6100_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) .sleep = stb6100_sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .get_status = stb6100_get_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .set_params = stb6100_set_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .get_frequency = stb6100_get_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .get_bandwidth = stb6100_get_bandwidth,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .release = stb6100_release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) struct dvb_frontend *stb6100_attach(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) const struct stb6100_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) struct i2c_adapter *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) struct stb6100_state *state = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) state = kzalloc(sizeof (struct stb6100_state), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) if (!state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) state->config = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) state->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) state->frontend = fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) state->reference = config->refclock / 1000; /* kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) fe->tuner_priv = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) fe->ops.tuner_ops = stb6100_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) printk("%s: Attaching STB6100 \n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) return fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static void stb6100_release(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) struct stb6100_state *state = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) fe->tuner_priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) EXPORT_SYMBOL(stb6100_attach);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) MODULE_PARM_DESC(verbose, "Set Verbosity level");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) MODULE_AUTHOR("Manu Abraham");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) MODULE_DESCRIPTION("STB6100 Silicon tuner");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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