Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 	STB0899 Multistandard Frontend driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 	Copyright (C) Manu Abraham (abraham.manu@gmail.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 	Copyright (C) ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #ifndef __STB0899_PRIV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define __STB0899_PRIV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include "stb0899_drv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define FE_ERROR				0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define FE_NOTICE				1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define FE_INFO					2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define FE_DEBUG				3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define FE_DEBUGREG				4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define dprintk(x, y, z, format, arg...) do {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	if (z) {									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 		if	((*x > FE_ERROR) && (*x > y))					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 			printk(KERN_ERR "%s: " format "\n", __func__ , ##arg);		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		else if	((*x > FE_NOTICE) && (*x > y))					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 			printk(KERN_NOTICE "%s: " format "\n", __func__ , ##arg);	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 		else if ((*x > FE_INFO) && (*x > y))					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 			printk(KERN_INFO "%s: " format "\n", __func__ , ##arg);		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		else if ((*x > FE_DEBUG) && (*x > y))					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 			printk(KERN_DEBUG "%s: " format "\n", __func__ , ##arg);	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	} else {									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		if (*x > y)								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 			printk(format, ##arg);						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	}										\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) } while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define INRANGE(val, x, y)			(((x <= val) && (val <= y)) ||		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 						 ((y <= val) && (val <= x)) ? 1 : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define BYTE0					0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define BYTE1					8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define BYTE2					16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define BYTE3					24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define GETBYTE(x, y)				(((x) >> (y)) & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define MAKEWORD32(a, b, c, d)			(((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define MAKEWORD16(a, b)			(((a) << 8) | (b))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define LSB(x)					((x & 0xff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define MSB(y)					((y >> 8) & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define STB0899_GETFIELD(bitf, val)		((val >> STB0899_OFFST_##bitf) & ((1 << STB0899_WIDTH_##bitf) - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define STB0899_SETFIELD(mask, val, width, offset)      (mask & (~(((1 << width) - 1) <<	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 							 offset))) | ((val &			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 							 ((1 << width) - 1)) << offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define STB0899_SETFIELD_VAL(bitf, mask, val)	(mask = (mask & (~(((1 << STB0899_WIDTH_##bitf) - 1) <<\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 							 STB0899_OFFST_##bitf))) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 							 (val << STB0899_OFFST_##bitf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) enum stb0899_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	NOAGC1	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	AGC1OK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	NOTIMING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	ANALOGCARRIER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	TIMINGOK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	NOAGC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	AGC2OK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	NOCARRIER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	CARRIEROK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	NODATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	FALSELOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	DATAOK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	OUTOFRANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	RANGEOK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	DVBS2_DEMOD_LOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	DVBS2_DEMOD_NOLOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	DVBS2_FEC_LOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	DVBS2_FEC_NOLOCK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) enum stb0899_modcod {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	STB0899_DUMMY_PLF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	STB0899_QPSK_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	STB0899_QPSK_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	STB0899_QPSK_25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	STB0899_QPSK_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	STB0899_QPSK_35,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	STB0899_QPSK_23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	STB0899_QPSK_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	STB0899_QPSK_45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	STB0899_QPSK_56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	STB0899_QPSK_89,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	STB0899_QPSK_910,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	STB0899_8PSK_35,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	STB0899_8PSK_23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	STB0899_8PSK_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	STB0899_8PSK_56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	STB0899_8PSK_89,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	STB0899_8PSK_910,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	STB0899_16APSK_23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	STB0899_16APSK_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	STB0899_16APSK_45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	STB0899_16APSK_56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	STB0899_16APSK_89,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	STB0899_16APSK_910,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	STB0899_32APSK_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	STB0899_32APSK_45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	STB0899_32APSK_56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	STB0899_32APSK_89,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	STB0899_32APSK_910
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) enum stb0899_frame {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	STB0899_LONG_FRAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	STB0899_SHORT_FRAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) enum stb0899_alpha {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	RRC_20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	RRC_25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	RRC_35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct stb0899_tab {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	s32 real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	s32 read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) enum stb0899_fec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	STB0899_FEC_1_2			= 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	STB0899_FEC_2_3			= 18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	STB0899_FEC_3_4			= 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	STB0899_FEC_5_6			= 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	STB0899_FEC_6_7			= 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	STB0899_FEC_7_8			= 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct stb0899_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	u32	freq;					/* Frequency	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	u32	srate;					/* Symbol rate	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	enum fe_code_rate fecrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct stb0899_internal {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	u32			master_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	u32			freq;			/* Demod internal Frequency		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	u32			srate;			/* Demod internal Symbol rate		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	enum stb0899_fec	fecrate;		/* Demod internal FEC rate		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	s32			srch_range;		/* Demod internal Search Range		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	s32			sub_range;		/* Demod current sub range (Hz)		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	s32			tuner_step;		/* Tuner step (Hz)			*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	s32			tuner_offst;		/* Relative offset to carrier (Hz)	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	u32			tuner_bw;		/* Current bandwidth of the tuner (Hz)	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	s32			mclk;			/* Masterclock Divider factor (binary)	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	s32			rolloff;		/* Current RollOff of the filter (x100)	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	s16			derot_freq;		/* Current derotator frequency (Hz)	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	s16			derot_percent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	s16			direction;		/* Current derotator search direction	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	s16			derot_step;		/* Derotator step (binary value)	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	s16			t_derot;		/* Derotator time constant (ms)		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	s16			t_data;			/* Data recovery time constant (ms)	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	s16			sub_dir;		/* Direction of the next sub range	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	s16			t_agc1;			/* Agc1 time constant (ms)		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	s16			t_agc2;			/* Agc2 time constant (ms)		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	u32			lock;			/* Demod internal lock state		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	enum stb0899_status	status;			/* Demod internal status		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	/* DVB-S2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	s32			agc_gain;		/* RF AGC Gain				*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	s32			center_freq;		/* Nominal carrier frequency		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	s32			av_frame_coarse;	/* Coarse carrier freq search frames	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	s32			av_frame_fine;		/* Fine carrier freq search frames	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	s16			step_size;		/* Carrier frequency search step size	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	enum stb0899_alpha	rrc_alpha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	enum stb0899_inversion	inversion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	enum stb0899_modcod	modcod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	u8			pilots;			/* Pilots found				*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	enum stb0899_frame	frame_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	u8			v_status;		/* VSTATUS				*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	u8			err_ctrl;		/* ERRCTRLn				*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct stb0899_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	struct i2c_adapter		*i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	struct stb0899_config		*config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	struct dvb_frontend		frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	u32				*verbose;	/* Cached module verbosity level	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	struct stb0899_internal		internal;	/* Device internal parameters		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	/*	cached params from API	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	enum fe_delivery_system		delsys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	struct stb0899_params		params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	u32				rx_freq;	/* DiSEqC 2.0 receiver freq		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	struct mutex			search_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* stb0899.c		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) extern int stb0899_read_reg(struct stb0899_state *state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 			    unsigned int reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) extern u32 _stb0899_read_s2reg(struct stb0899_state *state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 			       u32 stb0899_i2cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			       u32 stb0899_base_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 			       u16 stb0899_reg_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) extern int stb0899_read_regs(struct stb0899_state *state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			     unsigned int reg, u8 *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 			     u32 count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) extern int stb0899_write_regs(struct stb0899_state *state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 			      unsigned int reg, u8 *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			      u32 count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) extern int stb0899_write_reg(struct stb0899_state *state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 			     unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 			     u8 data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) extern int stb0899_write_s2reg(struct stb0899_state *state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			       u32 stb0899_i2cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			       u32 stb0899_base_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			       u16 stb0899_reg_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			       u32 stb0899_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) extern int stb0899_i2c_gate_ctrl(struct dvb_frontend *fe, int enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define STB0899_READ_S2REG(DEVICE, REG)		(_stb0899_read_s2reg(state, DEVICE, STB0899_BASE_##REG, STB0899_OFF0_##REG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) //#define STB0899_WRITE_S2REG(DEVICE, REG, DATA)	(_stb0899_write_s2reg(state, DEVICE, STB0899_BASE_##REG, STB0899_OFF0_##REG, DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* stb0899_algo.c	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) extern enum stb0899_status stb0899_dvbs_algo(struct stb0899_state *state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) extern enum stb0899_status stb0899_dvbs2_algo(struct stb0899_state *state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) extern long stb0899_carr_width(struct stb0899_state *state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #endif //__STB0899_PRIV_H