^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) STB0899 Multistandard Frontend driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Copyright (C) Manu Abraham (abraham.manu@gmail.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Copyright (C) ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __STB0899_DRV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __STB0899_DRV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define STB0899_TSMODE_SERIAL 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define STB0899_CLKPOL_FALLING 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define STB0899_CLKNULL_PARITY 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define STB0899_SYNC_FORCED 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define STB0899_FECMODE_DSS 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct stb0899_s1_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u16 address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct stb0899_s2_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u16 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) enum stb0899_inversion {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) IQ_SWAP_OFF = +1, /* inversion affects the sign of e. g. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) IQ_SWAP_ON = -1, /* the derotator frequency register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define STB0899_GPIO00 0xf140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define STB0899_GPIO01 0xf141
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define STB0899_GPIO02 0xf142
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define STB0899_GPIO03 0xf143
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define STB0899_GPIO04 0xf144
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define STB0899_GPIO05 0xf145
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define STB0899_GPIO06 0xf146
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define STB0899_GPIO07 0xf147
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define STB0899_GPIO08 0xf148
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define STB0899_GPIO09 0xf149
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define STB0899_GPIO10 0xf14a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define STB0899_GPIO11 0xf14b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define STB0899_GPIO12 0xf14c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define STB0899_GPIO13 0xf14d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define STB0899_GPIO14 0xf14e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define STB0899_GPIO15 0xf14f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define STB0899_GPIO16 0xf150
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define STB0899_GPIO17 0xf151
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define STB0899_GPIO18 0xf152
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define STB0899_GPIO19 0xf153
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define STB0899_GPIO20 0xf154
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define STB0899_GPIOPULLUP 0x01 /* Output device is connected to Vdd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define STB0899_GPIOPULLDN 0x00 /* Output device is connected to Vss */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define STB0899_POSTPROC_GPIO_POWER 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define STB0899_POSTPROC_GPIO_LOCK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * Post process output configuration control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * 1. POWER ON/OFF (index 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * 2. FE_HAS_LOCK/LOCK_LOSS (index 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * @gpio = one of the above listed GPIO's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * @level = output state: pulled up or low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct stb0899_postproc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u16 gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u8 level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct stb0899_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) const struct stb0899_s1_reg *init_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) const struct stb0899_s2_reg *init_s2_demod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) const struct stb0899_s1_reg *init_s1_demod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) const struct stb0899_s2_reg *init_s2_fec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) const struct stb0899_s1_reg *init_tst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) const struct stb0899_postproc *postproc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) enum stb0899_inversion inversion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u32 xtal_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) u8 demod_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) u8 ts_output_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u8 block_sync_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u8 ts_pfbit_toggle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u8 clock_polarity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) u8 data_clk_parity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u8 fec_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u8 data_output_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u8 data_fifo_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u8 out_rate_comp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) u8 i2c_repeater;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) // int inversion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int lo_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int hi_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u32 esno_ave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u32 esno_quant;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u32 avframes_coarse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u32 avframes_fine;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u32 miss_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u32 uwp_threshold_acq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u32 uwp_threshold_track;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u32 uwp_threshold_sof;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u32 sof_search_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) u32 btr_nco_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u32 btr_gain_shift_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u32 crl_nco_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u32 ldpc_max_iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) int (*tuner_set_frequency)(struct dvb_frontend *fe, u32 frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) int (*tuner_get_frequency)(struct dvb_frontend *fe, u32 *frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int (*tuner_set_bandwidth)(struct dvb_frontend *fe, u32 bandwidth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int (*tuner_get_bandwidth)(struct dvb_frontend *fe, u32 *bandwidth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int (*tuner_set_rfsiggain)(struct dvb_frontend *fe, u32 rf_gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #if IS_REACHABLE(CONFIG_DVB_STB0899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) extern struct dvb_frontend *stb0899_attach(struct stb0899_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct i2c_adapter *i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static inline struct dvb_frontend *stb0899_attach(struct stb0899_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct i2c_adapter *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #endif //CONFIG_DVB_STB0899
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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