^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) STB0899 Multistandard Frontend driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Copyright (C) Manu Abraham (abraham.manu@gmail.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Copyright (C) ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/dvb/frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "stb0899_drv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "stb0899_priv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "stb0899_reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* Max transfer size done by I2C transfer functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MAX_XFER_SIZE 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static unsigned int verbose = 0;//1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) module_param(verbose, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* C/N in dB/10, NIRM/NIRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static const struct stb0899_tab stb0899_cn_tab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { 200, 2600 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) { 190, 2700 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) { 180, 2860 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) { 170, 3020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) { 160, 3210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) { 150, 3440 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) { 140, 3710 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) { 130, 4010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) { 120, 4360 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) { 110, 4740 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) { 100, 5190 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) { 90, 5670 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) { 80, 6200 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) { 70, 6770 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) { 60, 7360 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) { 50, 7970 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { 40, 8250 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { 30, 9000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) { 20, 9450 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) { 15, 9600 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* DVB-S AGCIQ_VALUE vs. signal level in dBm/10.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * As measured, connected to a modulator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * -8.0 to -50.0 dBm directly connected,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * -52.0 to -74.8 with extra attenuation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * Cut-off to AGCIQ_VALUE = 0x80 below -74.8dBm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * Crude linear extrapolation below -84.8dBm and above -8.0dBm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static const struct stb0899_tab stb0899_dvbsrf_tab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { -750, -128 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { -748, -94 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { -745, -92 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) { -735, -90 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { -720, -87 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { -670, -77 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { -640, -70 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { -610, -62 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) { -600, -60 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) { -590, -56 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { -560, -41 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { -540, -25 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) { -530, -17 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) { -520, -11 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) { -500, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) { -490, 6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) { -480, 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) { -440, 22 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) { -420, 27 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) { -400, 31 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) { -380, 34 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) { -340, 40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) { -320, 43 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) { -280, 48 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) { -250, 52 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) { -230, 55 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) { -180, 61 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) { -140, 66 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) { -90, 73 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) { -80, 74 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { 500, 127 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* DVB-S2 IF_AGC_GAIN vs. signal level in dBm/10.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * As measured, connected to a modulator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * -8.0 to -50.1 dBm directly connected,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * -53.0 to -76.6 with extra attenuation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * Cut-off to IF_AGC_GAIN = 0x3fff below -76.6dBm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * Crude linear extrapolation below -76.6dBm and above -8.0dBm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const struct stb0899_tab stb0899_dvbs2rf_tab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) { 700, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) { -80, 3217 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { -150, 3893 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) { -190, 4217 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) { -240, 4621 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) { -280, 4945 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) { -320, 5273 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) { -350, 5545 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) { -370, 5741 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) { -410, 6147 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) { -450, 6671 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) { -490, 7413 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) { -501, 7665 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) { -530, 8767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) { -560, 10219 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) { -580, 10939 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { -590, 11518 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) { -600, 11723 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) { -650, 12659 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) { -690, 13219 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { -730, 13645 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) { -750, 13909 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) { -766, 14153 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) { -950, 16383 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* DVB-S2 Es/N0 quant in dB/100 vs read value * 100*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static struct stb0899_tab stb0899_quant_tab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) { 0, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) { 0, 100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) { 600, 200 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) { 950, 299 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) { 1200, 398 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) { 1400, 501 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) { 1560, 603 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) { 1690, 700 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) { 1810, 804 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) { 1910, 902 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { 2000, 1000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) { 2080, 1096 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { 2160, 1202 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) { 2230, 1303 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { 2350, 1496 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) { 2410, 1603 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) { 2460, 1698 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) { 2510, 1799 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) { 2600, 1995 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) { 2650, 2113 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) { 2690, 2213 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) { 2720, 2291 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) { 2760, 2399 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) { 2800, 2512 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) { 2860, 2692 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) { 2930, 2917 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) { 2960, 3020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) { 3010, 3199 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) { 3040, 3311 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) { 3060, 3388 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) { 3120, 3631 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) { 3190, 3936 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) { 3400, 5012 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) { 3610, 6383 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) { 3800, 7943 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) { 4210, 12735 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) { 4500, 17783 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) { 4690, 22131 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) { 4810, 25410 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* DVB-S2 Es/N0 estimate in dB/100 vs read value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static struct stb0899_tab stb0899_est_tab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) { 0, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) { 0, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) { 301, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) { 1204, 16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) { 1806, 64 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) { 2408, 256 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) { 2709, 512 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) { 3010, 1023 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) { 3311, 2046 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) { 3612, 4093 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) { 3823, 6653 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) { 3913, 8185 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) { 4010, 10233 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) { 4107, 12794 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) { 4214, 16368 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) { 4266, 18450 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) { 4311, 20464 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) { 4353, 22542 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) { 4391, 24604 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) { 4425, 26607 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) { 4457, 28642 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) { 4487, 30690 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) { 4515, 32734 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) { 4612, 40926 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) { 4692, 49204 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) { 4816, 65464 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) { 4913, 81846 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) { 4993, 98401 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) { 5060, 114815 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) { 5118, 131220 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) { 5200, 158489 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) { 5300, 199526 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) { 5400, 251189 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) { 5500, 316228 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) { 5600, 398107 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) { 5720, 524807 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) { 5721, 526017 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static int _stb0899_read_reg(struct stb0899_state *state, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u8 b0[] = { reg >> 8, reg & 0xff };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) u8 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .buf = b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .len = 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) },{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .buf = &buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .len = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ret = i2c_transfer(state->i2c, msg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (ret != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (ret != -ERESTARTSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) dprintk(state->verbose, FE_ERROR, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) "Read error, Reg=[0x%02x], Status=%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) reg, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return ret < 0 ? ret : -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (unlikely(*state->verbose >= FE_DEBUGREG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) dprintk(state->verbose, FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) reg, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return (unsigned int)buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) int stb0899_read_reg(struct stb0899_state *state, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) result = _stb0899_read_reg(state, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * Bug ID 9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * access to 0xf2xx/0xf6xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * must be followed by read from 0xf2ff/0xf6ff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if ((reg != 0xf2ff) && (reg != 0xf6ff) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) (((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) _stb0899_read_reg(state, (reg | 0x00ff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) u32 _stb0899_read_s2reg(struct stb0899_state *state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) u32 stb0899_i2cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) u32 stb0899_base_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) u16 stb0899_reg_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u8 buf[7] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) u16 tmpaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) u8 buf_0[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) GETBYTE(stb0899_i2cdev, BYTE1), /* 0xf3 S2 Base Address (MSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) GETBYTE(stb0899_i2cdev, BYTE0), /* 0xfc S2 Base Address (LSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) GETBYTE(stb0899_base_addr, BYTE0), /* 0x00 Base Address (LSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) GETBYTE(stb0899_base_addr, BYTE1), /* 0x04 Base Address (LSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) GETBYTE(stb0899_base_addr, BYTE2), /* 0x00 Base Address (MSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) GETBYTE(stb0899_base_addr, BYTE3), /* 0x00 Base Address (MSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) u8 buf_1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 0x00, /* 0xf3 Reg Offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 0x00, /* 0x44 Reg Offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) struct i2c_msg msg_0 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .buf = buf_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .len = 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct i2c_msg msg_1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .buf = buf_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .len = 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) struct i2c_msg msg_r = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .buf = buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .len = 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) tmpaddr = stb0899_reg_offset & 0xff00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (!(stb0899_reg_offset & 0x8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) tmpaddr = stb0899_reg_offset | 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) buf_1[0] = GETBYTE(tmpaddr, BYTE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) buf_1[1] = GETBYTE(tmpaddr, BYTE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) status = i2c_transfer(state->i2c, &msg_0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (status < 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (status != -ERESTARTSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) printk(KERN_ERR "%s ERR(1), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /* Dummy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) status = i2c_transfer(state->i2c, &msg_1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (status < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) status = i2c_transfer(state->i2c, &msg_r, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (status < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) buf_1[0] = GETBYTE(stb0899_reg_offset, BYTE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) buf_1[1] = GETBYTE(stb0899_reg_offset, BYTE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /* Actual */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) status = i2c_transfer(state->i2c, &msg_1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (status < 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (status != -ERESTARTSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) printk(KERN_ERR "%s ERR(2), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) status = i2c_transfer(state->i2c, &msg_r, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) if (status < 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (status != -ERESTARTSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) printk(KERN_ERR "%s ERR(3), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) return status < 0 ? status : -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) data = MAKEWORD32(buf[3], buf[2], buf[1], buf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (unlikely(*state->verbose >= FE_DEBUGREG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) printk(KERN_DEBUG "%s Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Data=[0x%08x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return status < 0 ? status : -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) int stb0899_write_s2reg(struct stb0899_state *state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) u32 stb0899_i2cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) u32 stb0899_base_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) u16 stb0899_reg_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) u32 stb0899_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /* Base Address Setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) u8 buf_0[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) GETBYTE(stb0899_i2cdev, BYTE1), /* 0xf3 S2 Base Address (MSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) GETBYTE(stb0899_i2cdev, BYTE0), /* 0xfc S2 Base Address (LSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) GETBYTE(stb0899_base_addr, BYTE0), /* 0x00 Base Address (LSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) GETBYTE(stb0899_base_addr, BYTE1), /* 0x04 Base Address (LSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) GETBYTE(stb0899_base_addr, BYTE2), /* 0x00 Base Address (MSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) GETBYTE(stb0899_base_addr, BYTE3), /* 0x00 Base Address (MSB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) u8 buf_1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 0x00, /* 0xf3 Reg Offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 0x00, /* 0x44 Reg Offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 0x00, /* data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 0x00, /* data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 0x00, /* data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 0x00, /* data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) struct i2c_msg msg_0 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .buf = buf_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .len = 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) struct i2c_msg msg_1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .buf = buf_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .len = 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) buf_1[0] = GETBYTE(stb0899_reg_offset, BYTE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) buf_1[1] = GETBYTE(stb0899_reg_offset, BYTE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) buf_1[2] = GETBYTE(stb0899_data, BYTE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) buf_1[3] = GETBYTE(stb0899_data, BYTE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) buf_1[4] = GETBYTE(stb0899_data, BYTE2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) buf_1[5] = GETBYTE(stb0899_data, BYTE3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (unlikely(*state->verbose >= FE_DEBUGREG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) printk(KERN_DEBUG "%s Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) status = i2c_transfer(state->i2c, &msg_0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (unlikely(status < 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if (status != -ERESTARTSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) printk(KERN_ERR "%s ERR (1), Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x], status=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) status = i2c_transfer(state->i2c, &msg_1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (unlikely(status < 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (status != -ERESTARTSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) printk(KERN_ERR "%s ERR (2), Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x], status=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return status < 0 ? status : -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return status < 0 ? status : -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) int stb0899_read_regs(struct stb0899_state *state, unsigned int reg, u8 *buf, u32 count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) u8 b0[] = { reg >> 8, reg & 0xff };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .buf = b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .len = 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) },{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .buf = buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .len = count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) status = i2c_transfer(state->i2c, msg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (status != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) if (status != -ERESTARTSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) printk(KERN_ERR "%s Read error, Reg=[0x%04x], Count=%u, Status=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) __func__, reg, count, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) * Bug ID 9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) * access to 0xf2xx/0xf6xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * must be followed by read from 0xf2ff/0xf6ff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if ((reg != 0xf2ff) && (reg != 0xf6ff) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) (((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) _stb0899_read_reg(state, (reg | 0x00ff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) dprintk(state->verbose, FE_DEBUGREG, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) "%s [0x%04x]: %*ph", __func__, reg, count, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return status < 0 ? status : -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) int stb0899_write_regs(struct stb0899_state *state, unsigned int reg, u8 *data, u32 count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) u8 buf[MAX_XFER_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) struct i2c_msg i2c_msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .addr = state->config->demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .buf = buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .len = 2 + count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (2 + count > sizeof(buf)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) printk(KERN_WARNING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) "%s: i2c wr reg=%04x: len=%d is too big!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) KBUILD_MODNAME, reg, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) buf[0] = reg >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) buf[1] = reg & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) memcpy(&buf[2], data, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) dprintk(state->verbose, FE_DEBUGREG, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) "%s [0x%04x]: %*ph", __func__, reg, count, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) ret = i2c_transfer(state->i2c, &i2c_msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) * Bug ID 9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) * access to 0xf2xx/0xf6xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) * must be followed by read from 0xf2ff/0xf6ff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if ((((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) stb0899_read_reg(state, (reg | 0x00ff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if (ret != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (ret != -ERESTARTSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) dprintk(state->verbose, FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) reg, data[0], count, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) return ret < 0 ? ret : -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) int stb0899_write_reg(struct stb0899_state *state, unsigned int reg, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) u8 tmp = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return stb0899_write_regs(state, reg, &tmp, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) * stb0899_get_mclk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * Get STB0899 master clock frequency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) * ExtClk: external clock frequency (Hz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static u32 stb0899_get_mclk(struct stb0899_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) u32 mclk = 0, div = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) div = stb0899_read_reg(state, STB0899_NCOARSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) mclk = (div + 1) * state->config->xtal_freq / 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) dprintk(state->verbose, FE_DEBUG, 1, "div=%d, mclk=%d", div, mclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) return mclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) * stb0899_set_mclk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) * Set STB0899 master Clock frequency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) * Mclk: demodulator master clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) * ExtClk: external clock frequency (Hz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) static void stb0899_set_mclk(struct stb0899_state *state, u32 Mclk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) struct stb0899_internal *internal = &state->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) u8 mdiv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) dprintk(state->verbose, FE_DEBUG, 1, "state->config=%p", state->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) mdiv = ((6 * Mclk) / state->config->xtal_freq) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) dprintk(state->verbose, FE_DEBUG, 1, "mdiv=%d", mdiv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) stb0899_write_reg(state, STB0899_NCOARSE, mdiv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) internal->master_clk = stb0899_get_mclk(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) dprintk(state->verbose, FE_DEBUG, 1, "MasterCLOCK=%d", internal->master_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static int stb0899_postproc(struct stb0899_state *state, u8 ctl, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) struct stb0899_config *config = state->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) const struct stb0899_postproc *postproc = config->postproc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) /* post process event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (postproc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (postproc[ctl].level == STB0899_GPIOPULLUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) stb0899_write_reg(state, postproc[ctl].gpio, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) stb0899_write_reg(state, postproc[ctl].gpio, 0x82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (postproc[ctl].level == STB0899_GPIOPULLUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) stb0899_write_reg(state, postproc[ctl].gpio, 0x82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) stb0899_write_reg(state, postproc[ctl].gpio, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static void stb0899_detach(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) /* post process event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) static void stb0899_release(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) dprintk(state->verbose, FE_DEBUG, 1, "Release Frontend");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) * stb0899_get_alpha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) * return: rolloff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) static int stb0899_get_alpha(struct stb0899_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) u8 mode_coeff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) mode_coeff = stb0899_read_reg(state, STB0899_DEMOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) if (STB0899_GETFIELD(MODECOEFF, mode_coeff) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) return 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) return 35;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * stb0899_init_calc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static void stb0899_init_calc(struct stb0899_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) struct stb0899_internal *internal = &state->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) int master_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) u8 agc[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) /* Read registers (in burst mode) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) stb0899_read_regs(state, STB0899_AGC1REF, agc, 2); /* AGC1R and AGC2O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) /* Initial calculations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) master_clk = stb0899_get_mclk(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) internal->t_agc1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) internal->t_agc2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) internal->master_clk = master_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) internal->mclk = master_clk / 65536L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) internal->rolloff = stb0899_get_alpha(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) /* DVBS2 Initial calculations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) /* Set AGC value to the middle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) internal->agc_gain = 8154;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) reg = STB0899_READ_S2REG(STB0899_S2DEMOD, IF_AGC_CNTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) STB0899_SETFIELD_VAL(IF_GAIN_INIT, reg, internal->agc_gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) stb0899_write_s2reg(state, STB0899_S2DEMOD, STB0899_BASE_IF_AGC_CNTRL, STB0899_OFF0_IF_AGC_CNTRL, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) reg = STB0899_READ_S2REG(STB0899_S2DEMOD, RRC_ALPHA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) internal->rrc_alpha = STB0899_GETFIELD(RRC_ALPHA, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) internal->center_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) internal->av_frame_coarse = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) internal->av_frame_fine = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) internal->step_size = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if ((pParams->SpectralInv == FE_IQ_NORMAL) || (pParams->SpectralInv == FE_IQ_AUTO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) pParams->IQLocked = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) pParams->IQLocked = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) static int stb0899_wait_diseqc_fifo_empty(struct stb0899_state *state, int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) u8 reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) unsigned long start = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) reg = stb0899_read_reg(state, STB0899_DISSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) if (!STB0899_GETFIELD(FIFOFULL, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) if (time_after(jiffies, start + timeout)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) dprintk(state->verbose, FE_ERROR, 1, "timed out !!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) static int stb0899_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) u8 reg, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (cmd->msg_len > sizeof(cmd->msg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) /* enable FIFO precharge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) for (i = 0; i < cmd->msg_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) /* wait for FIFO empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) if (stb0899_wait_diseqc_fifo_empty(state, 100) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) stb0899_write_reg(state, STB0899_DISFIFO, cmd->msg[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) static int stb0899_wait_diseqc_rxidle(struct stb0899_state *state, int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) u8 reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) unsigned long start = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) while (!STB0899_GETFIELD(RXEND, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) reg = stb0899_read_reg(state, STB0899_DISRX_ST0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) if (time_after(jiffies, start + timeout)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) dprintk(state->verbose, FE_ERROR, 1, "timed out!!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) static int stb0899_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) u8 reg, length = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) if (stb0899_wait_diseqc_rxidle(state, 100) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) reg = stb0899_read_reg(state, STB0899_DISRX_ST0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) if (STB0899_GETFIELD(RXEND, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) reg = stb0899_read_reg(state, STB0899_DISRX_ST1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) length = STB0899_GETFIELD(FIFOBYTENBR, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) if (length > sizeof (reply->msg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) result = -EOVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) reply->msg_len = length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) /* extract data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) for (i = 0; i < length; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) reply->msg[i] = stb0899_read_reg(state, STB0899_DISFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) static int stb0899_wait_diseqc_txidle(struct stb0899_state *state, int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) u8 reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) unsigned long start = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) while (!STB0899_GETFIELD(TXIDLE, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) reg = stb0899_read_reg(state, STB0899_DISSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (time_after(jiffies, start + timeout)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) dprintk(state->verbose, FE_ERROR, 1, "timed out!!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) static int stb0899_send_diseqc_burst(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) enum fe_sec_mini_cmd burst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) u8 reg, old_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) /* wait for diseqc idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) if (stb0899_wait_diseqc_txidle(state, 100) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) old_state = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) /* set to burst mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) switch (burst) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) case SEC_MINI_A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) /* unmodulated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) stb0899_write_reg(state, STB0899_DISFIFO, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) case SEC_MINI_B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) /* modulated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) stb0899_write_reg(state, STB0899_DISFIFO, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) /* wait for diseqc idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (stb0899_wait_diseqc_txidle(state, 100) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) /* restore state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) stb0899_write_reg(state, STB0899_DISCNTRL1, old_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) static int stb0899_diseqc_init(struct stb0899_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) struct dvb_diseqc_slave_reply rx_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) u8 f22_tx, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) u32 mclk, tx_freq = 22000;/* count = 0, i; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) reg = stb0899_read_reg(state, STB0899_DISCNTRL2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) STB0899_SETFIELD_VAL(ONECHIP_TRX, reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) stb0899_write_reg(state, STB0899_DISCNTRL2, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) /* disable Tx spy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) STB0899_SETFIELD_VAL(DISEQCRESET, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) STB0899_SETFIELD_VAL(DISEQCRESET, reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) mclk = stb0899_get_mclk(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) f22_tx = mclk / (tx_freq * 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) stb0899_write_reg(state, STB0899_DISF22, f22_tx); /* DiSEqC Tx freq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) state->rx_freq = 20000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) static int stb0899_sleep(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) dprintk(state->verbose, FE_DEBUG, 1, "Going to Sleep .. (Really tired .. :-))");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) /* post process event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) static int stb0899_wakeup(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) if ((rc = stb0899_write_reg(state, STB0899_SYNTCTRL, STB0899_SELOSCI)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) /* Activate all clocks; DVB-S2 registers are inaccessible otherwise. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) if ((rc = stb0899_write_reg(state, STB0899_STOPCLK1, 0x00)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) if ((rc = stb0899_write_reg(state, STB0899_STOPCLK2, 0x00)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) /* post process event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) static int stb0899_init(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) struct stb0899_config *config = state->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) dprintk(state->verbose, FE_DEBUG, 1, "Initializing STB0899 ... ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) /* init device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) dprintk(state->verbose, FE_DEBUG, 1, "init device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) for (i = 0; config->init_dev[i].address != 0xffff; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) stb0899_write_reg(state, config->init_dev[i].address, config->init_dev[i].data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) dprintk(state->verbose, FE_DEBUG, 1, "init S2 demod");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) /* init S2 demod */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) for (i = 0; config->init_s2_demod[i].offset != 0xffff; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) stb0899_write_s2reg(state, STB0899_S2DEMOD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) config->init_s2_demod[i].base_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) config->init_s2_demod[i].offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) config->init_s2_demod[i].data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) dprintk(state->verbose, FE_DEBUG, 1, "init S1 demod");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) /* init S1 demod */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) for (i = 0; config->init_s1_demod[i].address != 0xffff; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) stb0899_write_reg(state, config->init_s1_demod[i].address, config->init_s1_demod[i].data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) dprintk(state->verbose, FE_DEBUG, 1, "init S2 FEC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) /* init S2 fec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) for (i = 0; config->init_s2_fec[i].offset != 0xffff; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) stb0899_write_s2reg(state, STB0899_S2FEC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) config->init_s2_fec[i].base_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) config->init_s2_fec[i].offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) config->init_s2_fec[i].data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) dprintk(state->verbose, FE_DEBUG, 1, "init TST");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) /* init test */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) for (i = 0; config->init_tst[i].address != 0xffff; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) stb0899_write_reg(state, config->init_tst[i].address, config->init_tst[i].data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) stb0899_init_calc(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) stb0899_diseqc_init(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) static int stb0899_table_lookup(const struct stb0899_tab *tab, int max, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) int res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) int min = 0, med;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (val < tab[min].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) res = tab[min].real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) else if (val >= tab[max].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) res = tab[max].real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) while ((max - min) > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) med = (max + min) / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) if (val >= tab[min].read && val < tab[med].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) max = med;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) min = med;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) res = ((val - tab[min].read) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) (tab[max].real - tab[min].real) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) (tab[max].read - tab[min].read)) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) tab[min].real;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) static int stb0899_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) struct stb0899_internal *internal = &state->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) *strength = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) switch (state->delsys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) case SYS_DVBS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) case SYS_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) if (internal->lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) reg = stb0899_read_reg(state, STB0899_VSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) reg = stb0899_read_reg(state, STB0899_AGCIQIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) val = (s32)(s8)STB0899_GETFIELD(AGCIQVALUE, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) *strength = stb0899_table_lookup(stb0899_dvbsrf_tab, ARRAY_SIZE(stb0899_dvbsrf_tab) - 1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) *strength += 750;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) dprintk(state->verbose, FE_DEBUG, 1, "AGCIQVALUE = 0x%02x, C = %d * 0.1 dBm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) val & 0xff, *strength);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) case SYS_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) if (internal->lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) reg = STB0899_READ_S2REG(STB0899_S2DEMOD, IF_AGC_GAIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) val = STB0899_GETFIELD(IF_AGC_GAIN, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) *strength = stb0899_table_lookup(stb0899_dvbs2rf_tab, ARRAY_SIZE(stb0899_dvbs2rf_tab) - 1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) *strength += 950;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) dprintk(state->verbose, FE_DEBUG, 1, "IF_AGC_GAIN = 0x%04x, C = %d * 0.1 dBm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) val & 0x3fff, *strength);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) static int stb0899_read_snr(struct dvb_frontend *fe, u16 *snr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) struct stb0899_internal *internal = &state->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) unsigned int val, quant, quantn = -1, est, estn = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) u8 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) *snr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) reg = stb0899_read_reg(state, STB0899_VSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) switch (state->delsys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) case SYS_DVBS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) case SYS_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) if (internal->lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) stb0899_read_regs(state, STB0899_NIRM, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) val = MAKEWORD16(buf[0], buf[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) *snr = stb0899_table_lookup(stb0899_cn_tab, ARRAY_SIZE(stb0899_cn_tab) - 1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) dprintk(state->verbose, FE_DEBUG, 1, "NIR = 0x%02x%02x = %u, C/N = %d * 0.1 dBm\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) buf[0], buf[1], val, *snr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) case SYS_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) if (internal->lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) reg = STB0899_READ_S2REG(STB0899_S2DEMOD, UWP_CNTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) quant = STB0899_GETFIELD(UWP_ESN0_QUANT, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) reg = STB0899_READ_S2REG(STB0899_S2DEMOD, UWP_STAT2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) est = STB0899_GETFIELD(ESN0_EST, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) if (est == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) val = 301; /* C/N = 30.1 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) else if (est == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) val = 270; /* C/N = 27.0 dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) /* quantn = 100 * log(quant^2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) quantn = stb0899_table_lookup(stb0899_quant_tab, ARRAY_SIZE(stb0899_quant_tab) - 1, quant * 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) /* estn = 100 * log(est) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) estn = stb0899_table_lookup(stb0899_est_tab, ARRAY_SIZE(stb0899_est_tab) - 1, est);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) /* snr(dBm/10) = -10*(log(est)-log(quant^2)) => snr(dBm/10) = (100*log(quant^2)-100*log(est))/10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) val = (quantn - estn) / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) *snr = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) dprintk(state->verbose, FE_DEBUG, 1, "Es/N0 quant = %d (%d) estimate = %u (%d), C/N = %d * 0.1 dBm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) quant, quantn, est, estn, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) static int stb0899_read_status(struct dvb_frontend *fe, enum fe_status *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) struct stb0899_internal *internal = &state->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) *status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) switch (state->delsys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) case SYS_DVBS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) case SYS_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) dprintk(state->verbose, FE_DEBUG, 1, "Delivery system DVB-S/DSS");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) if (internal->lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) reg = stb0899_read_reg(state, STB0899_VSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) dprintk(state->verbose, FE_DEBUG, 1, "--------> FE_HAS_CARRIER | FE_HAS_LOCK");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_LOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) reg = stb0899_read_reg(state, STB0899_PLPARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) if (STB0899_GETFIELD(VITCURPUN, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) dprintk(state->verbose, FE_DEBUG, 1, "--------> FE_HAS_VITERBI | FE_HAS_SYNC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) /* post process event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) stb0899_postproc(state, STB0899_POSTPROC_GPIO_LOCK, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) case SYS_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) dprintk(state->verbose, FE_DEBUG, 1, "Delivery system DVB-S2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) if (internal->lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) reg = STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_STAT2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) if (STB0899_GETFIELD(UWP_LOCK, reg) && STB0899_GETFIELD(CSM_LOCK, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) *status |= FE_HAS_CARRIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) dprintk(state->verbose, FE_DEBUG, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) "UWP & CSM Lock ! ---> DVB-S2 FE_HAS_CARRIER");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) reg = stb0899_read_reg(state, STB0899_CFGPDELSTATUS1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) if (STB0899_GETFIELD(CFGPDELSTATUS_LOCK, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) *status |= FE_HAS_LOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) dprintk(state->verbose, FE_DEBUG, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) "Packet Delineator Locked ! -----> DVB-S2 FE_HAS_LOCK");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) if (STB0899_GETFIELD(CONTINUOUS_STREAM, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) *status |= FE_HAS_VITERBI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) dprintk(state->verbose, FE_DEBUG, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) "Packet Delineator found VITERBI ! -----> DVB-S2 FE_HAS_VITERBI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (STB0899_GETFIELD(ACCEPTED_STREAM, reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) *status |= FE_HAS_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) dprintk(state->verbose, FE_DEBUG, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) "Packet Delineator found SYNC ! -----> DVB-S2 FE_HAS_SYNC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) /* post process event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) stb0899_postproc(state, STB0899_POSTPROC_GPIO_LOCK, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) * stb0899_get_error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) * viterbi error for DVB-S/DSS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) * packet error for DVB-S2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) * Bit Error Rate or Packet Error Rate * 10 ^ 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) static int stb0899_read_ber(struct dvb_frontend *fe, u32 *ber)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) struct stb0899_internal *internal = &state->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) u8 lsb, msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) *ber = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) switch (state->delsys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) case SYS_DVBS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) case SYS_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) if (internal->lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) lsb = stb0899_read_reg(state, STB0899_ECNT1L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) msb = stb0899_read_reg(state, STB0899_ECNT1M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) *ber = MAKEWORD16(msb, lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) /* Viterbi Check */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) if (STB0899_GETFIELD(VSTATUS_PRFVIT, internal->v_status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) /* Error Rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) *ber *= 9766;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) /* ber = ber * 10 ^ 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) *ber /= (-1 + (1 << (2 * STB0899_GETFIELD(NOE, internal->err_ctrl))));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) *ber /= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) case SYS_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) if (internal->lock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) lsb = stb0899_read_reg(state, STB0899_ECNT1L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) msb = stb0899_read_reg(state, STB0899_ECNT1M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) *ber = MAKEWORD16(msb, lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) /* ber = ber * 10 ^ 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) *ber *= 10000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) *ber /= (-1 + (1 << (4 + 2 * STB0899_GETFIELD(NOE, internal->err_ctrl))));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) static int stb0899_set_voltage(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) enum fe_sec_voltage voltage)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) switch (voltage) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) case SEC_VOLTAGE_13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) stb0899_write_reg(state, STB0899_GPIO00CFG, 0x82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) stb0899_write_reg(state, STB0899_GPIO01CFG, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) stb0899_write_reg(state, STB0899_GPIO02CFG, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) case SEC_VOLTAGE_18:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) stb0899_write_reg(state, STB0899_GPIO00CFG, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) stb0899_write_reg(state, STB0899_GPIO01CFG, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) stb0899_write_reg(state, STB0899_GPIO02CFG, 0x82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) case SEC_VOLTAGE_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) stb0899_write_reg(state, STB0899_GPIO00CFG, 0x82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) stb0899_write_reg(state, STB0899_GPIO01CFG, 0x82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) stb0899_write_reg(state, STB0899_GPIO02CFG, 0x82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) static int stb0899_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) struct stb0899_internal *internal = &state->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) u8 div, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) /* wait for diseqc idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) if (stb0899_wait_diseqc_txidle(state, 100) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) switch (tone) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) case SEC_TONE_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) div = (internal->master_clk / 100) / 5632;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) div = (div + 5) / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) stb0899_write_reg(state, STB0899_DISEQCOCFG, 0x66);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) reg = stb0899_read_reg(state, STB0899_ACRPRESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) STB0899_SETFIELD_VAL(ACRPRESC, reg, 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) stb0899_write_reg(state, STB0899_ACRPRESC, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) stb0899_write_reg(state, STB0899_ACRDIV1, div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) case SEC_TONE_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) stb0899_write_reg(state, STB0899_DISEQCOCFG, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) int stb0899_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) int i2c_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) i2c_stat = stb0899_read_reg(state, STB0899_I2CRPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) if (i2c_stat < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) if (enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) dprintk(state->verbose, FE_DEBUG, 1, "Enabling I2C Repeater ...");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) i2c_stat |= STB0899_I2CTON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) if (stb0899_write_reg(state, STB0899_I2CRPT, i2c_stat) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) dprintk(state->verbose, FE_DEBUG, 1, "Disabling I2C Repeater ...");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) i2c_stat &= ~STB0899_I2CTON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) if (stb0899_write_reg(state, STB0899_I2CRPT, i2c_stat) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) dprintk(state->verbose, FE_ERROR, 1, "I2C Repeater control failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) static inline void CONVERT32(u32 x, char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) *str++ = (x >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) *str++ = (x >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) *str++ = (x >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) *str++ = (x >> 0) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) *str = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) static int stb0899_get_dev_id(struct stb0899_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) u8 chip_id, release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) u16 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) u32 demod_ver = 0, fec_ver = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) char demod_str[5] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) char fec_str[5] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) id = stb0899_read_reg(state, STB0899_DEV_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) dprintk(state->verbose, FE_DEBUG, 1, "ID reg=[0x%02x]", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) chip_id = STB0899_GETFIELD(CHIP_ID, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) release = STB0899_GETFIELD(CHIP_REL, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) dprintk(state->verbose, FE_ERROR, 1, "Device ID=[%d], Release=[%d]",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) chip_id, release);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) CONVERT32(STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_CORE_ID), (char *)&demod_str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) demod_ver = STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_VERSION_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) dprintk(state->verbose, FE_ERROR, 1, "Demodulator Core ID=[%s], Version=[%d]", (char *) &demod_str, demod_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) CONVERT32(STB0899_READ_S2REG(STB0899_S2FEC, FEC_CORE_ID_REG), (char *)&fec_str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) fec_ver = STB0899_READ_S2REG(STB0899_S2FEC, FEC_VER_ID_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) if (! (chip_id > 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) dprintk(state->verbose, FE_ERROR, 1, "couldn't find a STB 0899");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) dprintk(state->verbose, FE_ERROR, 1, "FEC Core ID=[%s], Version=[%d]", (char*) &fec_str, fec_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) static void stb0899_set_delivery(struct stb0899_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) u8 stop_clk[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) stop_clk[0] = stb0899_read_reg(state, STB0899_STOPCLK1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) stop_clk[1] = stb0899_read_reg(state, STB0899_STOPCLK2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) switch (state->delsys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) case SYS_DVBS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) dprintk(state->verbose, FE_DEBUG, 1, "Delivery System -- DVB-S");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) /* FECM/Viterbi ON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) reg = stb0899_read_reg(state, STB0899_FECM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) stb0899_write_reg(state, STB0899_FECM, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) stb0899_write_reg(state, STB0899_RSULC, 0xb1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) stb0899_write_reg(state, STB0899_TSULC, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) stb0899_write_reg(state, STB0899_RSLLC, 0x42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) stb0899_write_reg(state, STB0899_TSLPL, 0x12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) reg = stb0899_read_reg(state, STB0899_TSTRES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) STB0899_SETFIELD_VAL(FRESLDPC, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) stb0899_write_reg(state, STB0899_TSTRES, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) STB0899_SETFIELD_VAL(STOP_CKINTBUF216, stop_clk[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) case SYS_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) /* FECM/Viterbi OFF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) reg = stb0899_read_reg(state, STB0899_FECM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) stb0899_write_reg(state, STB0899_FECM, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) stb0899_write_reg(state, STB0899_RSULC, 0xb1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) stb0899_write_reg(state, STB0899_TSULC, 0x42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) stb0899_write_reg(state, STB0899_RSLLC, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) stb0899_write_reg(state, STB0899_TSLPL, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) reg = stb0899_read_reg(state, STB0899_TSTRES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) STB0899_SETFIELD_VAL(FRESLDPC, reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) stb0899_write_reg(state, STB0899_TSTRES, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) STB0899_SETFIELD_VAL(STOP_CKINTBUF216, stop_clk[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) case SYS_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) /* FECM/Viterbi ON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) reg = stb0899_read_reg(state, STB0899_FECM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) stb0899_write_reg(state, STB0899_FECM, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) stb0899_write_reg(state, STB0899_RSULC, 0xa1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) stb0899_write_reg(state, STB0899_TSULC, 0x61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) stb0899_write_reg(state, STB0899_RSLLC, 0x42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) reg = stb0899_read_reg(state, STB0899_TSTRES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) STB0899_SETFIELD_VAL(FRESLDPC, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) stb0899_write_reg(state, STB0899_TSTRES, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) dprintk(state->verbose, FE_ERROR, 1, "Unsupported delivery system");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) STB0899_SETFIELD_VAL(STOP_CKADCI108, stop_clk[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) stb0899_write_regs(state, STB0899_STOPCLK1, stop_clk, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) * stb0899_set_iterations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) * set the LDPC iteration scale function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) static void stb0899_set_iterations(struct stb0899_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) struct stb0899_internal *internal = &state->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) struct stb0899_config *config = state->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) s32 iter_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) iter_scale = 17 * (internal->master_clk / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) iter_scale += 410000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) iter_scale /= (internal->srate / 1000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) iter_scale /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) if (iter_scale > config->ldpc_max_iter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) iter_scale = config->ldpc_max_iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) reg = STB0899_READ_S2REG(STB0899_S2FEC, MAX_ITER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) STB0899_SETFIELD_VAL(MAX_ITERATIONS, reg, iter_scale);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) stb0899_write_s2reg(state, STB0899_S2FEC, STB0899_BASE_MAX_ITER, STB0899_OFF0_MAX_ITER, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) static enum dvbfe_search stb0899_search(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) struct stb0899_params *i_params = &state->params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) struct stb0899_internal *internal = &state->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) struct stb0899_config *config = state->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) struct dtv_frontend_properties *props = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) u32 SearchRange, gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) i_params->freq = props->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) i_params->srate = props->symbol_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) state->delsys = props->delivery_system;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) dprintk(state->verbose, FE_DEBUG, 1, "delivery system=%d", state->delsys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) SearchRange = 10000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) dprintk(state->verbose, FE_DEBUG, 1, "Frequency=%d, Srate=%d", i_params->freq, i_params->srate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) /* checking Search Range is meaningless for a fixed 3 Mhz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) if (INRANGE(i_params->srate, 1000000, 45000000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) dprintk(state->verbose, FE_DEBUG, 1, "Parameters IN RANGE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) stb0899_set_delivery(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) if (state->config->tuner_set_rfsiggain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) if (internal->srate > 15000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) gain = 8; /* 15Mb < srate < 45Mb, gain = 8dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) else if (internal->srate > 5000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) gain = 12; /* 5Mb < srate < 15Mb, gain = 12dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) gain = 14; /* 1Mb < srate < 5Mb, gain = 14db */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) state->config->tuner_set_rfsiggain(fe, gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) if (i_params->srate <= 5000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) stb0899_set_mclk(state, config->lo_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) stb0899_set_mclk(state, config->hi_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) switch (state->delsys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) case SYS_DVBS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) case SYS_DSS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) dprintk(state->verbose, FE_DEBUG, 1, "DVB-S delivery system");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) internal->freq = i_params->freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) internal->srate = i_params->srate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) * search = user search range +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) * 500Khz +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) * 2 * Tuner_step_size +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) * 10% of the symbol rate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) internal->srch_range = SearchRange + 1500000 + (i_params->srate / 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) internal->derot_percent = 30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) /* What to do for tuners having no bandwidth setup ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) /* enable tuner I/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) stb0899_i2c_gate_ctrl(&state->frontend, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) if (state->config->tuner_set_bandwidth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) state->config->tuner_set_bandwidth(fe, (13 * (stb0899_carr_width(state) + SearchRange)) / 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) if (state->config->tuner_get_bandwidth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) state->config->tuner_get_bandwidth(fe, &internal->tuner_bw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) /* disable tuner I/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) stb0899_i2c_gate_ctrl(&state->frontend, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) /* Set DVB-S1 AGC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) stb0899_write_reg(state, STB0899_AGCRFCFG, 0x11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) /* Run the search algorithm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) dprintk(state->verbose, FE_DEBUG, 1, "running DVB-S search algo ..");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) if (stb0899_dvbs_algo(state) == RANGEOK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) internal->lock = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) dprintk(state->verbose, FE_DEBUG, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) "-------------------------------------> DVB-S LOCK !");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) // stb0899_write_reg(state, STB0899_ERRCTRL1, 0x3d); /* Viterbi Errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) // internal->v_status = stb0899_read_reg(state, STB0899_VSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) // internal->err_ctrl = stb0899_read_reg(state, STB0899_ERRCTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) // dprintk(state->verbose, FE_DEBUG, 1, "VSTATUS=0x%02x", internal->v_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) // dprintk(state->verbose, FE_DEBUG, 1, "ERR_CTRL=0x%02x", internal->err_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) return DVBFE_ALGO_SEARCH_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) internal->lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) return DVBFE_ALGO_SEARCH_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) case SYS_DVBS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) internal->freq = i_params->freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) internal->srate = i_params->srate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) internal->srch_range = SearchRange;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) /* enable tuner I/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) stb0899_i2c_gate_ctrl(&state->frontend, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) if (state->config->tuner_set_bandwidth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) state->config->tuner_set_bandwidth(fe, (stb0899_carr_width(state) + SearchRange));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) if (state->config->tuner_get_bandwidth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) state->config->tuner_get_bandwidth(fe, &internal->tuner_bw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) /* disable tuner I/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) stb0899_i2c_gate_ctrl(&state->frontend, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) // pParams->SpectralInv = pSearch->IQ_Inversion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) /* Set DVB-S2 AGC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) stb0899_write_reg(state, STB0899_AGCRFCFG, 0x1c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) /* Set IterScale =f(MCLK,SYMB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) stb0899_set_iterations(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) /* Run the search algorithm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) dprintk(state->verbose, FE_DEBUG, 1, "running DVB-S2 search algo ..");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) if (stb0899_dvbs2_algo(state) == DVBS2_FEC_LOCK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) internal->lock = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) dprintk(state->verbose, FE_DEBUG, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) "-------------------------------------> DVB-S2 LOCK !");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) // stb0899_write_reg(state, STB0899_ERRCTRL1, 0xb6); /* Packet Errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) // internal->v_status = stb0899_read_reg(state, STB0899_VSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) // internal->err_ctrl = stb0899_read_reg(state, STB0899_ERRCTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) return DVBFE_ALGO_SEARCH_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) internal->lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) return DVBFE_ALGO_SEARCH_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) dprintk(state->verbose, FE_ERROR, 1, "Unsupported delivery system");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) return DVBFE_ALGO_SEARCH_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) return DVBFE_ALGO_SEARCH_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) static int stb0899_get_frontend(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) struct dtv_frontend_properties *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) struct stb0899_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) struct stb0899_internal *internal = &state->internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) dprintk(state->verbose, FE_DEBUG, 1, "Get params");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) p->symbol_rate = internal->srate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) p->frequency = internal->freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) static enum dvbfe_algo stb0899_frontend_algo(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) return DVBFE_ALGO_CUSTOM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) static const struct dvb_frontend_ops stb0899_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) .info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) .name = "STB0899 Multistandard",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) .frequency_min_hz = 950 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) .frequency_max_hz = 2150 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) .symbol_rate_min = 5000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) .symbol_rate_max = 45000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) .caps = FE_CAN_INVERSION_AUTO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) FE_CAN_FEC_AUTO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) FE_CAN_2G_MODULATION |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) FE_CAN_QPSK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) .detach = stb0899_detach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) .release = stb0899_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) .init = stb0899_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) .sleep = stb0899_sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) // .wakeup = stb0899_wakeup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) .i2c_gate_ctrl = stb0899_i2c_gate_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) .get_frontend_algo = stb0899_frontend_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) .search = stb0899_search,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) .get_frontend = stb0899_get_frontend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) .read_status = stb0899_read_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) .read_snr = stb0899_read_snr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) .read_signal_strength = stb0899_read_signal_strength,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) .read_ber = stb0899_read_ber,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) .set_voltage = stb0899_set_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) .set_tone = stb0899_set_tone,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) .diseqc_send_master_cmd = stb0899_send_diseqc_msg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) .diseqc_recv_slave_reply = stb0899_recv_slave_reply,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) .diseqc_send_burst = stb0899_send_diseqc_burst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) struct dvb_frontend *stb0899_attach(struct stb0899_config *config, struct i2c_adapter *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) struct stb0899_state *state = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) state = kzalloc(sizeof (struct stb0899_state), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) if (state == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) state->verbose = &verbose;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) state->config = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) state->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) state->frontend.ops = stb0899_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) state->frontend.demodulator_priv = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) /* use configured inversion as default -- we'll later autodetect inversion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) state->internal.inversion = config->inversion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) stb0899_wakeup(&state->frontend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) if (stb0899_get_dev_id(state) == -ENODEV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) printk("%s: Exiting .. !\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) printk("%s: Attaching STB0899 \n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) return &state->frontend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) EXPORT_SYMBOL(stb0899_attach);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) MODULE_PARM_DESC(verbose, "Set Verbosity level");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) MODULE_AUTHOR("Manu Abraham");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) MODULE_DESCRIPTION("STB0899 Multi-Std frontend");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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