Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Panasonic MN88472 DVB-T/T2/C demodulator driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef MN88472_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define MN88472_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/dvb/frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* Define old names for backward compatibility */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define VARIABLE_TS_CLOCK   MN88472_TS_CLK_VARIABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define FIXED_TS_CLOCK      MN88472_TS_CLK_FIXED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define SERIAL_TS_MODE      MN88472_TS_MODE_SERIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PARALLEL_TS_MODE    MN88472_TS_MODE_PARALLEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  * struct mn88472_config - Platform data for the mn88472 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * @xtal: Clock frequency.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * @ts_mode: TS mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * @ts_clock: TS clock config.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * @i2c_wr_max: Max number of bytes driver writes to I2C at once.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  * @fe: pointer to a frontend pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  * @get_dvb_frontend: Get DVB frontend callback.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct mn88472_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	unsigned int xtal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define MN88472_TS_MODE_SERIAL      0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define MN88472_TS_MODE_PARALLEL    1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	int ts_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define MN88472_TS_CLK_FIXED        0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define MN88472_TS_CLK_VARIABLE     1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	int ts_clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	u16 i2c_wr_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	/* Everything after that is returned by the driver. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	 * DVB frontend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	struct dvb_frontend **fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	struct dvb_frontend* (*get_dvb_frontend)(struct i2c_client *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #endif