^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Driver for LNB supply and control IC STMicroelectronics LNBH29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (c) 2018 Socionext Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "lnbh29.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * struct lnbh29_priv - LNBH29 driver private data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * @i2c: Pointer to the I2C adapter structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * @i2c_address: I2C address of LNBH29 chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * @config: Registers configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * offset 0: 1st register address, always 0x01 (DATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * offset 1: DATA register value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct lnbh29_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct i2c_adapter *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u8 i2c_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u8 config[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define LNBH29_STATUS_OLF BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define LNBH29_STATUS_OTF BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define LNBH29_STATUS_VMON BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define LNBH29_STATUS_PNG BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define LNBH29_STATUS_PDO BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LNBH29_VSEL_MASK GENMASK(2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define LNBH29_VSEL_0 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* Min: 13.188V, Typ: 13.667V, Max:14V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define LNBH29_VSEL_13 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* Min: 18.158V, Typ: 18.817V, Max:19.475V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define LNBH29_VSEL_18 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static int lnbh29_read_vmon(struct lnbh29_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u8 addr = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u8 status[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct i2c_msg msg[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .addr = priv->i2c_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .buf = &addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .addr = priv->i2c_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .len = sizeof(status),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .buf = status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ret = i2c_transfer(priv->i2c, msg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (ret >= 0 && ret != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) dev_dbg(&priv->i2c->dev, "LNBH29 I2C transfer failed (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (status[0] & (LNBH29_STATUS_OLF | LNBH29_STATUS_VMON)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) dev_err(&priv->i2c->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) "LNBH29 voltage in failure state, status reg 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) status[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static int lnbh29_set_voltage(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) enum fe_sec_voltage voltage)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct lnbh29_priv *priv = fe->sec_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) u8 data_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct i2c_msg msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .addr = priv->i2c_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .len = sizeof(priv->config),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .buf = priv->config
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) switch (voltage) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) case SEC_VOLTAGE_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) data_reg = LNBH29_VSEL_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) case SEC_VOLTAGE_13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) data_reg = LNBH29_VSEL_13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) case SEC_VOLTAGE_18:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) data_reg = LNBH29_VSEL_18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) priv->config[1] &= ~LNBH29_VSEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) priv->config[1] |= data_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ret = i2c_transfer(priv->i2c, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (ret >= 0 && ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) dev_err(&priv->i2c->dev, "LNBH29 I2C transfer error (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Soft-start time (Vout 0V to 18V) is Typ. 6ms. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) usleep_range(6000, 20000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (voltage == SEC_VOLTAGE_OFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return lnbh29_read_vmon(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static void lnbh29_release(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) lnbh29_set_voltage(fe, SEC_VOLTAGE_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) kfree(fe->sec_priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) fe->sec_priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct dvb_frontend *lnbh29_attach(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct lnbh29_config *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct i2c_adapter *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct lnbh29_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) priv = kzalloc(sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) priv->i2c_address = (cfg->i2c_address >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) priv->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) priv->config[0] = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) priv->config[1] = cfg->data_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) fe->sec_priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (lnbh29_set_voltage(fe, SEC_VOLTAGE_OFF)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) dev_err(&i2c->dev, "no LNBH29 found at I2C addr 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) priv->i2c_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) kfree(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) fe->sec_priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) fe->ops.release_sec = lnbh29_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) fe->ops.set_voltage = lnbh29_set_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) dev_info(&i2c->dev, "LNBH29 attached at I2C addr 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) priv->i2c_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) EXPORT_SYMBOL(lnbh29_attach);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) MODULE_AUTHOR("Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) MODULE_DESCRIPTION("STMicroelectronics LNBH29 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) MODULE_LICENSE("GPL v2");