Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Driver for Sharp IX2505V (marked B0017) DVB-S silicon tuner
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2010 Malcolm Priestley
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/dvb/frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include "ix2505v.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) static int ix2505v_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define dprintk(level, args...) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	if (ix2505v_debug & level) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 		printk(KERN_DEBUG "ix2505v: " args); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define deb_info(args...)  dprintk(0x01, args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define deb_i2c(args...)  dprintk(0x02, args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) struct ix2505v_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	struct i2c_adapter *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	const struct ix2505v_config *config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	u32 frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  *  Data read format of the Sharp IX2505V B0017
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  *  byte1:   1   |   1   |   0   |   0   |   0   |  MA1  |  MA0  |  1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  *  byte2:  POR  |   FL  |  RD2  |  RD1  |  RD0  |   X   |   X   |  X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  *  byte1 = address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  *  byte2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  *	POR = Power on Reset (VCC H=<2.2v L=>2.2v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  *	FL  = Phase Lock (H=lock L=unlock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  *	RD0-2 = Reserved internal operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * Only POR can be used to check the tuner is present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * Caution: after byte2 the I2C reverts to write mode continuing to read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  *          may corrupt tuning data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static int ix2505v_read_status_reg(struct ix2505v_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	u8 addr = state->config->tuner_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u8 b2[] = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct i2c_msg msg[1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		{ .addr = addr, .flags = I2C_M_RD, .buf = b2, .len = 1 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	ret = i2c_transfer(state->i2c, msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	deb_i2c("Read %s ", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	return (ret == 1) ? (int) b2[0] : -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static int ix2505v_write(struct ix2505v_state *state, u8 buf[], u8 count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct i2c_msg msg[1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		{ .addr = state->config->tuner_address, .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		  .buf = buf, .len = count },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	ret = i2c_transfer(state->i2c, msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	if (ret != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		deb_i2c("%s: i2c error, ret=%d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) static void ix2505v_release(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	struct ix2505v_state *state = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	fe->tuner_priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)  *  Data write format of the Sharp IX2505V B0017
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)  *  byte1:   1   |   1   |   0   |   0   |   0   | 0(MA1)| 0(MA0)|  0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)  *  byte2:   0   |  BG1  |  BG2  |   N8  |   N7  |   N6  |  N5   |  N4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)  *  byte3:   N3  |   N2  |   N1  |   A5  |   A4  |   A3  |   A2  |  A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99)  *  byte4:   1   | 1(C1) | 1(C0) |  PD5  |  PD4  |   TM  | 0(RTS)| 1(REF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)  *  byte5:   BA2 |   BA1 |  BA0  |  PSC  |  PD3  |PD2/TS2|DIV/TS1|PD0/TS0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)  *  byte1 = address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)  *  Write order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)  *  1) byte1 -> byte2 -> byte3 -> byte4 -> byte5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)  *  2) byte1 -> byte4 -> byte5 -> byte2 -> byte3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)  *  3) byte1 -> byte2 -> byte3 -> byte4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)  *  4) byte1 -> byte4 -> byte5 -> byte2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)  *  5) byte1 -> byte2 -> byte3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)  *  6) byte1 -> byte4 -> byte5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  *  7) byte1 -> byte2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  *  8) byte1 -> byte4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)  *  Recommended Setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)  *  1 -> 8 -> 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int ix2505v_set_params(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	struct ix2505v_state *state = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	u32 frequency = c->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	u32 b_w  = (c->symbol_rate * 27) / 32000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	u32 div_factor, N , A, x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	int ret = 0, len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	u8 gain, cc, ref, psc, local_osc, lpf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	u8 data[4] = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	if ((frequency < fe->ops.info.frequency_min_hz / kHz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	||  (frequency > fe->ops.info.frequency_max_hz / kHz))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (state->config->tuner_gain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		gain = (state->config->tuner_gain < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			? state->config->tuner_gain : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		gain = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	if (state->config->tuner_chargepump)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		cc = state->config->tuner_chargepump;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		cc = 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	ref = 8; /* REF =1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	psc = 32; /* PSC = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	div_factor = (frequency * ref) / 40; /* local osc = 4Mhz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	x = div_factor / psc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	N = x/100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	A = ((x - (N * 100)) * psc) / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	data[0] = ((gain & 0x3) << 5) | (N >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	data[1] = (N << 5) | (A & 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	data[2] = 0x81 | ((cc & 0x3) << 5) ; /*PD5,PD4 & TM = 0|C1,C0|REF=1*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	deb_info("Frq=%d x=%d N=%d A=%d\n", frequency, x, N, A);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	if (frequency <= 1065000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		local_osc = (6 << 5) | 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	else if (frequency <= 1170000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		local_osc = (7 << 5) | 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	else if (frequency <= 1300000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		local_osc = (1 << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	else if (frequency <= 1445000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		local_osc = (2 << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	else if (frequency <= 1607000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		local_osc = (3 << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	else if (frequency <= 1778000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		local_osc = (4 << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	else if (frequency <= 1942000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		local_osc = (5 << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	else		/*frequency up to 2150000*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		local_osc = (6 << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	data[3] = local_osc; /* all other bits set 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	if (b_w <= 10000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		lpf = 0xc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	else if (b_w <= 12000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		lpf = 0x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	else if (b_w <= 14000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		lpf = 0xa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	else if (b_w <= 16000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		lpf = 0x6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	else if (b_w <= 18000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		lpf = 0xe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	else if (b_w <= 20000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		lpf = 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	else if (b_w <= 22000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		lpf = 0x9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	else if (b_w <= 24000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		lpf = 0x5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	else if (b_w <= 26000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		lpf = 0xd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	else if (b_w <= 28000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		lpf = 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		lpf = 0xb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	deb_info("Osc=%x b_w=%x lpf=%x\n", local_osc, b_w, lpf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	deb_info("Data 0=[%4phN]\n", data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	len = sizeof(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	ret |= ix2505v_write(state, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	data[2] |= 0x4; /* set TM = 1 other bits same */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	ret |= ix2505v_write(state, &data[2], len); /* write byte 4 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	data[2] |= ((lpf >> 2) & 0x3) << 3; /* lpf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	data[3] |= (lpf & 0x3) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	deb_info("Data 2=[%x%x]\n", data[2], data[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	ret |= ix2505v_write(state, &data[2], len); /* write byte 4 & 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	if (state->config->min_delay_ms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		msleep(state->config->min_delay_ms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	state->frequency = frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static int ix2505v_get_frequency(struct dvb_frontend *fe, u32 *frequency)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	struct ix2505v_state *state = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	*frequency = state->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static const struct dvb_tuner_ops ix2505v_tuner_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	.info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		.name = "Sharp IX2505V (B0017)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		.frequency_min_hz =  950 * MHz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		.frequency_max_hz = 2175 * MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	.release = ix2505v_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	.set_params = ix2505v_set_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	.get_frequency = ix2505v_get_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) struct dvb_frontend *ix2505v_attach(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 				    const struct ix2505v_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 				    struct i2c_adapter *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	struct ix2505v_state *state = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	if (NULL == config) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		deb_i2c("%s: no config ", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	state = kzalloc(sizeof(struct ix2505v_state), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	if (NULL == state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	state->config = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	state->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (state->config->tuner_write_only) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 			fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		ret = ix2505v_read_status_reg(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		if (ret & 0x80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 			deb_i2c("%s: No IX2505V found\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 			goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 			fe->ops.i2c_gate_ctrl(fe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	fe->tuner_priv = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	memcpy(&fe->ops.tuner_ops, &ix2505v_tuner_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		sizeof(struct dvb_tuner_ops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	deb_i2c("%s: initialization (%s addr=0x%02x) ok\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		__func__, fe->ops.tuner_ops.info.name, config->tuner_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	return fe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	kfree(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) EXPORT_SYMBOL(ix2505v_attach);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) module_param_named(debug, ix2505v_debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MODULE_DESCRIPTION("DVB IX2505V tuner driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) MODULE_AUTHOR("Malcolm Priestley");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MODULE_LICENSE("GPL");