^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include "dibx000_common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) static int debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) module_param(debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define dprintk(fmt, arg...) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) if (debug) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) printk(KERN_DEBUG pr_fmt("%s: " fmt), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) __func__, ##arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static int dibx000_write_word(struct dibx000_i2c_master *mst, u16 reg, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) if (mutex_lock_interruptible(&mst->i2c_buffer_lock) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) dprintk("could not acquire lock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) mst->i2c_write_buffer[0] = (reg >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) mst->i2c_write_buffer[1] = reg & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) mst->i2c_write_buffer[2] = (val >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) mst->i2c_write_buffer[3] = val & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) memset(mst->msg, 0, sizeof(struct i2c_msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) mst->msg[0].addr = mst->i2c_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) mst->msg[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) mst->msg[0].buf = mst->i2c_write_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) mst->msg[0].len = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ret = i2c_transfer(mst->i2c_adap, mst->msg, 1) != 1 ? -EREMOTEIO : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) mutex_unlock(&mst->i2c_buffer_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static u16 dibx000_read_word(struct dibx000_i2c_master *mst, u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u16 ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (mutex_lock_interruptible(&mst->i2c_buffer_lock) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) dprintk("could not acquire lock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) mst->i2c_write_buffer[0] = reg >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) mst->i2c_write_buffer[1] = reg & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) memset(mst->msg, 0, 2 * sizeof(struct i2c_msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) mst->msg[0].addr = mst->i2c_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) mst->msg[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) mst->msg[0].buf = mst->i2c_write_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) mst->msg[0].len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) mst->msg[1].addr = mst->i2c_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) mst->msg[1].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) mst->msg[1].buf = mst->i2c_read_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) mst->msg[1].len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (i2c_transfer(mst->i2c_adap, mst->msg, 2) != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) dprintk("i2c read error on %d\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ret = (mst->i2c_read_buffer[0] << 8) | mst->i2c_read_buffer[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) mutex_unlock(&mst->i2c_buffer_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static int dibx000_is_i2c_done(struct dibx000_i2c_master *mst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int i = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u16 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) while (((status = dibx000_read_word(mst, mst->base_reg + 2)) & 0x0100) == 0 && --i > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* i2c timed out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (i == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* no acknowledge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if ((status & 0x0080) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static int dibx000_master_i2c_write(struct dibx000_i2c_master *mst, struct i2c_msg *msg, u8 stop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u16 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u16 da;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) u16 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u16 txlen = msg->len, len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) const u8 *b = msg->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) while (txlen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) dibx000_read_word(mst, mst->base_reg + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) len = txlen > 8 ? 8 : txlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) for (i = 0; i < len; i += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) data = *b++ << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (i+1 < len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) data |= *b++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) dibx000_write_word(mst, mst->base_reg, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) da = (((u8) (msg->addr)) << 9) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) (1 << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) (1 << 7) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) (0 << 6) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) (0 << 5) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ((len & 0x7) << 2) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) (0 << 1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) (0 << 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (txlen == msg->len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) da |= 1 << 5; /* start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (txlen-len == 0 && stop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) da |= 1 << 6; /* stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) dibx000_write_word(mst, mst->base_reg+1, da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (dibx000_is_i2c_done(mst) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) txlen -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int dibx000_master_i2c_read(struct dibx000_i2c_master *mst, struct i2c_msg *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u16 da;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) u8 *b = msg->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) u16 rxlen = msg->len, len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) while (rxlen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) len = rxlen > 8 ? 8 : rxlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) da = (((u8) (msg->addr)) << 9) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) (1 << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) (1 << 7) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) (0 << 6) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) (0 << 5) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ((len & 0x7) << 2) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) (1 << 1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) (0 << 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (rxlen == msg->len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) da |= 1 << 5; /* start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (rxlen-len == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) da |= 1 << 6; /* stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) dibx000_write_word(mst, mst->base_reg+1, da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (dibx000_is_i2c_done(mst) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) rxlen -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) while (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) da = dibx000_read_word(mst, mst->base_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) *b++ = (da >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) len--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (len >= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) *b++ = da & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) len--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int dibx000_i2c_set_speed(struct i2c_adapter *i2c_adap, u16 speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (mst->device_rev < DIB7000MC && speed < 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) speed = 235;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return dibx000_write_word(mst, mst->base_reg + 3, (u16)(60000 / speed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) EXPORT_SYMBOL(dibx000_i2c_set_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static u32 dibx000_i2c_func(struct i2c_adapter *adapter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return I2C_FUNC_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static int dibx000_i2c_select_interface(struct dibx000_i2c_master *mst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) enum dibx000_i2c_interface intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (mst->device_rev > DIB3000MC && mst->selected_interface != intf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) dprintk("selecting interface: %d\n", intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) mst->selected_interface = intf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) return dibx000_write_word(mst, mst->base_reg + 4, intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int dibx000_i2c_master_xfer_gpio12(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int msg_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_GPIO_1_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) for (msg_index = 0; msg_index < num; msg_index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (msg[msg_index].flags & I2C_M_RD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ret = dibx000_master_i2c_read(mst, &msg[msg_index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ret = dibx000_master_i2c_write(mst, &msg[msg_index], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static int dibx000_i2c_master_xfer_gpio34(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) int msg_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_GPIO_3_4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) for (msg_index = 0; msg_index < num; msg_index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (msg[msg_index].flags & I2C_M_RD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ret = dibx000_master_i2c_read(mst, &msg[msg_index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ret = dibx000_master_i2c_write(mst, &msg[msg_index], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static struct i2c_algorithm dibx000_i2c_master_gpio12_xfer_algo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .master_xfer = dibx000_i2c_master_xfer_gpio12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .functionality = dibx000_i2c_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static struct i2c_algorithm dibx000_i2c_master_gpio34_xfer_algo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .master_xfer = dibx000_i2c_master_xfer_gpio34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .functionality = dibx000_i2c_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int dibx000_i2c_gate_ctrl(struct dibx000_i2c_master *mst, u8 tx[4],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) u8 addr, int onoff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (onoff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) val = addr << 8; // bit 7 = use master or not, if 0, the gate is open
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) val = 1 << 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (mst->device_rev > DIB7000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) val <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) tx[0] = (((mst->base_reg + 1) >> 8) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) tx[1] = ((mst->base_reg + 1) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) tx[2] = val >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) tx[3] = val & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static int dibx000_i2c_gated_gpio67_xfer(struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) struct i2c_msg msg[], int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (num > 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) dprintk("%s: too much I2C message to be transmitted (%i). Maximum is 32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) __func__, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_GPIO_6_7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (mutex_lock_interruptible(&mst->i2c_buffer_lock) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) dprintk("could not acquire lock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) memset(mst->msg, 0, sizeof(struct i2c_msg) * (2 + num));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* open the gate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) dibx000_i2c_gate_ctrl(mst, &mst->i2c_write_buffer[0], msg[0].addr, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) mst->msg[0].addr = mst->i2c_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) mst->msg[0].buf = &mst->i2c_write_buffer[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) mst->msg[0].len = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) memcpy(&mst->msg[1], msg, sizeof(struct i2c_msg) * num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* close the gate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) dibx000_i2c_gate_ctrl(mst, &mst->i2c_write_buffer[4], 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) mst->msg[num + 1].addr = mst->i2c_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) mst->msg[num + 1].buf = &mst->i2c_write_buffer[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) mst->msg[num + 1].len = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ret = (i2c_transfer(mst->i2c_adap, mst->msg, 2 + num) == 2 + num ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) num : -EIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) mutex_unlock(&mst->i2c_buffer_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static struct i2c_algorithm dibx000_i2c_gated_gpio67_algo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .master_xfer = dibx000_i2c_gated_gpio67_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .functionality = dibx000_i2c_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static int dibx000_i2c_gated_tuner_xfer(struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) struct i2c_msg msg[], int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (num > 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) dprintk("%s: too much I2C message to be transmitted (%i). Maximum is 32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) __func__, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_TUNER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (mutex_lock_interruptible(&mst->i2c_buffer_lock) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) dprintk("could not acquire lock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) memset(mst->msg, 0, sizeof(struct i2c_msg) * (2 + num));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* open the gate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) dibx000_i2c_gate_ctrl(mst, &mst->i2c_write_buffer[0], msg[0].addr, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) mst->msg[0].addr = mst->i2c_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) mst->msg[0].buf = &mst->i2c_write_buffer[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) mst->msg[0].len = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) memcpy(&mst->msg[1], msg, sizeof(struct i2c_msg) * num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* close the gate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) dibx000_i2c_gate_ctrl(mst, &mst->i2c_write_buffer[4], 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) mst->msg[num + 1].addr = mst->i2c_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) mst->msg[num + 1].buf = &mst->i2c_write_buffer[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) mst->msg[num + 1].len = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ret = (i2c_transfer(mst->i2c_adap, mst->msg, 2 + num) == 2 + num ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) num : -EIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) mutex_unlock(&mst->i2c_buffer_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static struct i2c_algorithm dibx000_i2c_gated_tuner_algo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .master_xfer = dibx000_i2c_gated_tuner_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .functionality = dibx000_i2c_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) struct i2c_adapter *dibx000_get_i2c_adapter(struct dibx000_i2c_master *mst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) enum dibx000_i2c_interface intf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) int gating)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) struct i2c_adapter *i2c = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) switch (intf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) case DIBX000_I2C_INTERFACE_TUNER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (gating)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) i2c = &mst->gated_tuner_i2c_adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) case DIBX000_I2C_INTERFACE_GPIO_1_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (!gating)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) i2c = &mst->master_i2c_adap_gpio12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) case DIBX000_I2C_INTERFACE_GPIO_3_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (!gating)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) i2c = &mst->master_i2c_adap_gpio34;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) case DIBX000_I2C_INTERFACE_GPIO_6_7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if (gating)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) i2c = &mst->master_i2c_adap_gpio67;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) pr_err("incorrect I2C interface selected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) EXPORT_SYMBOL(dibx000_get_i2c_adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) void dibx000_reset_i2c_master(struct dibx000_i2c_master *mst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) /* initialize the i2c-master by closing the gate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) u8 tx[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct i2c_msg m = {.addr = mst->i2c_addr,.buf = tx,.len = 4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) dibx000_i2c_gate_ctrl(mst, tx, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) i2c_transfer(mst->i2c_adap, &m, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) mst->selected_interface = 0xff; // the first time force a select of the I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_TUNER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) EXPORT_SYMBOL(dibx000_reset_i2c_master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static int i2c_adapter_init(struct i2c_adapter *i2c_adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct i2c_algorithm *algo, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) struct dibx000_i2c_master *mst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) strscpy(i2c_adap->name, name, sizeof(i2c_adap->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) i2c_adap->algo = algo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) i2c_adap->algo_data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) i2c_set_adapdata(i2c_adap, mst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (i2c_add_adapter(i2c_adap) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) int dibx000_init_i2c_master(struct dibx000_i2c_master *mst, u16 device_rev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) struct i2c_adapter *i2c_adap, u8 i2c_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) mutex_init(&mst->i2c_buffer_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (mutex_lock_interruptible(&mst->i2c_buffer_lock) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) dprintk("could not acquire lock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) memset(mst->msg, 0, sizeof(struct i2c_msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) mst->msg[0].addr = i2c_addr >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) mst->msg[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) mst->msg[0].buf = mst->i2c_write_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) mst->msg[0].len = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) mst->device_rev = device_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) mst->i2c_adap = i2c_adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) mst->i2c_addr = i2c_addr >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) if (device_rev == DIB7000P || device_rev == DIB8000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) mst->base_reg = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) mst->base_reg = 768;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) mst->gated_tuner_i2c_adap.dev.parent = mst->i2c_adap->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) if (i2c_adapter_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) (&mst->gated_tuner_i2c_adap, &dibx000_i2c_gated_tuner_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) "DiBX000 tuner I2C bus", mst) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) pr_err("could not initialize the tuner i2c_adapter\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) mst->master_i2c_adap_gpio12.dev.parent = mst->i2c_adap->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (i2c_adapter_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) (&mst->master_i2c_adap_gpio12, &dibx000_i2c_master_gpio12_xfer_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) "DiBX000 master GPIO12 I2C bus", mst) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) pr_err("could not initialize the master i2c_adapter\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) mst->master_i2c_adap_gpio34.dev.parent = mst->i2c_adap->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) if (i2c_adapter_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) (&mst->master_i2c_adap_gpio34, &dibx000_i2c_master_gpio34_xfer_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) "DiBX000 master GPIO34 I2C bus", mst) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) pr_err("could not initialize the master i2c_adapter\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) mst->master_i2c_adap_gpio67.dev.parent = mst->i2c_adap->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (i2c_adapter_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) (&mst->master_i2c_adap_gpio67, &dibx000_i2c_gated_gpio67_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) "DiBX000 master GPIO67 I2C bus", mst) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) pr_err("could not initialize the master i2c_adapter\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) /* initialize the i2c-master by closing the gate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) dibx000_i2c_gate_ctrl(mst, mst->i2c_write_buffer, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) ret = (i2c_transfer(i2c_adap, mst->msg, 1) == 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) mutex_unlock(&mst->i2c_buffer_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) EXPORT_SYMBOL(dibx000_init_i2c_master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) void dibx000_exit_i2c_master(struct dibx000_i2c_master *mst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) i2c_del_adapter(&mst->gated_tuner_i2c_adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) i2c_del_adapter(&mst->master_i2c_adap_gpio12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) i2c_del_adapter(&mst->master_i2c_adap_gpio34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) i2c_del_adapter(&mst->master_i2c_adap_gpio67);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) EXPORT_SYMBOL(dibx000_exit_i2c_master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) MODULE_DESCRIPTION("Common function the DiBcom demodulator family");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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