^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Sony CXD2820R demodulator driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef CXD2820R_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define CXD2820R_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/dvb/frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define CXD2820R_GPIO_D (0 << 0) /* disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CXD2820R_GPIO_E (1 << 0) /* enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define CXD2820R_GPIO_O (0 << 1) /* output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define CXD2820R_GPIO_I (1 << 1) /* input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define CXD2820R_GPIO_L (0 << 2) /* output low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define CXD2820R_GPIO_H (1 << 2) /* output high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CXD2820R_TS_SERIAL 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CXD2820R_TS_SERIAL_MSB 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define CXD2820R_TS_PARALLEL 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define CXD2820R_TS_PARALLEL_MSB 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * I2C address: 0x6c, 0x6d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * struct cxd2820r_platform_data - Platform data for the cxd2820r driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * @ts_mode: TS mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * @ts_clk_inv: TS clock inverted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * @if_agc_polarity: IF AGC polarity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * @spec_inv: Input spectrum inverted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * @gpio_chip_base: GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * @get_dvb_frontend: Get DVB frontend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct cxd2820r_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u8 ts_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) bool ts_clk_inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) bool if_agc_polarity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) bool spec_inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int **gpio_chip_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct dvb_frontend* (*get_dvb_frontend)(struct i2c_client *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* private: For legacy media attach wrapper. Do not set value. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) bool attach_in_use;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * struct cxd2820r_config - configuration for cxd2020r demod
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @i2c_address: Demodulator I2C address. Driver determines DVB-C slave I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * address automatically from master address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Default: none, must set. Values: 0x6c, 0x6d.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @ts_mode: TS output mode. Default: none, must set. Values: FIXME?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @ts_clock_inv: TS clock inverted. Default: 0. Values: 0, 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @if_agc_polarity: Default: 0. Values: 0, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @spec_inv: Spectrum inversion. Default: 0. Values: 0, 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct cxd2820r_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* Demodulator I2C address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * Driver determines DVB-C slave I2C address automatically from master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * Default: none, must set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * Values: 0x6c, 0x6d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u8 i2c_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* TS output mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * Default: none, must set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * Values:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u8 ts_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* TS clock inverted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * Default: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * Values: 0, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) bool ts_clock_inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* IF AGC polarity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * Default: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * Values: 0, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) bool if_agc_polarity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Spectrum inversion.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * Default: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * Values: 0, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) bool spec_inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #if IS_REACHABLE(CONFIG_DVB_CXD2820R)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * Attach a cxd2820r demod
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * @config: pointer to &struct cxd2820r_config with demod configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * @i2c: i2c adapter to use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * @gpio_chip_base: if zero, disables GPIO setting. Otherwise, if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * CONFIG_GPIOLIB is set dynamically allocate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * gpio base; if is not set, use its value to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * setup the GPIO pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * return: FE pointer on success, NULL on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) extern struct dvb_frontend *cxd2820r_attach(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) const struct cxd2820r_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct i2c_adapter *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int *gpio_chip_base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static inline struct dvb_frontend *cxd2820r_attach(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) const struct cxd2820r_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct i2c_adapter *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int *gpio_chip_base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #endif /* CXD2820R_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags