^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * bsru6.h - ALPS BSRU6 tuner support (moved from budget-ci.c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * the project's page is at https://linuxtv.org
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef BSRU6_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define BSRU6_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) static u8 alps_bsru6_inittab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 0x01, 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 0x02, 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 0x03, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 0x06, 0x40, /* DAC not used, set to high impendance mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 0x07, 0x00, /* DAC LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 0x09, 0x00, /* FIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 0x10, 0x3f, // AGC2 0x3d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 0x11, 0x84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 0x12, 0xb9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 0x15, 0xc9, // lock detector threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 0x16, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 0x17, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 0x18, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 0x19, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 0x1a, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 0x1f, 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 0x20, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 0x21, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 0x22, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 0x23, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 0x29, 0x1e, // 1/2 threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 0x2a, 0x14, // 2/3 threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 0x2b, 0x0f, // 3/4 threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 0x2c, 0x09, // 5/6 threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 0x2d, 0x05, // 7/8 threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 0x2e, 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 0x31, 0x1f, // test all FECs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 0x32, 0x19, // viterbi and synchro search
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 0x33, 0xfc, // rs control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 0x34, 0x93, // error control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 0x0f, 0x52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 0xff, 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static int alps_bsru6_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u8 aclk = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u8 bclk = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (srate < 1500000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) aclk = 0xb7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) bclk = 0x47;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) } else if (srate < 3000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) aclk = 0xb7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) bclk = 0x4b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) } else if (srate < 7000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) aclk = 0xb7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) bclk = 0x4f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) } else if (srate < 14000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) aclk = 0xb7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) bclk = 0x53;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) } else if (srate < 30000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) aclk = 0xb6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) bclk = 0x53;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) } else if (srate < 45000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) aclk = 0xb4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) bclk = 0x51;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) stv0299_writereg(fe, 0x13, aclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) stv0299_writereg(fe, 0x14, bclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) stv0299_writereg(fe, 0x21, ratio & 0xf0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static int alps_bsru6_tuner_set_params(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct dtv_frontend_properties *p = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) u8 buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) u32 div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct i2c_adapter *i2c = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if ((p->frequency < 950000) || (p->frequency > 2150000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) div = (p->frequency + (125 - 1)) / 125; /* round correctly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) buf[0] = (div >> 8) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) buf[1] = div & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) buf[3] = 0xC4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (p->frequency > 1530000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) buf[3] = 0xc0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (i2c_transfer(i2c, &msg, 1) != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static struct stv0299_config alps_bsru6_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .demod_address = 0x68,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .inittab = alps_bsru6_inittab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .mclk = 88000000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .invert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .skip_reinit = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .lock_output = STV0299_LOCKOUTPUT_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .volt13_op0_op1 = STV0299_VOLT13_OP1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .min_delay_ms = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .set_symbol_rate = alps_bsru6_set_symbol_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #endif